NXP Semiconductors 74HCT147D,653
- Part No.:
- 74HCT147D,653
- Manufacturer:
- NXP Semiconductors
- Category:
- Signal Switches, Multiplexers, Decoders
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
74HCT147D,653.pdf
- Description:
- IC PRIORITY ENCOD 1 X 10:4 16SO
- Quantity:
- Payment:

- Shipping:

Inventory:1,471
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Product details
Overview
74HCT147D,653 from Nexperia (formerly Philips Semiconductors) is a 10-to-4 line priority encoder IC that converts nine active-LOW decimal inputs (A0–A8) into four active-LOW BCD outputs (Y0–Y3), with A8 assigned highest priority; propagation delay is 35 ns typical at VCC = 4.5 V, output capability is standard, and it operates over −40 °C to +85 °C for industrial switch encoding applications.
For engineers reviewing the 74HCT147D,653 datasheet, 74HCT147D,653 pinout, 74HCT147D,653 application, or 74HCT147D,653 equivalent, key selection considerations include active-LOW input/output logic polarity, priority encoding behavior under multiple simultaneous inputs, BCD output compatibility with downstream TTL/CMOS decoders, and HCT-level 5 V CMOS/TTL interface compatibility.
Technical Context
The 74HCT147D,653 implements priority encoding using Si-gate CMOS technology with TTL-compatible input thresholds (VIH = 2.0 V min, VIL = 0.8 V max), enabling direct interfacing with legacy LSTTL systems. Its logic function encodes nine active-LOW inputs into four active-LOW BCD outputs, where "zero" is implied when all inputs are HIGH.
Propagation delay (tPHL/tPLH) is specified at 35 ns typical (4.5 V, CL = 50 pF), and output transition time (tTHL/tTLH) is 15 ns typical under same conditions. The device belongs to the MSI (Medium Scale Integration) category and features standard output drive capability (±4 mA at VCC = 4.5 V).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Logic Family | 74HCT - TTL-compatible CMOS with 5 V supply and LSTTL input thresholds |
| Encoding Function | 10-line to 4-line priority encoder; encodes A0–A8 (active LOW) to Y0–Y3 (active LOW) BCD |
| Propagation Delay | 35 ns typical (VCC = 4.5 V, CL = 50 pF) - determines maximum operating frequency in combinational logic paths |
| Operating Temperature | −40 °C to +85 °C - supports industrial-grade embedded control and panel interface designs |
| Supply Voltage | 4.5 V to 5.5 V - compatible with standard 5 V logic rails and tolerant of nominal 5 V ±10 % variation |
| Output Drive | Standard (±4 mA) - sufficient to drive one LSTTL load or multiple CMOS inputs without buffering |
| Input Capacitance | 3.5 pF - low capacitive loading enables high-speed switching with minimal signal distortion |
Pinout & Package
74HCT147D,653 is housed in a 16-pin SO16 (Small Outline) package per JEDEC MS-012, with 1.27 mm pitch, body width 3.9 mm, and lead count matching standard DIP-16 footprint for surface-mount compatibility.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1–5, 10–13 | A0 to A8 | Nine active-LOW decimal data inputs; A8 has highest priority in conflict resolution |
| 9, 7, 6, 14 | Y0 to Y3 | Four active-LOW BCD outputs; encode selected input as binary-coded decimal |
| 8 | GND | Ground reference (0 V) for logic and power return path |
| 16 | VCC | Positive supply terminal (4.5–5.5 V); powers internal CMOS gates and output drivers |
| 15 | n.c. | No internal connection; must be left unconnected or tied to GND/VCC only if required by PCB layout rules |
Key Features
| Feature | Design Value |
|---|---|
| Priority encoding logic | Resolves multiple simultaneous active-LOW inputs by selecting highest-priority input (A8) - prevents ambiguous output states in switch matrix applications |
| TTL-compatible input thresholds | VIH ≥ 2.0 V, VIL ≤ 0.8 V - ensures reliable interfacing with legacy 5 V TTL and LSTTL devices without level-shifting |
| Implied zero encoding | Outputs Y0–Y3 = HIGH when all A0–A8 = HIGH - provides explicit "no-key-pressed" state detection in keyboard encoders |
| Standard output drive | Capable of sourcing/sinking ≥4 mA - directly drives LED indicators, small relays, or next-stage logic without external buffers |
| MSI integration level | Contains ~100 equivalent gates - balances functionality density with testability and predictable timing behavior |
Applications
| Industrial Keypad Encoder | BCD Code Converter |
|---|---|
Use Scenario: 10-position thumbwheel or pushbutton switch array on an industrial HMI panel. IC Role / Device Role / Timing Role: Priority encoder converting mechanical switch closures into unambiguous BCD code for microcontroller input. Use Value: Prevents bus contention and misreads during multi-switch actuation; eliminates need for software debouncing of overlapping keypresses. | Use Scenario: Converting decimal digit selection from rotary switches into BCD for 7-segment display driver ICs. IC Role / Device Role / Timing Role: Logic-level code translation block between user-input hardware and fixed-function display controllers. Use Value: Provides deterministic encoding with built-in priority resolution, reducing firmware overhead and eliminating race conditions in static digit selection. |
| Legacy System Interface Adapter | Diagnostic Panel Logic |
Use Scenario: Retrofitting modern microcontrollers into aging equipment with TTL-encoded front-panel controls. IC Role / Device Role / Timing Role: Level- and protocol-adaptive bridge between LSTTL switch matrices and 3.3 V/5 V MCU GPIOs. Use Value: Maintains electrical compatibility with original design while enabling digital signal conditioning and diagnostics via modern processors. | Use Scenario: Fault indicator panel with 10 discrete alarm inputs feeding a centralized status monitor. IC Role / Device Role / Timing Role: First-stage encoding of prioritized fault signals before serial transmission or LED mapping. Use Value: Ensures highest-priority alarm (e.g., overtemperature) always dominates display output, supporting fail-safe operator response. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar priority encoder applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LS147N | Bipolar TTL implementation; higher ICC (18 mA typical), slower propagation (45 ns typical), no implied zero encoding - requires external pull-ups | Designed for legacy TTL-only systems; not suitable for mixed-voltage or low-power designs | Select when maintaining strict TTL family consistency and board-level voltage rails are stable 5 V ±5 % |
| 74HC147D,653 | CMOS variant with identical pinout but HC-level input thresholds (VIH = 3.5 V min); higher noise margin but incompatible with 3 V TTL interfaces | Used where supply rail noise immunity is critical and all upstream sources meet HC input specs | Select when interfacing exclusively with 5 V CMOS or when lower quiescent current (< 4 µA) is mandatory |
Compared with SN74LS147N and 74HC147D,653, the 74HCT147D,653 uniquely balances TTL input compatibility, moderate speed (35 ns), and low power consumption (ICC < 8 µA), making it optimal for upgrading legacy systems while preserving signal integrity across mixed-logic environments.
Availability
74HCT147D,653 is available at Aetrix Electronics and suitable for industrial keypad encoders, BCD code converters, legacy system interface adapters, and diagnostic panel logic requiring stable component supply and long-term manufacturability.
Supply support for 74HCT147D,653 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert delivering high-performance, reliable logic, analog, and discrete components rooted in Philips' heritage of industrial-grade reliability and automotive qualification standards.
The 74HCT147D,653 belongs to Nexperia's 74HCT logic family, engineered specifically for seamless interoperability between 5 V TTL and modern CMOS systems in industrial control, instrumentation, and human-machine interface applications.
FAQ
What is the logic polarity of inputs and outputs on the 74HCT147D,653?
The 74HCT147D,653 uses active-LOW logic for both inputs and outputs: A0–A8 are active-LOW decimal inputs, and Y0–Y3 are active-LOW BCD outputs. This means a logic LOW on any input indicates assertion, and encoded values appear as LOWs on corresponding output lines - e.g., input A2 asserted yields Y1 and Y0 LOW (0010₂ = 2). This polarity is fixed and cannot be inverted internally.
Does the 74HCT147D,653 require external pull-up resistors on its inputs?
No, the 74HCT147D,653 does not require external pull-up resistors on its inputs when used with open-collector or mechanical switch sources. Its TTL-compatible inputs have defined thresholds (VIL ≤ 0.8 V, VIH ≥ 2.0 V), and internal structure allows direct connection to grounded switches. However, if inputs float, undefined states may occur - proper termination (pull-up or pull-down) remains a system-level design requirement outside the 74HCT147D,653 itself.
How does the 74HCT147D,653 handle the "zero" input condition?
The 74HCT147D,653 encodes "zero" implicitly: when all nine inputs A0–A8 are HIGH, all four outputs Y0–Y3 go HIGH. This is not a dedicated input pin but a functional outcome of the priority logic - no input is active, so the default encoded value is decimal 0 (BCD 0000), represented as HIGHs on all outputs. This behavior is confirmed in the function table and enables "no-key-pressed" detection in encoder applications.
Is the 74HCT147D,653 pin-compatible with the 74LS147?
Yes, the 74HCT147D,653 is pin-compatible with the 74LS147 and other members of the 74xx147 family, including identical pin numbering, function assignment, and SO16/DIP16 footprints. This allows direct replacement in existing layouts without PCB modification, provided supply voltage and loading conditions remain within HCT specifications (4.5–5.5 V, standard output drive).
What is the maximum clock/data rate supported by the 74HCT147D,653?
While the 74HCT147D,653 is combinational (not clocked), its usable data rate is governed by propagation delay: 35 ns typical (4.5 V, CL = 50 pF) implies a maximum reliable toggle rate near 10–12 MHz under ideal conditions. Real-world performance depends on input rise/fall times, load capacitance, and noise margins - for robust operation in switch encoding, frequencies below 1 MHz are recommended to ensure setup/hold stability and contact bounce tolerance.
74HCT147D,653 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- 74HCT
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Type:
- Priority Encoder
- Circuit:
- 1 x 10:4
- Independent Circuits:
- 1
- Current - Output High, Low:
- 4mA, 4mA
- Voltage Supply Source:
- Single Supply
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SO
74HCT147D,653 FAQ
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6.How does Aetrix verify that 74HCT147D,653 is sourced from the original manufacturer or authorized distributors?
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7.What is the process for return or replacement of 74HCT147D,653?
All 74HCT147D,653 units undergo pre-shipment inspection (PSI). If there is an issue with 74HCT147D,653, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74HCT147D,653 part is unused and in its original packaging.
Return procedure for 74HCT147D,653:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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