Nexperia USA Inc. 74HCT367PW,118
- Part No.:
- 74HCT367PW,118
- Manufacturer:
- Nexperia USA Inc.
- Package:
- 16-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
74HCT367PW,118.pdf
- Description:
- IC BUF NON-INVERT 5.5V 16TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:3,676
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Product details
Overview
74HCT367PW,118 from Nexperia is a hex non-inverting 3-state buffer/line driver with TTL-compatible inputs and CMOS outputs, operating from 4.5 V to 5.5 V supply, delivering 6.0 mA output drive at VCC = 4.5 V, and supporting industrial temperature range (−40 °C to +125 °C) in TSSOP16 package. It enables bidirectional bus isolation in microcontroller I/O expansion and address/data latching circuits.
For engineers reviewing the 74HCT367PW,118 datasheet, 74HCT367PW,118 pinout, 74HCT367PW,118 application, or 74HCT367PW,118 equivalent, key selection criteria include TTL-level input compatibility, 3-state enable timing (ten = 16–53 ns), propagation delay (tpd = 11–38 ns), low static current (ICC ≤ 160 μA), and thermal derating behavior above 91 °C.
Technical Context
The device implements six independent non-inverting buffers, each with active-low 3-state control via dedicated OE pins (1OE on Pin 1, 2OE on Pin 15). Input clamping diodes allow safe interfacing to voltages exceeding VCC when used with current-limiting resistors.
Its TTL-compatible input thresholds (VIL = 0.8 V max, VVIH = 2.0 V min at VCC = 4.5–5.5 V) ensure direct compatibility with legacy 5 V logic families, while CMOS output structure provides rail-to-rail swing and high noise immunity (≥ 400 mV noise margin at VCC = 5 V).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply voltage | 4.5 V to 5.5 V - ensures interoperability with standard 5 V TTL and mixed-voltage systems |
| Input logic type | TTL-level - accepts 0.8 V/2.0 V thresholds without level-shifting circuitry |
| Output drive | ±6.0 mA at VCC = 4.5 V - sufficient for driving 50 pF loads with <38 ns propagation delay |
| Propagation delay | 11 ns (typ) at VCC = 5.0 V, CL = 15 pF - supports >10 MHz bus operation in synchronous interfaces |
| 3-state enable time | 16–53 ns (−40 °C to +125 °C) - determines minimum bus turnaround latency in shared-data applications |
| Operating temperature | −40 °C to +125 °C - qualified for under-hood and industrial control environments |
| Power dissipation | 32 pF CPD per buffer - enables accurate dynamic power estimation (PD = CPD × VCC² × fi × N) |
Pinout & Package
TSSOP16 plastic thin shrink small outline package (SOT403-1), 16-pin, body width 4.4 mm, lead pitch 0.65 mm, exposed pad not present, RoHS-compliant, moisture sensitivity level MSL3.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 15 | 1OE, 2OE | Active-low 3-state enable inputs - each controls three outputs; LOW enables, HIGH disables (Z-state) |
| 2, 4, 6, 10, 12, 14 | 1A–6A | Buffer data inputs - non-inverting; accept TTL logic levels directly |
| 3, 5, 7, 9, 11, 13 | 1Y–6Y | Buffer outputs - CMOS-compatible, high-impedance when corresponding OE is HIGH |
| 8 | GND | Ground reference - must be connected to system 0 V plane with low-inductance path |
| 16 | VCC | Positive supply - decoupling capacitor (100 nF ceramic) required within 5 mm of pin |
Key Features
| Feature | Design Value |
|---|---|
| Wide supply tolerance | 4.5 V to 5.5 V - accommodates ±5 % regulation drift and board-level voltage drop |
| Input clamp diodes | Integrated - permits safe overvoltage input (e.g., 12 V signals) with external series resistor |
| High noise immunity | ≥ 400 mV at VCC = 5 V - reduces susceptibility to crosstalk and EMI in dense PCB layouts |
| Latch-up robustness | Exceeds 100 mA per JESD78 Class II Level B - prevents destructive latch-up during transient overvoltage events |
| ESD protection | HBM > 2000 V, CDM > 1000 V - meets IEC 61000-4-2 Level 2 for handling and assembly |
Applications
| Microcontroller I/O Expansion | Address/Data Bus Isolation |
|---|---|
Use Scenario: Expanding GPIO count of an ARM Cortex-M0+ MCU by adding parallel I/O ports via SPI/I²C port expanders. IC Role / Device Role / Timing Role: Bidirectional buffer isolating expander outputs from main processor bus; 3-state control synchronized with chip select. Use Value: Enables clean signal integrity on shared 8-bit data lines with <16 ns enable/disable skew between channels. | Use Scenario: Separating address and data lines in an 8051-based embedded controller with external memory interface. IC Role / Device Role / Timing Role: Unidirectional line driver for address bus segments; 3-state disabled during data read/write cycles. Use Value: Prevents bus contention during multiplexed AD bus operation, with tdis ≤ 53 ns ensuring setup compliance for 12 MHz access. |
| Industrial PLC Backplane Interface | Legacy System Signal Conditioning |
Use Scenario: Interfacing 24 V digital I/O modules to a 5 V logic backplane in modular automation controllers. IC Role / Device Role / Timing Role: Level-translating buffer with current-limiting resistor support; inputs driven via optocoupler outputs. Use Value: Clamp diodes allow direct connection to 24 V open-collector signals using 15 kΩ series resistors, eliminating discrete protection components. | Use Scenario: Replacing obsolete 74LS367 in maintenance upgrades of telecom line card control logic. IC Role / Device Role / Timing Role: Pin- and function-compatible drop-in replacement with lower power and wider VCC range. Use Value: Reduces quiescent current from ~15 mA (LS) to <0.2 mA (HCT), enabling thermal redesign without board rework. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar hex buffer/line driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74HCT367N | DIP-16 package, no thermal derating curve above 70 °C, higher package inductance | Suitable only for prototyping or through-hole production; lacks TSSOP's board-area efficiency | Select when manual soldering or socket-based testing is required |
| 74LVC367APW | 3.3 V only (1.65–3.6 V), 24 mA drive, faster tpd (3.4 ns typ), but incompatible with 5 V inputs | Requires level shifters for 5 V system integration; unsuitable for direct TTL replacement | Choose only in new 3.3 V designs prioritizing speed and low voltage over legacy compatibility |
Compared with SN74HCT367N and 74LVC367APW, the 74HCT367PW,118 uniquely balances 5 V TTL interoperability, TSSOP space savings, guaranteed −40 °C to +125 °C operation, and predictable thermal derating-making it optimal for volume industrial PCBs where footprint, reliability, and drop-in replacement matter.
Availability
74HCT367PW,118 is available at Aetrix Electronics and suitable for microcontroller I/O expansion, industrial PLC backplane interfaces, address/data bus isolation, and legacy system signal conditioning requiring stable component supply across extended temperature ranges.
Supply support for 74HCT367PW,118 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert specializing in high-volume, high-reliability logic, analog, and MOSFET solutions, headquartered in Nijmegen, Netherlands, with manufacturing in Asia and Europe.
The 74HCT series is designed for TTL-to-CMOS interfacing in industrial and automotive-adjacent applications, emphasizing robustness, wide temperature operation, and pin compatibility with legacy 74-series logic families.
FAQ
Can 74HCT367PW,118 operate at 3.3 V?
No. The 74HCT367PW,118 is specified only for 4.5 V to 5.5 V operation. At 3.3 V, input thresholds (VIL/VIH) fall outside guaranteed limits, and output drive degrades below specification. Use 74LVC367 for 3.3 V systems.
What is the maximum capacitive load this device can drive reliably?
It is characterized up to 50 pF (per output) with timing specs guaranteed. Driving >50 pF increases propagation delay and transition time nonlinearly; for 100 pF loads, add series termination or reduce edge rate via layout or RC filtering to maintain signal integrity.
Are the two OE pins internally connected?
No. Pins 1 (1OE) and 15 (2OE) are independent. 1OE controls outputs 1Y, 2Y, and 3Y; 2OE controls 4Y, 5Y, and 6Y. This allows partial bus segmentation-for example, enabling only upper/lower nibbles of a 16-bit bus.
Does this part have fail-safe inputs when VCC is unpowered?
Yes. Input clamp diodes allow safe biasing of inputs up to VCC + 0.5 V even with VCC = 0 V, provided input current is limited to ±20 mA. This prevents back-powering or damage during hot-swap or power sequencing scenarios.
74HCT367PW,118 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- 74HCT
- Package/Case:
- 16-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Logic Type:
- Buffer, Non-Inverting
- Number of Elements:
- 2
- Number of Bits per Element:
- 2, 4 (Hex)
- Input Type:
- -
- Output Type:
- 3-State
- Current - Output High, Low:
- 6mA, 6mA
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-TSSOP
74HCT367PW,118 FAQ
1.How can I place an order for 74HCT367PW,118 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74HCT367PW,118 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74HCT367PW,118 reliable?
The price and inventory of 74HCT367PW,118 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74HCT367PW,118 is usually 5 days.
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74HCT367PW,118 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74HCT367PW,118 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74HCT367PW,118?
For technical support, including 74HCT367PW,118 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74HCT367PW,118 requirements.
6.How does Aetrix verify that 74HCT367PW,118 is sourced from the original manufacturer or authorized distributors?
All 74HCT367PW,118 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74HCT367PW,118 meets industry standards.
7.What is the process for return or replacement of 74HCT367PW,118?
All 74HCT367PW,118 units undergo pre-shipment inspection (PSI). If there is an issue with 74HCT367PW,118, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74HCT367PW,118 part is unused and in its original packaging.
Return procedure for 74HCT367PW,118:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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