NXP Semiconductors 74HCT423D,118
- Part No.:
- 74HCT423D,118
- Manufacturer:
- NXP Semiconductors
- Category:
- Multivibrators
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
74HCT423D,118.pdf
- Description:
- IC MULTIVIBRATOR 22NS 16SO
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
74HCT423D,118 from NXP Semiconductors is a dual retriggerable monostable multivibrator with independent reset inputs, designed for precise pulse generation and extension in digital timing circuits. It features Schmitt-trigger inputs on A/B trigger pins, operates from 4.5 V to 5.5 V, supports −40 °C to +125 °C ambient range, and delivers output pulse widths scalable from nanoseconds to hundreds of microseconds via external REXT/CEXT. It is used in debounce circuits, event stretching, and programmable delay generators.
For engineers reviewing the 74HCT423D,118 datasheet, 74HCT423D,118 pinout, 74HCT423D,118 application, or 74HCT423D,118 equivalent, this device offers verified retriggerable timing control, direct active-LOW reset termination, dual independent channels, JEDEC 7A compliance, and SO16 packaging suitable for industrial-grade signal conditioning and logic timing systems.
Technical Context
The 74HCT423D,118 implements two independent CMOS monostable multivibrators, each with separate negative-edge (nA) and positive-edge (nB) trigger inputs, active-LOW reset (nRD), and complementary outputs (nQ/nQ). Its retriggerable architecture allows indefinite pulse extension by successive edge triggers before timeout - unlike non-retriggerable variants such as the 74HCT123.
Timing is externally set via resistor-capacitor networks connected to nREXT/CEXT and nCEXT pins; minimum pulse width is defined by REXT = 2 kΩ to 1000 kΩ and CEXT with no upper capacitance limit. Propagation delays are specified at 22–77 ns (VCC = 4.5–5.5 V), and all inputs except nRD include Schmitt-trigger hysteresis for noise immunity on slow-rising signals.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage | 4.5 V to 5.5 V - ensures compatibility with 5 V TTL logic families and stable operation across industrial voltage tolerances. |
| Operating Temperature | −40 °C to +125 °C - qualified for under-hood automotive, industrial control, and high-reliability embedded environments. |
| Propagation Delay | 22 ns (typ.) nA/nB → nQ at VCC = 5.0 V - enables sub-50 ns timing resolution for fast digital synchronization tasks. |
| Output Pulse Width Range | 75 ns to >450 μs - adjustable via external REXT/CEXT; supports both short glitch suppression and long event hold functions. |
| Input Hysteresis | Present on nA/nB only - provides ≥0.4 V hysteresis (VCC = 5 V), rejecting noise on mechanical switch inputs or slow microcontroller GPIO edges. |
| Reset Response Time | 22 ns (typ.) nRD → nQ at VCC = 5.0 V - guarantees deterministic forced output termination within one system clock cycle in real-time safety logic. |
| Power Dissipation Capacitance | 56 pF - used to calculate dynamic power (PD = CPD × VCC² × fi × N), critical for thermal budgeting in dense logic designs. |
Pinout & Package
74HCT423D,118 is supplied in a plastic small outline package (SO16), 16-pin, 3.9 mm body width (SOT109-1), with gull-wing leads and standard JEDEC MO-118 footprint. Pin 1 is marked by a notch or index area; the package is RoHS-compliant and rated for reflow soldering per J-STD-020.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 9 (1A, 2A) | Negative-edge trigger input | Accepts falling-edge transitions only; initiates or extends output pulse on HIGH→LOW transition. |
| 2, 10 (1B, 2B) | Positive-edge trigger input | Accepts rising-edge transitions only; enables flexible edge-sensitivity selection per channel. |
| 3, 11 (1RD, 2RD) | Active-LOW direct reset | Forces nQ = LOW / nQ = HIGH immediately and blocks further triggering until released. |
| 4, 12 (1Q, 2Q) | Active-LOW output | Complementary to nQ; sinks current when asserted - directly drives LEDs, MOSFET gates, or TTL inputs. |
| 5, 13 (1Q, 2Q) | Active-HIGH output | Complementary to nQ; sources current when asserted - interfaces with CMOS loads or pull-up-based logic. |
| 6, 14 (1CEXT, 2CEXT) | External capacitor connection | Connects timing capacitor to ground; value sets base time constant with REXT (no upper limit). |
| 7, 15 (1REXT/CEXT, 2REXT/CEXT) | External resistor/capacitor node | Joins external resistor and CEXT - defines monostable time constant tW ≈ 0.45 × REXT(kΩ) × CEXT(nF). |
| 8 | Ground (GND) | Reference 0 V return path for all internal circuitry and external timing components. |
| 16 | Supply voltage (VCC) | 5 V nominal supply; must be decoupled locally with 100 nF ceramic capacitor near pin. |
Key Features
| Feature | Design Value |
|---|---|
| Retriggerable dual monostable | Each channel independently extends its output pulse on successive nA/nB edges - eliminates need for external feedback logic in long-pulse applications. |
| Direct active-LOW reset | nRD forces immediate output state change and disables triggering - essential for fail-safe shutdown in motor control or power sequencing. |
| Schmitt-trigger inputs on nA/nB | Hysteresis rejects noise and accommodates slow-switching inputs (e.g., mechanical switches, RC-filtered signals) without external conditioning. |
| JEDEC Standard No. 7A compliance | Guarantees pin compatibility with LSTTL logic families - simplifies drop-in replacement in legacy 5 V systems. |
| ESD protection (HBM/MM) | HBM >2000 V and MM >200 V - reduces risk of handling damage during assembly and field service. |
Applications
| Switch Debounce | Programmable Delay Generator |
|---|---|
Use Scenario: Mechanical pushbutton or rotary encoder interfacing with microcontroller GPIO where contact bounce causes false interrupts. IC Role / Device Role / Timing Role: Monostable channel acts as hardware-based debouncer: single press generates one clean, fixed-duration pulse regardless of bounce count. Use Value: Eliminates software polling or timer-based debounce routines; reduces MCU firmware complexity and interrupt latency jitter. | Use Scenario: Generating adjustable delay between sensor trigger and actuator activation in industrial PLC I/O modules. IC Role / Device Role / Timing Role: One channel configured with REXT/CEXT to produce precise, repeatable delay; second channel used for status indication or cascade timing. Use Value: Provides analog-free, temperature-stable delay (±5 % over −40 °C to +125 °C) without requiring precision op-amps or microcontroller resources. |
| Event Stretching | Pulse Width Modulation Preconditioning |
Use Scenario: Extending short pulses from optical sensors or Hall-effect switches to meet minimum enable duration requirements of downstream drivers. IC Role / Device Role / Timing Role: Retriggerable mode allows incoming pulses shorter than tW to continuously extend the output - effectively "stretches" burst-mode signals into sustained logic levels. Use Value: Converts intermittent detection events into reliable enable signals for solenoids, relays, or gate drivers without FPGA or CPLD intervention. | Use Scenario: Conditioning narrow PWM pulses from motor controllers before feeding to analog comparators or ADC sampling windows. IC Role / Device Role / Timing Role: Configured to generate minimum-width "guard band" pulses that ensure consistent sampling window alignment and prevent aliasing in feedback loops. Use Value: Adds deterministic pulse width floor to variable-duty-cycle signals - improves closed-loop stability in servo and power converter applications. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar monostable multivibrator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 74HCT123D,118 | Non-retriggerable dual monostable; identical pinout and supply specs but lacks retrigger capability on nA/nB. | Suitable only for single-shot timing; cannot extend output pulse beyond initial tW. | Select when fixed-duration pulses are required and retriggering introduces risk of unintended extension. |
| SN74LV423DR | TI's LV-family variant; 2 V to 5.5 V supply, lower propagation delay (17 ns typ.), but no Schmitt-trigger inputs on A/B pins. | Requires clean, fast-rising trigger signals; unsuitable for noisy or slow-switching inputs without external conditioning. | Prefer for low-voltage mixed-signal systems where speed outweighs noise immunity needs. |
Compared with 74HCT423D,118, the 74HCT123D,118 offers simpler single-shot behavior but forfeits pulse extension, while SN74LV423DR trades Schmitt-trigger robustness for wider VCC range and faster response - making 74HCT423D,118 optimal for industrial debounce and retrigger-critical timing where input integrity is uncertain.
Availability
74HCT423D,118 is available at Aetrix Electronics and suitable for industrial control panels, automotive body electronics, and test equipment requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for 74HCT423D,118 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and IoT applications.
The 74HCT423D,118 belongs to NXP's legacy HC/HCT logic family, engineered for robust 5 V TTL-compatible operation with enhanced noise immunity and wide temperature resilience - targeting reliability-critical digital interface and timing subsystems.
FAQ
What is the minimum external timing capacitor value supported by the 74HCT423D,118?
The 74HCT423D,118 does not specify a minimum CEXT value; however, for stable operation with CEXT < 50 pF, a power-up reset pulse is recommended per Figure 14 in the datasheet. Typical designs use ≥100 pF to minimize sensitivity to stray capacitance and ensure predictable tW scaling with REXT. The 74HCT423D,118's inherent pin capacitance at nREXT/CEXT is 7 pF.
Can the 74HCT423D,118 be used with a 3.3 V supply?
No - the 74HCT423D,118 is specified only for 4.5 V to 5.5 V operation. Its TTL-compatible input thresholds (VIH = 2.0 V min, VIL = 0.8 V max at VCC = 5 V) and internal design require 5 V nominal supply. For 3.3 V systems, consider the 74LVC423 or SN74LV423, which are explicitly characterized down to 2 V.
How does retriggering affect the output pulse width of the 74HCT423D,118?
Each valid nA or nB edge occurring before the initial tW expires resets the internal timer, extending the output pulse by another full tW period. The 74HCT423D,118's retrigger time (trtrig) is 110 ns (typ.) at VCC = 5 V with REXT = 5 kΩ and CEXT = 0 pF - meaning successive triggers must be spaced ≥110 ns apart to guarantee extension. This enables duty cycles up to 100 %.
Is the 74HCT423D,118 pin-compatible with the 74HC423D?
Yes - the 74HCT423D,118 and 74HC423D share identical pinout, package (SO16/SOT109-1), and functional block diagram. The key difference is input threshold compatibility: 74HCT423D,118 accepts TTL-level inputs (VIH ≥ 2.0 V), while 74HC423D requires CMOS-level inputs (VIH ≥ 3.15 V at VCC = 4.5 V). Both drive the same output levels and support identical REXT/CEXT configurations.
What is the maximum recommended value for REXT in the 74HCT423D,118 timing network?
The 74HCT423D,118 specifies REXT up to 1000 kΩ at VCC = 5.0 V. Beyond this, leakage currents and noise susceptibility increase significantly, potentially causing erratic timing or failure to trigger. For stable operation above 100 kΩ, use metal-film resistors and shielded layout; values >500 kΩ should include guard traces and local decoupling to maintain accuracy within ±10 % over temperature.
74HCT423D,118 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- 74HCT
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Logic Type:
- Monostable
- Independent Circuits:
- 2
- Schmitt Trigger Input:
- No
- Propagation Delay:
- 22 ns
- Current - Output High, Low:
- 4mA, 4mA
- Voltage - Supply:
- 4.5 V ~ 5.5 V
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SO
74HCT423D,118 FAQ
1.How can I place an order for 74HCT423D,118 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74HCT423D,118 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
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5.How can I obtain technical support or documentation for 74HCT423D,118?
For technical support, including 74HCT423D,118 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74HCT423D,118 requirements.
6.How does Aetrix verify that 74HCT423D,118 is sourced from the original manufacturer or authorized distributors?
All 74HCT423D,118 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74HCT423D,118 meets industry standards.
7.What is the process for return or replacement of 74HCT423D,118?
All 74HCT423D,118 units undergo pre-shipment inspection (PSI). If there is an issue with 74HCT423D,118, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74HCT423D,118 part is unused and in its original packaging.
Return procedure for 74HCT423D,118:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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