NXP Semiconductors 74HCT7046AD/AUJ
- Part No.:
- 74HCT7046AD/AUJ
- Manufacturer:
- NXP Semiconductors
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
74HCT7046AD/AUJ.pdf
- Description:
- IC PHASE LOCK LOOP 16SO
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
74HCT7046AD/AUJ from NXP Semiconductors (formerly Philips) is a high-speed CMOS phase-locked-loop IC with integrated lock detector, dual phase comparators (XOR and edge-triggered JK), linear VCO, and demodulator output. It delivers 17 MHz typical VCO center frequency at 4.5 V, 50% duty-cycle VCO output, and ±20 mV demodulator offset - used in FM demodulation, tone decoding, and data synchronization circuits.
For engineers reviewing the 74HCT7046AD/AUJ datasheet, 74HCT7046AD/AUJ pinout, 74HCT7046AD/AUJ application, or 74HCT7046AD/AUJ equivalent, key selection criteria include VCO linearity (0.4%), temperature stability (0.15%/K), dual comparator flexibility, inhibit-controlled standby power, and compatibility with passive second-order loop filters.
Technical Context
The 74HCT7046AD/AUJ integrates a linear op-amp-based VCO requiring external R1/R2 and C1 for frequency tuning, with DEMOUT providing buffered replica of VCOIN voltage. Its two independent phase comparators - PC1 (XOR) and PC2 (edge-triggered up/down detector) - share SIGIN and COMPIN inputs but differ fundamentally in noise rejection, harmonic locking behavior, and ripple content at lock.
PC1 enables high-noise immunity and harmonic locking but requires 50% input duty cycles and exhibits 2fi ripple; PC2 provides zero-phase-error tracking across full VCO range, 3-state output for low filter dissipation, and no harmonic locking - with capture and lock ranges equal and filter-independent. The LD pin asserts HIGH when phase error falls within ±10°.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCO center frequency | 17 MHz typical at VCC = 4.5 V, R1 = 3 kΩ, C1 = 40 pF - sets PLL operating band for FM/FSK applications |
| VCO frequency linearity | 0.4% max - ensures accurate voltage-to-frequency conversion and stable motor-speed control |
| Temperature stability | 0.15%/K - minimizes drift over −40°C to +125°C ambient without active compensation |
| Duty factor (VCOOUT) | 50% ±1% - supports clean clock distribution and symmetric timing in digital systems |
| Demodulator offset | ±20 mV - enables precise DC-coupled VCOIN control without calibration overhead |
| Lock detector threshold | LD HIGH when phase error < ±10° - provides reliable lock indication for system state management |
| Input sensitivity (AC-coupled) | 15 mVp-p at 1 MHz - allows direct connection to low-level analog signal sources |
Pinout & Package
74HCT7046AD/AUJ is supplied in a 16-pin SOIC (Small Outline Integrated Circuit) package with standard 1.27 mm pitch, compliant with JEDEC MS-012AA. Pin numbering follows standard DIP/SOIC convention with pin 1 at top-left corner.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (LD) | Lock detector output | Active-HIGH open-drain signal indicating PLL phase lock; requires pull-up for logic interface |
| 2 (PC1OUT) | Phase comparator 1 output | XOR gate output feeding low-pass filter; average voltage proportional to phase difference |
| 3 (COMPIN) | Comparator input | Reference signal input shared by both PC1 and PC2; accepts DC- or AC-coupled signals |
| 4 (VCOOUT) | VCO output | 50% duty-cycle square wave; can drive COMPIN directly or feed external frequency divider |
| 5 (INH) | Inhibit control input | Active-HIGH TTL-compatible enable/disable for VCO and demodulator to reduce standby current |
| 6,7 (C1A, C1B) | VCO capacitor terminals | Differential connection points for external timing capacitor C1 (≥40 pF); defines VCO frequency range |
| 8 (GND) | Ground reference | Common return for digital, VCO, and demodulator sections; must be low-impedance |
| 9 (VCOIN) | VCO control input | Analog voltage input (1.1–3.4 V) controlling VCO frequency; buffered replica at DEMOUT (pin 10) |
| 10 (DEMOUT) | Demodulator output | High-impedance buffered copy of VCOIN; used for feedback monitoring or external filtering |
| 11,12 (R1, R2) | VCO resistor terminals | Connections for external timing resistors; R1 sets base frequency, R2 adds offset capability |
| 13 (PC2OUT) | Phase comparator 2 output | 3-state up/down detector output; drives low-pass filter only during phase correction |
| 14 (SIGIN) | Signal input | Primary input for PLL reference signal; self-biased for small-swing AC coupling or direct DC coupling |
| 15 (CLD) | Lock detector capacitor | Connection for external CLD capacitor (value per Fig.32); sets lock detection time constant |
| 16 (VCC) | Positive supply | 4.5–5.5 V for HCT logic compatibility; powers digital section (2.0–6.0 V) and VCO (3.0–6.0 V) |
Key Features
| Feature | Design Value |
|---|---|
| Dual selectable phase comparators | PC1 (XOR) for high-noise environments and harmonic locking; PC2 (edge-triggered JK) for zero-phase-error tracking and minimal filter dissipation |
| VCO-inhibit control | Active-HIGH INH pin disables VCO and demodulator, reducing quiescent ICC to ≤160 µA - critical for battery-powered tone decoders |
| Linear op-amp VCO architecture | Delivers 0.4% frequency linearity and ±20 mV DEMOUT offset - enables precision voltage-to-frequency conversion without trimming |
| Self-biasing SIGIN amplifier | Accepts AC-coupled signals as low as 15 mVp-p while maintaining linearity - eliminates external bias networks for sensor interfaces |
| Integrated lock detector | LD pin asserts HIGH within ±10° phase error window - provides deterministic lock status for microcontroller polling or interrupt triggering |
Applications
| FM Demodulation | Tone Decoding |
|---|---|
Use Scenario: Recovering audio from broadcast FM signals using a PLL-based quadrature demodulator circuit. IC Role / Device Role / Timing Role: 74HCT7046AD/AUJ acts as the core PLL with VCO locked to carrier; DEMOUT provides demodulated audio output. Use Value: 17 MHz VCO center frequency and 0.4% linearity ensure wideband audio fidelity and minimal distortion across 88–108 MHz band. | Use Scenario: Detecting DTMF or selective calling tones (e.g., 697 Hz, 1209 Hz) in telecommunication equipment. IC Role / Device Role / Timing Role: 74HCT7046AD/AUJ configured as narrowband PLL with PC2 for precise frequency discrimination and lock detection. Use Value: Dual comparator selection allows PC2 use for jitter-free tone recognition; LD output triggers decode confirmation without software timing loops. |
| Data Synchronization | Motor-Speed Control |
Use Scenario: Recovering clock and data from asynchronous serial streams in legacy industrial protocols. IC Role / Device Role / Timing Role: 74HCT7046AD/AUJ locks VCO to incoming data transitions; VCOOUT regenerates clean bit clock for sampling. Use Value: 50% ±1% VCOOUT duty cycle ensures balanced setup/hold margins; PC1's noise immunity maintains lock under EMI. | Use Scenario: Closed-loop speed regulation of DC motors using back-EMF frequency feedback. IC Role / Device Role / Timing Role: 74HCT7046AD/AUJ converts motor RPM (as frequency) into proportional control voltage via VCOIN–DEMOUT path. Use Value: 0.15%/K temperature stability prevents speed drift over operating range; linear VCO enables 1:1 V/rpm mapping. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar phase-locked-loop applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| CD74HC7046M | HC logic family; VIH/VIL thresholds referenced to VCC (not TTL); wider VCC range (2–6 V) but lower noise immunity | Lacks TTL-compatible input levels; unsuitable where 74HCT7046AD/AUJ interfaces with legacy 5 V TTL logic | Select only if system uses pure CMOS logic and requires extended supply range down to 2 V |
| SN74LV7046APW | LV family; 3.3 V nominal operation; lower propagation delay (15 ns vs 27 ns PC2 enable); no CLD pin or lock detector | No integrated lock detection; requires external comparator for lock status - increases BOM and layout complexity | Choose for 3.3 V systems prioritizing speed over lock monitoring; not drop-in compatible due to missing LD/CLD functionality |
Compared with CD74HC7046M and SN74LV7046APW, the 74HCT7046AD/AUJ uniquely combines TTL-compatible inputs, integrated lock detection with CLD capacitor support, and proven 17 MHz VCO performance - making it the only option supporting legacy 5 V designs with deterministic lock monitoring.
Availability
74HCT7046AD/AUJ is available at Aetrix Electronics and suitable for FM demodulation, tone decoding, data synchronization, motor-speed control, and voltage-to-frequency conversion applications requiring stable component supply and long-term industrial availability.
Supply support for 74HCT7046AD/AUJ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT applications.
The 74HCT7046AD/AUJ belongs to NXP's legacy 74HCT logic family, designed specifically for robust, low-power PLL implementations in analog-digital hybrid systems requiring TTL-level compatibility and analog tuning precision.
FAQ
What is the maximum VCO center frequency achievable with the 74HCT7046AD/AUJ?
The 74HCT7046AD/AUJ achieves a typical VCO center frequency of 17 MHz at VCC = 4.5 V, R1 = 3 kΩ, and C1 = 40 pF. This value is confirmed in the Quick Reference Data table (page 4) and supported by Figure 17. Higher frequencies require smaller C1 values (≥40 pF minimum) and optimized R1, but 17 MHz represents the validated upper limit under standard test conditions.
How does the 74HCT7046AD/AUJ differ from the standard 74HC7046 in terms of input compatibility?
The 74HCT7046AD/AUJ features TTL-compatible input thresholds (VIH = 2.0 V min, VIL = 0.8 V max at VCC = 4.5 V), enabling direct interfacing with legacy 5 V TTL logic families. In contrast, the 74HC7046 uses CMOS thresholds (VIH ≈ 3.15 V), requiring level-shifting when driven by TTL outputs. This distinction is explicitly stated in the General Description section (page 2).
Can the 74HCT7046AD/AUJ operate with a single supply voltage below 4.5 V?
Yes - the 74HCT7046AD/AUJ supports VCC from 4.5 V to 5.5 V per the Recommended Operating Conditions (page 9). Operation below 4.5 V is not specified for the HCT version; the HC variant supports 2.0–6.0 V, but the HCT variant's input thresholds are optimized for 4.5–5.5 V. Using 4.5 V ensures guaranteed VIH/VIL compliance and full 17 MHz VCO performance.
What external components are mandatory for basic 74HCT7046AD/AUJ PLL operation?
Four external components are mandatory: C1 (≥40 pF capacitor between pins 6 and 7), R1 (3–300 kΩ resistor from pin 11 to GND), CLD (capacitor from pin 15 to GND per Figure 32), and a pull-up resistor on LD (pin 1). R2 (pin 12) and RS (for DEMOUT) are optional, used only for frequency offset or demodulator monitoring.
Does the 74HCT7046AD/AUJ support both XOR and edge-triggered phase comparison simultaneously?
No - the 74HCT7046AD/AUJ contains two independent phase comparators (PC1 and PC2), but only one can be used at a time. PC1 output appears on pin 2; PC2 output on pin 13. The user selects which comparator feeds the low-pass filter based on application requirements (e.g., noise immunity vs. zero-phase error), as detailed in the Phase Comparators section (pages 2–3).
74HCT7046AD/AUJ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- 74HCT
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Phase Lock Loop (PLL)
- PLL:
- Yes
- Input:
- Clock
- Output:
- Clock
- Number of Circuits:
- 1
- Ratio - Input:Output:
- 2:3
- Differential - Input:Output:
- No/No
- Frequency - Max:
- 21MHz
- Divider/Multiplier:
- No/No
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 125°C
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 16-SO
74HCT7046AD/AUJ FAQ
1.How can I place an order for 74HCT7046AD/AUJ through Aetrix?
Please submit a Request for Quotation (RFQ) for 74HCT7046AD/AUJ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74HCT7046AD/AUJ reliable?
The price and inventory of 74HCT7046AD/AUJ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74HCT7046AD/AUJ is usually 5 days.
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Once your 74HCT7046AD/AUJ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74HCT7046AD/AUJ?
For technical support, including 74HCT7046AD/AUJ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74HCT7046AD/AUJ requirements.
6.How does Aetrix verify that 74HCT7046AD/AUJ is sourced from the original manufacturer or authorized distributors?
All 74HCT7046AD/AUJ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74HCT7046AD/AUJ meets industry standards.
7.What is the process for return or replacement of 74HCT7046AD/AUJ?
All 74HCT7046AD/AUJ units undergo pre-shipment inspection (PSI). If there is an issue with 74HCT7046AD/AUJ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74HCT7046AD/AUJ part is unused and in its original packaging.
Return procedure for 74HCT7046AD/AUJ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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