NXP Semiconductors 74HCT86PW,112
- Part No.:
- 74HCT86PW,112
- Manufacturer:
- NXP Semiconductors
- Category:
- Gates and Inverters
- Package:
- -
- Datasheet:
-
74HCT86PW,112.pdf
- Description:
- IC GATE XOR
- Quantity:
- Payment:

- Shipping:

Inventory:19,384
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
74HCT86PW,112 from Nexperia is a quad 2-input EXCLUSIVE-OR gate in TSSOP14 package, operating at 4.5 V to 5.5 V supply, delivering 17 ns typical propagation delay (VCC = 4.5 V, CL = 50 pF), TTL-compatible input thresholds, and rated for -40 °C to +125 °C industrial temperature range. It enables logic-level translation and parity generation in digital control subsystems.
For engineers reviewing the 74HCT86PW,112 datasheet, 74HCT86PW,112 pinout, 74HCT86PW,112 application, or 74HCT86PW,112 equivalent, this device serves as a drop-in replacement for legacy 74-series XOR gates where TTL-level inputs and low-power CMOS outputs are required in space-constrained PCB layouts.
Technical Context
The 74HCT86PW,112 implements four independent XOR logic functions with true complementary CMOS output stages, supporting rail-to-rail switching across its full operating voltage range. Its input clamp diodes allow safe interfacing to voltages exceeding VCC when used with current-limiting resistors.
It complies with JEDEC JESD7A (2.0 V–6.0 V) and JESD8C (2.7 V–3.6 V) standards, and features HBM ESD protection >2000 V and CDM >1000 V. The device exhibits latch-up immunity exceeding 100 mA per JESD78 Class II Level B.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Logic Function | Quad 2-input EXCLUSIVE-OR (XOR); each gate computes A ⊕ B = (A·B̅)+(A̅·B) |
| Supply Voltage Range | 4.5 V to 5.5 V - ensures compatibility with 5 V TTL systems and stable operation under ±5% rail tolerance |
| Propagation Delay | 17 ns typ (VCC = 4.5 V, CL = 50 pF) - supports reliable timing in ≤20 MHz synchronous logic paths |
| Input Thresholds | VIH = 2.0 V min, VIL = 0.8 V max - guarantees robust recognition of standard TTL logic levels |
| Output Drive | ±4.0 mA (VOH/VOL) - sufficient to drive 10 LS-TTL loads or directly interface with 74HC/74HCT inputs |
| Operating Temperature | -40 °C to +125 °C - qualified for extended industrial and under-hood automotive-adjacent environments |
| Power Dissipation | CPD = 30 pF - enables accurate dynamic power estimation: PD = 30 × VCC² × fin × N |
Pinout & Package
TSSOP14 plastic thin shrink small outline package (SOT402-1), 14-lead, body width 4.4 mm, 0.65 mm pitch, lead-free and RoHS compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 4, 9, 12 | Input A (nA) | First input of XOR gate n; accepts TTL-level signals; clamped to protect against overvoltage |
| 2, 5, 10, 13 | Input B (nB) | Second input of XOR gate n; identical electrical behavior to nA pins |
| 3, 6, 8, 11 | Output Y (nY) | CMOS-complementary output of gate n; drives high/low with symmetrical rise/fall times |
| 7 | GND | Ground reference (0 V) for all internal circuitry and I/O; must be low-impedance connection |
| 14 | VCC | Positive supply rail; decoupling capacitor (100 nF) recommended within 5 mm of this pin |
Key Features
| Feature | Design Value |
|---|---|
| TTL-compatible inputs | Accepts standard 0.8 V / 2.0 V logic thresholds - eliminates need for level-shifting in mixed 5 V TTL/CMOS systems |
| Clamp diode protection | Enables safe interface to signals up to VCC + 0.5 V using external current-limiting resistors |
| High noise immunity | Typical noise margin >1.2 V at VCC = 5 V - suppresses false triggering in electrically noisy industrial environments |
| Latch-up immunity | Exceeds 100 mA per JESD78 Class II Level B - prevents destructive parasitic SCR activation during transient events |
| Wide temperature range | Specified from -40 °C to +125 °C - supports deployment in uncontrolled enclosures and thermally stressed PCB zones |
Applications
| Parity Generator | Digital Comparator |
|---|---|
Use Scenario: Generating odd/even parity bits for 4-bit data words in UART or SPI communication links. IC Role / Device Role / Timing Role: Each XOR gate computes bit-wise exclusive-OR across two inputs; cascaded to produce final parity output. Use Value: Enables single-chip parity generation with <17 ns latency per stage, meeting sub-50 ns total timing budgets for 4 Mbps serial interfaces. | Use Scenario: Detecting equality between two 2-bit binary numbers in microcontroller peripheral address decoding. IC Role / Device Role / Timing Role: Two XOR gates compare corresponding bits; their outputs feed a NOR gate to assert match signal. Use Value: Provides deterministic 2-bit comparison with guaranteed setup/hold margins due to matched propagation delays across all four gates. |
| Control Signal Inverter | Phase Detection |
Use Scenario: Converting active-low enable signals to active-high in motor driver enable logic. IC Role / Device Role / Timing Role: One XOR gate configured as programmable inverter (B tied to logic HIGH) toggles A input polarity. Use Value: Eliminates discrete inverters while preserving nanosecond-level timing integrity and reducing board area by 75% vs. 74HCT04 solution. | Use Scenario: Detecting quadrature encoder phase relationship (A leading B vs. B leading A) in servo position feedback. IC Role / Device Role / Timing Role: XOR output transitions on rising edges of A and B; edge count direction indicates rotation sense. Use Value: Delivers deterministic phase detection with <32 ns max propagation skew between gates, enabling 100 kHz encoder sampling without metastability risk. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar XOR gate applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC86APW | 3.3 V only (1.65–3.6 V), lower VIL/VIH thresholds (0.7/1.7 V), 3.5 ns tpd at 3.3 V | Requires level-shifting in 5 V systems; unsuitable for direct TTL interface | Select when migrating to 3.3 V logic domains and higher speed is critical |
| 74HCT86D,653 | SO14 package (SOT108-1), same electrical specs, 1.27 mm lead pitch, larger footprint | Compatible with through-hole prototyping and legacy wave-solder processes | Select when board assembly uses SOIC footprints or requires higher thermal mass |
Compared with SN74LVC86APW and 74HCT86D,653, the 74HCT86PW,112 uniquely balances 5 V TTL interoperability, TSSOP space savings, and extended temperature resilience - making it optimal for modern industrial controllers where legacy signal compatibility and compact layout coexist.
Availability
74HCT86PW,112 is available at Aetrix Electronics and suitable for industrial PLC I/O modules, embedded motor control boards, and test equipment requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for 74HCT86PW,112 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on essential efficiency technologies, delivering high-performance logic, analog, and discrete components with industry-leading reliability and quality.
The 74HCT86PW,112 belongs to Nexperia's 74HCT logic family - engineered specifically for seamless integration between TTL-based legacy systems and modern CMOS-based control architectures.
FAQ
What is the maximum clock frequency supported by the 74HCT86PW,112?
The 74HCT86PW,112 is not a clocked device but a combinational logic gate. Its usable toggle rate depends on propagation delay and system timing margins. With 17 ns typical tpd and matched delays across gates, it reliably supports asynchronous signal paths up to ~20 MHz in well-designed PCB layouts with controlled trace lengths and proper decoupling.
Can the 74HCT86PW,112 drive a 50 pF capacitive load at 5 V?
Yes. The device is characterized with CL = 50 pF in its dynamic specifications, delivering 17 ns typical propagation delay and 7 ns typical transition time at VCC = 4.5 V. Output drive capability of ±4.0 mA ensures stable switching into 50 pF loads without waveform degradation or excessive rise/fall time increase.
Is the 74HCT86PW,112 pin-compatible with the 74HC86PW variant?
Yes - both share identical TSSOP14 (SOT402-1) pinout and pin functions. However, the 74HC86PW uses CMOS-level inputs (VIH = 3.15 V min at VCC = 4.5 V), whereas the 74HCT86PW uses TTL-level inputs (VIH = 2.0 V min). Swapping them requires verifying input source compatibility to avoid logic misreads.
Does the 74HCT86PW,112 require external pull-up or pull-down resistors on unused inputs?
Yes. Unused inputs must be terminated to VCC or GND to prevent floating states that cause increased ICC, noise susceptibility, and potential oscillation. For TTL-compatible behavior, tie unused inputs to VCC via 1 kΩ resistor or directly to GND - never leave open. This ensures static power consumption remains below 2 μA per unused input.
74HCT86PW,112 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- *
- Package/Case:
- -
- Packaging:
- Bulk
- Product Status:
- Active
- Logic Type:
- -
- Number of Circuits:
- -
- Number of Inputs:
- -
- Features:
- -
- Voltage - Supply:
- -
- Current - Quiescent (Max):
- -
- Current - Output High, Low:
- -
- Input Logic Level - Low:
- -
- Input Logic Level - High:
- -
- Max Propagation Delay @ V, Max CL:
- -
- Operating Temperature:
- -
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- -
- Supplier Device Package:
- -
74HCT86PW,112 FAQ
1.How can I place an order for 74HCT86PW,112 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74HCT86PW,112 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74HCT86PW,112 reliable?
The price and inventory of 74HCT86PW,112 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74HCT86PW,112 is usually 5 days.
3.What payment methods are accepted for 74HCT86PW,112?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74HCT86PW,112 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 74HCT86PW,112?
74HCT86PW,112 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74HCT86PW,112 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74HCT86PW,112?
For technical support, including 74HCT86PW,112 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74HCT86PW,112 requirements.
6.How does Aetrix verify that 74HCT86PW,112 is sourced from the original manufacturer or authorized distributors?
All 74HCT86PW,112 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74HCT86PW,112 meets industry standards.
7.What is the process for return or replacement of 74HCT86PW,112?
All 74HCT86PW,112 units undergo pre-shipment inspection (PSI). If there is an issue with 74HCT86PW,112, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74HCT86PW,112 part is unused and in its original packaging.
Return procedure for 74HCT86PW,112:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
74HCT86PW,112 Tags
-
SN74LVC1G14DBVR
Texas Instruments
-
SN74LVC1G14DCKR
Texas Instruments
-
SN74AHC1G14DBVR
Texas Instruments
-
SN74LVC1G08DBVR
Texas Instruments
-
SN74LVC1G08DCKR
Texas Instruments
-
SN74LVC1G32DCKR
Texas Instruments
-
SN74LVC1G04DBVR
Texas Instruments
.jpg)
-
74LVC1G08GW,125
Nexperia USA Inc.
-
SN74LVC1G04DCKR
Texas Instruments
-
SN74AHC1G08DBVR
Texas Instruments
-
SN74LVC1G32DBVR
Texas Instruments
-
SN74AHCT1G08DBVR
Texas Instruments
Tech Hub
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
LDO regulator guide covering low dropout voltage, power dissipation, thermal design, PSRR, output noise, capacitor stability, adjustable LDO circuits, LDO vs buck converter and datasheet selection chec…
Conditional Access Module guide covering CAM meaning, CI/CI+ interface, smart card authorization, DVB security workflow, TV and set-top box compatibility, internal electronics, ESD protection, connecto…
Guide to electronic component obsolescence covering EOL risk, PCN/PDN notices, last-time buy planning, replacement options, form-fit-function validation, counterfeit risk and BOM lifecycle management.
18650 battery guide covering lithium-ion cell basics, 3.6V/3.7V voltage, 4.2V charging, mAh and Wh capacity, protected cells, chargers, BMS, series-parallel packs, holders, welding and sourcing checks.…
Hall effect sensor guide covering working principle, linear and digital sensors, Arduino circuits, current sensing, speed detection, automotive applications, A3144 examples, signal filtering and datash…

