Nexperia USA Inc. 74LV123BQ,115

Overview

74LV123BQ,115 from Nexperia is a dual retriggerable monostable multivibrator with independent reset inputs, used for precise pulse generation and timing extension in digital control circuits. It operates from 1.0 V to 5.5 V, supports TTL-level inputs at VCC ≥ 2.7 V, delivers programmable output pulse widths (e.g., 450 µs typical with REXT = 10 kΩ, CEXT = 100 nF at 3.3 V), and features Schmitt-trigger inputs on A/B pins for noise immunity-commonly deployed in power sequencing, debounce, and event-stretching applications.

For engineers reviewing the 74LV123BQ,115 datasheet, 74LV123BQ,115 pinout, 74LV123BQ,115 application, or 74LV123BQ,115 equivalent, this device serves as a low-voltage, retriggerable timing element where pulse width extension, direct reset termination, and wide supply tolerance are critical selection criteria-not a generic logic gate or oscillator IC.

Technical Context

The 74LV123BQ implements two independent monostable circuits, each with separate negative-edge (nA) and positive-edge (nB) trigger inputs, a direct-reset input (nRD) that terminates output pulses on LOW-going edges, and dual complementary outputs (nQ active HIGH, nQ active LOW). Pulse width is externally set via REXT and CEXT per channel, with retriggering enabled during active output to extend duration indefinitely.

Schmitt-trigger action on nA/nB inputs ensures robust operation with slow-rising signals; clamp diodes allow interfacing to voltages exceeding VCC using current-limiting resistors; and the DHVQFN16 package (SOT763-1) provides thermal enhancement and space efficiency for high-density PCB layouts operating from –40 °C to +125 °C.

Key Specifications

Pinout & Package

DHVQFN16 package (SOT763-1): 2.5 mm × 3.5 mm × 0.85 mm body, no leads, thermally enhanced exposed pad (non-soldered or floating/VCC-connected), 16 terminals, pin 1 index marked.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar monostable multivibrator applications.

Compared with 74LVC123A and SN74LV123A, the 74LV123BQ uniquely combines DHVQFN thermal efficiency, input clamp diodes for overvoltage resilience, and guaranteed 1.0 V operation-making it optimal for compact, rugged, ultra-low-voltage timing designs where package size and interface flexibility are decisive.

Availability

74LV123BQ,115 is available at Aetrix Electronics and suitable for power sequencing control, switch debounce circuits, event duration extension, and watchdog timeout generation requiring stable component supply across automotive, industrial, and embedded computing programs.

Supply support for 74LV123BQ,115 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on essential efficiency technologies, delivering high-performance logic, analog, and discrete components with industry-leading reliability and energy efficiency.

The 74LV123BQ belongs to Nexperia's LV (Low Voltage) logic family, engineered specifically for robust, low-power timing and signal conditioning in battery-operated, automotive, and industrial systems operating down to 1.0 V.

FAQ

What is the minimum VCC required for functional operation of the 74LV123BQ,115?

The 74LV123BQ,115 is fully functional down to VCC = 1.0 V, with guaranteed static characteristics from 1.2 V to 5.5 V. At 1.0 V, it supports basic logic operation using GND- or VCC-referenced input levels, making it suitable for ultra-low-power energy harvesting or coin-cell applications where supply headroom is minimal.

Can the 74LV123BQ,115 generate asymmetric pulse widths on its two channels simultaneously?

Yes-each channel (1 and 2) has independent REXT/CEXT networks (pins 13/14 for channel 1; pins 2/4 for channel 2), allowing distinct pulse widths, retrigger behaviors, and reset responses. This enables dual-function timing such as staggered enable signals or independent debounce windows within one IC.

Is the exposed thermal pad on the DHVQFN16 package (SOT763-1) required to be soldered?

No-the exposed pad (terminal 1) has no electrical or mechanical requirement to be soldered. If soldered, it must remain electrically floating or be connected to VCC per Nexperia's recommendation; grounding it is not permitted and may impair thermal or electrical performance.

How does the 74LV123BQ,115 handle power-up glitches that could falsely trigger outputs?

At power-up, the 74LV123BQ,115 may produce an unintended output pulse due to internal state uncertainty. To suppress this, Nexperia recommends adding an RC network (e.g., 10 kΩ + 100 nF) to the nRD pin, holding it LOW until VCC stabilizes-ensuring both monostables remain reset until intentional triggering begins.