Nexperia USA Inc. 74LV123D,112

Overview

74LV123D,112 from Nexperia is a dual retriggerable monostable multivibrator with independent reset inputs, operating across 1.0 V to 5.5 V supply. It generates programmable output pulses via external REXT/CEXT networks (e.g., 450 µs typical at VCC = 3.3 V, REXT = 10 kΩ, CEXT = 100 nF), supports edge-triggered retriggering on both rising and falling edges at A/B inputs, and features Schmitt-trigger inputs for noise immunity in industrial timing control circuits.

For engineers reviewing the 74LV123D,112 datasheet, 74LV123D,112 pinout, 74LV123D,112 application, or 74LV123D,112 equivalent, this device serves as a low-voltage, temperature-stable pulse extender and delay generator in power sequencing, debounce, and event-synchronized timing systems where duty-cycle flexibility and direct reset termination are required.

Technical Context

The 74LV123D implements two independent monostable circuits, each with separate negative-edge (nA) and positive-edge (nB) trigger inputs, active-low direct reset (nRD), and complementary outputs (nQ/nQ). Pulse width is set externally via resistor-capacitor networks connected to nREXT/CEXT and nCEXT pins, enabling precise timing from nanoseconds to milliseconds.

Retriggering extends the output pulse indefinitely by applying subsequent trigger edges before timeout; reset interrupts the pulse immediately regardless of timing state. Schmitt-trigger action on nA/nB inputs ensures robust operation with slow-rising signals, while input clamp diodes allow safe interfacing to voltages exceeding VCC using current-limiting resistors.

Key Specifications

Pinout & Package

74LV123D,112 uses the SO16 plastic small outline package (SOT109-1), 16-pin, 3.9 mm body width, with standard 1.27 mm pitch. Pin 1 index located at top-left corner; pin 8 = GND, pin 16 = VCC.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar monostable multivibrator applications.

Compared with 74LV123D,112, the 74LVC123A offers faster propagation but sacrifices 5 V compatibility and extended temperature margin, while SN74LV123AD matches functionality but requires thermal reassessment above 110 °C ambient.

Availability

74LV123D,112 is available at Aetrix Electronics and suitable for industrial power sequencing, microcontroller input debounce, automotive wake-up conditioning, and legacy bus timing extension requiring stable component supply across extended temperature ranges.

Supply support for 74LV123D,112 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on essential efficiency-enhancing components, delivering high-performance, reliable, and scalable solutions for automotive, industrial, and consumer markets.

The 74LV123 belongs to Nexperia's LV logic family, engineered for low-voltage operation (1.0–5.5 V) and robust performance in harsh environments - specifically targeting timing-critical applications where retriggerability, reset control, and wide temperature resilience are mandatory.

FAQ

What is the minimum external capacitor value supported for stable pulse width generation?

The 74LV123D,112 does not specify a minimum CEXT value; however, for predictable timing below 100 ns, CEXT ≥ 10 pF is recommended. At CEXT = 0 pF and REXT = 5 kΩ, typical pulse width is 70 ns (VCC = 4.5–5.5 V). Lower capacitance increases sensitivity to parasitic effects, so layout best practices (short traces, ground plane) are essential.

Can both monostable sections be triggered simultaneously without interference?

Yes - the two monostable circuits in the 74LV123D,112 are fully independent. Triggering 1A/1B has no effect on 2A/2B timing, and vice versa. Outputs (1Q/1Q and 2Q/2Q) operate autonomously, allowing concurrent pulse generation with different REXT/CEXT values and independent reset control.

How does the reset input behave when used as a positive-edge trigger?

Pin nRD functions as an active-LOW reset when held LOW, terminating the output pulse immediately. When driven HIGH, it also accepts a LOW-to-HIGH transition as a positive-edge trigger - initiating a new pulse if the monostable is idle, or extending the current pulse if retriggerable mode is active.

Is external decoupling required for reliable operation at 5.5 V supply?

Yes - a 100 nF ceramic capacitor placed within 5 mm of VCC (Pin 16) and GND (Pin 8) is mandatory at all supply voltages, especially at 5.5 V, to suppress switching noise and ensure stable timing. Additional bulk capacitance (e.g., 1–10 µF tantalum) is recommended for systems with high-current loads sharing the same rail.