NXP Semiconductors 74LV123D/AUJ

Overview

74LV123D/AUJ from Nexperia is a dual retriggerable monostable multivibrator with independent reset inputs, operating across 1.0 V to 5.5 V supply. It delivers programmable pulse widths via external R_EXT/C_EXT networks (e.g., 450 µs at V_CC = 3.3 V, R_EXT = 10 kΩ, C_EXT = 100 nF), supports edge-triggered retriggering on both rising and falling edges, and features Schmitt-trigger inputs for noise immunity - used in timing control, debounce, and pulse extension circuits.

For engineers reviewing the 74LV123D/AUJ datasheet, 74LV123D/AUJ pinout, 74LV123D/AUJ application, or 74LV123D/AUJ equivalent, this page provides verified functional identity, SO16 package mapping, confirmed dynamic timing (t_pd ≤ 48 ns at 3.3 V), reset latency (≤ 45 ns), and validated alternatives for industrial timing and logic interface design.

Technical Context

The 74LV123D/AUJ implements two independent monostable circuits, each with separate A/B trigger inputs (negative- and positive-edge sensitive), direct reset (nRD), and complementary outputs (nQ/nQ). Pulse width is set by external R_EXT/C_EXT pairs connected to pins nREXT/CEXT and nCEXT, with inherent tolerance for slow input transitions due to Schmitt-trigger action on nA/nB.

Retriggering extends output pulses without requiring pulse termination; a LOW-going edge on nRD forces immediate output reset regardless of current state. Input clamp diodes allow interfacing to voltages exceeding V_CC when used with current-limiting resistors, and operation is guaranteed from −40 °C to +125 °C.

Key Specifications

Pinout & Package

74LV123D/AUJ is supplied in SO16 (SOT109-1) plastic small outline package: 16-pin, 3.9 mm body width, 1.27 mm pitch, surface-mount, RoHS-compliant.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar monostable multivibrator applications.

Compared with 74LVC123A, the 74LV123D/AUJ offers wider supply flexibility down to 1.0 V and superior low-voltage timing stability, while SN74LV123A provides identical form-fit-function compatibility with enhanced ESD margin - making it ideal for high-volume industrial designs requiring vendor diversification.

Availability

74LV123D/AUJ is available at Aetrix Electronics and suitable for industrial control systems, automotive body electronics, medical device timing circuits, and embedded instrumentation requiring stable component supply across extended temperature and voltage ranges.

Supply support for 74LV123D/AUJ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on essential efficiency technologies - delivering high-performance, reliable standard products including logic, discrete, and MOSFET solutions.

The 74LV123D/AUJ belongs to Nexperia's LV logic family, engineered specifically for low-voltage, high-noise-immunity applications in automotive, industrial, and consumer systems where robust timing and wide V_CC operation are critical.

FAQ

What is the minimum supply voltage at which 74LV123D/AUJ guarantees functional operation?

The 74LV123D/AUJ guarantees full functionality down to 1.0 V supply voltage, with input thresholds scaled accordingly (e.g., V_IL ≤ 0.3 V at V_CC = 1.2 V). Static characteristics are specified from 1.2 V, but the device operates reliably at 1.0 V in real-world applications such as battery-backed sensors and ultra-low-power IoT nodes - confirmed in Section 8 of the official Nexperia datasheet Rev. 11.

Can 74LV123D/AUJ generate asymmetric output waveforms, and how is that achieved?

Yes, 74LV123D/AUJ produces complementary outputs (nQ and nQ) with inherent asymmetry: nQ is active LOW and nQ is active HIGH, enabling direct drive of both high-side and low-side logic paths. Pulse width is identical on both outputs, but polarity differs - allowing direct interface to RS-232 line drivers, H-bridge enable logic, or differential clock distribution without external inverters.

How does the retriggering behavior of 74LV123D/AUJ differ from non-retriggerable monostables like the 74LV121?

Unlike the 74LV121, the 74LV123D/AUJ allows new trigger events (on nA or nB) to extend an already-active output pulse - effectively resetting the internal timing capacitor discharge cycle. This enables continuous pulse stretching up to 100 % duty factor, whereas non-retriggerable devices ignore subsequent triggers until the initial pulse completes. This behavior is explicitly defined in Table 3 (Function Table) and Fig. 10 of the datasheet.

Is external capacitor CEXT mandatory for 74LV123D/AUJ operation, or can it function with REXT only?

CEXT is mandatory: the 74LV123D/AUJ requires both external REXT and CEXT to define pulse width. The internal timing circuit relies on the RC time constant; omitting CEXT results in undefined or unstable output behavior. Minimum CEXT is not specified, but practical use starts at ~10 pF (Section 10, Table 7), and grounding pins 14 (1CEXT) and 6 (2CEXT) to GND is recommended for noise reduction per Figure 7.

Does 74LV123D/AUJ support mixed-voltage interfacing, and what design precautions apply?

Yes - 74LV123D/AUJ supports mixed-voltage interfacing via input clamp diodes. When driving inputs from voltages exceeding V_CC, a series current-limiting resistor must be used to restrict IIK to ≤ ±20 mA (Table 4). For example, a 5 V microcontroller GPIO can safely drive 74LV123D/AUJ at V_CC = 3.3 V using a 220 Ω resistor - verified in Section 1, General Description and Table 4 Limiting Values.