Nexperia USA Inc. 74LV123DB,118

Overview

74LV123DB,118 from Nexperia is a dual retriggerable monostable multivibrator with independent reset inputs, used for programmable pulse generation and timing extension in digital control logic. It operates from 1.0 V to 5.5 V, supports TTL-level inputs at VCC ≥ 2.7 V, features Schmitt-trigger inputs on A/B pins, and delivers active-HIGH/active-LOW complementary outputs per channel. Typical applications include debounce circuits, pulse stretching in industrial I/O modules, and programmable delay generation in sensor interface subsystems.

For engineers reviewing the 74LV123DB,118 datasheet, 74LV123DB,118 pinout, 74LV123DB,118 application, or 74LV123DB,118 equivalent, key selection criteria include its dual-channel retriggerability, external REXT/CEXT timing configuration, −40 °C to +125 °C operating range, SO16 (SOT109-1) package compatibility, and direct reset functionality with LOW-going edge sensitivity.

Technical Context

The 74LV123DB,118 implements two independent monostable multivibrators, each with separate negative-edge (nA) and positive-edge (nB) trigger inputs, a direct reset input (nRD), and complementary outputs (nQ/nQ). Pulse width is externally set via resistor-capacitor networks connected to nREXT/CEXT and nCEXT pins, enabling precise timing from ~70 ns to >470 µs depending on VCC and component values.

Each channel supports retriggering during an active output pulse to extend duration indefinitely-up to 100 % duty factor-while a LOW-going edge on nRD forces immediate termination. Schmitt-trigger action on nA/nB inputs ensures robust operation with slow-rising signals, and internal clamp diodes allow interfacing to voltages exceeding VCC when used with current-limiting resistors.

Key Specifications

Pinout & Package

74LV123DB,118 is packaged in SO16 (SOT109-1): plastic small outline, 16-pin, 3.9 mm body width, standard 1.27 mm pitch, lead-free and RoHS-compliant.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar monostable multivibrator applications.

Compared with SN74LV123AD and 74LVC123APW,118, the 74LV123DB,118 uniquely balances ultra-wide VCC (1.0–5.5 V), industry-leading low ICC (20 μA max), and full −40 °C to +125 °C qualification-making it optimal for multi-rail industrial controllers where voltage flexibility and power efficiency are jointly critical.

Availability

74LV123DB,118 is available at Aetrix Electronics and suitable for industrial motor control, automotive body electronics, and medical diagnostic equipment requiring stable component supply across extended temperature ranges and mixed-voltage architectures.

Supply support for 74LV123DB,118 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on essential efficiency technologies, delivering high-performance, reliable discrete, logic, and MOSFET solutions for automotive, industrial, and consumer markets.

The 74LV123DB,118 belongs to Nexperia's LV logic family-designed specifically for low-voltage, high-noise-immunity digital interfacing in harsh environments where wide supply tolerance and robust timing control are mandatory.

FAQ

What is the minimum external capacitor value required for stable operation?

The datasheet specifies no lower limit for CEXT; however, for predictable pulse width accuracy and noise immunity, CEXT ≥ 100 pF is recommended. At CEXT < 10 pF, inherent pin capacitance (~7 pF at nREXT/CEXT) dominates timing, increasing variation. For sub-100 ns pulses, use CEXT = 100 pF with REXT = 2 kΩ (VCC = 3.3 V) to achieve ~80 ns tW with ±15 % tolerance.

Can both channels be triggered simultaneously without interference?

Yes-channels are fully electrically isolated. Triggering nA1/nB1 and nA2/nB2 concurrently produces independent output pulses with no crosstalk, verified by functional testing across −40 °C to +125 °C. Propagation delays remain within spec (e.g., tpd = 25 ns typ. at VCC = 3.3 V for both), and reset assertions on nRD1/nRD2 affect only their respective channels.

How does the reset input behave during power-up?

nRD is active-LOW and asynchronous; if left floating or pulled HIGH during power-up, the device may generate an unintended output pulse due to internal metastability. To prevent this, tie nRD to VCC via a 10 kΩ resistor and add a 100 nF capacitor from nRD to GND (per Fig. 12), ensuring nRD remains HIGH until VCC stabilizes above 1.0 V.

Is the SO16 package (SOT109-1) pin-compatible with other 74LV123 variants?

Yes-the 74LV123DB,118 (SO16/SOT109-1), 74LV123PW (TSSOP16/SOT403-1), and 74LV123BQ (DHVQFN16/SOT763-1) share identical pin numbering and signal mapping per Table 2. Mechanical footprint differs, but PCB layout can be adapted using compatible land patterns; thermal and EMI performance vary by package type.