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Nexperia USA Inc. 74LV164BQ,115
- Part No.:
- 74LV164BQ,115
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Shift Registers
- Package:
- 14-VFQFN Exposed Pad
- Datasheet:
-
74LV164BQ,115.pdf
- Description:
- IC 8BIT SHIFT REGISTER 14DHVQFN
- Quantity:
- Payment:
- Shipping:
Inventory:8,760
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Product details
Overview
74LV164BQ,115 from Nexperia is an 8-bit serial-in/parallel-out CMOS shift register with dual gated serial inputs (DSA, DSB), asynchronous master reset (MR), and 8 parallel outputs (Q0–Q7). It operates from 1.0 V to 5.5 V, shifts on LOW-to-HIGH clock edge, and is rated for -40 °C to +125 °C. Used in LED matrix drivers, I/O expansion, and address latching in low-voltage microcontroller systems.
For engineers reviewing the 74LV164BQ,115 datasheet, 74LV164BQ,115 pinout, 74LV164BQ,115 application, or 74LV164BQ,115 equivalent, key selection factors include its dual-input gating logic, 1.0 V minimum supply compatibility, asynchronous MR assertion timing, and DHVQFN14 thermal-enhanced package suitability for space-constrained PCBs.
Technical Context
The device implements a synchronous 8-stage shift register with edge-triggered clock (CP) and active-low asynchronous reset (MR). Data enters serially via either DSA or DSB, with the other input acting as an enable-only one input may be HIGH while the other is LOW to allow data entry.
Its CMOS architecture ensures low static current (≤160 μA at VCC = 5.5 V), rail-to-rail output swing, and TTL-level compatibility at VCC ≥ 2.7 V. Input clamp diodes support overvoltage-tolerant interfacing when used with current-limiting resistors.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 1.0 V to 5.5 V - enables direct interface with 1.2 V, 1.8 V, 2.5 V, 3.3 V, and 5 V logic domains without level translation. |
| Operating Temperature | -40 °C to +125 °C - qualified for industrial and extended-temperature embedded control applications. |
| Propagation Delay (tpd) | 12 ns at VCC = 3.3 V, CL = 15 pF - supports >70 MHz clock rates in high-speed serial-to-parallel conversion paths. |
| Output Drive Strength | ±12 mA at VCC = 3.0 V - sufficient to directly drive LEDs or standard CMOS/TTL loads without external buffers. |
| Input Clamp Current | ±20 mA - allows safe interfacing to signals exceeding VCC when used with series current-limiting resistors. |
| Power Dissipation Capacitance | 40 pF at VCC = 3.3 V - enables accurate dynamic power estimation (PD = CPD × VCC² × fi × N) for thermal design. |
Pinout & Package
DHVQFN14 (SOT762-1) package: 2.5 mm × 3.0 mm × 0.85 mm body, no leads, exposed thermal pad (non-soldered by default), 14 terminals in quad arrangement with terminal 1 index area.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (DSA) | Data input SA | Primary serial data input; enabled only when DSB = LOW - used for daisy-chained data flow control. |
| 2 (DSB) | Data input SB | Secondary serial data input; acts as enable for DSA when HIGH - supports dual-source serial injection. |
| 3 (Q0) | Parallel output 0 | LSB of shifted data; updates on rising CP edge after reset or shift cycle completion. |
| 4 (Q1) | Parallel output 1 | Second bit of parallel output bus; phase-aligned with Q0–Q7 for synchronous readout. |
| 5 (Q2) | Parallel output 2 | Third bit; maintains consistent timing skew ≤1 ns across all Q0–Q7 outputs per datasheet Fig. 4. |
| 6 (Q3) | Parallel output 3 | Fourth bit; shares same output structure and drive capability as Q0–Q2 and Q4–Q7. |
| 7 (GND) | Ground reference | 0 V return path for all internal logic and output stages; must be low-impedance for stable VOL/VOLP. |
| 8 (CP) | Clock input | Edge-triggered input; rising edge advances shift register - requires clean, monotonic transition per tW ≥ 5 ns. |
| 9 (MR) | Master reset | Asynchronous active-LOW input; forces all Q0–Q7 LOW immediately, independent of CP or data state. |
| 10 (Q4) | Parallel output 4 | Fifth bit; electrically identical to Q0–Q3 and Q5–Q7 in VOH/VOL, drive strength, and capacitive load handling. |
| 11 (Q5) | Parallel output 5 | Sixth bit; supports fan-out of ≥10 LVTTL loads at VCC = 3.3 V without degradation. |
| 12 (Q6) | Parallel output 6 | Seventh bit; maintains <0.8 V ground bounce (VOLP) at VCC = 3.3 V, Tamb = 25 °C per spec. |
| 13 (Q7) | Parallel output 7 | MSB of parallel output; updated last in shift sequence - critical for end-of-frame detection in display drivers. |
| 14 (VCC) | Supply voltage | Positive supply rail; decoupling capacitor (100 nF) required within 3 mm for stable switching performance. |
Key Features
| Feature | Design Value |
|---|---|
| Wide supply range | 1.0 V to 5.5 V operation - eliminates need for separate voltage rails in mixed-supply systems. |
| Gated serial inputs | DSA/DSB dual-input logic enables selective data routing without external AND gates or control logic. |
| Asynchronous master reset | MR asserts independently of clock - guarantees deterministic initialization in safety-critical startup sequences. |
| Low-voltage optimized | Guaranteed function down to 1.0 V with full static/dynamic specs - supports ultra-low-power battery-operated designs. |
| ESD robustness | HBM >2000 V, CDM >1000 V - reduces risk of field failure during handling and board assembly. |
Applications
| LED Matrix Driver | I/O Port Expander |
|---|---|
|
Use Scenario: Driving 8×8 monochrome LED displays using microcontroller GPIO-limited interfaces. IC Role / Device Role / Timing Role: Serial-to-parallel converter that translates SPI-like bitstream into parallel column/row enable signals synchronized to CP. Use Value: Reduces MCU pin count from 16 (8 row + 8 column) to 3 (CP, DSA, MR), enabling compact display subsystems. |
Use Scenario: Adding 8 general-purpose digital outputs to an ARM Cortex-M0+ MCU with only 4 spare GPIOs. IC Role / Device Role / Timing Role: Synchronous output latch that accepts serial configuration and presents stable parallel outputs after CP edge. Use Value: Enables deterministic output update timing with <12 ns propagation delay, avoiding metastability in real-time control loops. |
| Address Latch for Legacy Peripherals | Serial Data Buffering |
|
Use Scenario: Latching 8-bit address bus segments for memory-mapped peripherals in 8-bit microcontroller systems. IC Role / Device Role / Timing Role: Edge-triggered address register that captures and holds address bits during bus cycles. Use Value: Eliminates need for external address latches with separate enable logic - simplifies timing closure for 100 ns bus cycles. |
Use Scenario: Temporarily storing serial sensor data (e.g., from UART-connected temperature ICs) before parallel readout by host processor. IC Role / Device Role / Timing Role: First-in-first-out buffer stage with MR-initiated clear and CP-synchronized load. Use Value: Provides glitch-free data staging with guaranteed 0-state reset - prevents spurious outputs during power-up or reconfiguration. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 8-bit serial-in/parallel-out shift register applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LV164APWR | TSSOP14 package (SOT402-1); identical electrical specs but 4.4 mm body width and higher thermal resistance (7.3 mW/K derating above 81 °C). | Better suited for hand-soldering or legacy TSSOP footprints; less optimal for high-density thermal management. | Select when board layout uses TSSOP14 land pattern or manual assembly is required. |
| 74HC164PW,118 | Higher VCC min = 2.0 V; slower tpd = 29 ns at VCC = 4.5 V; no 1.0 V operation or input clamp diodes. | Not suitable for sub-2.0 V systems; lacks overvoltage tolerance - requires strict VI compliance. | Choose only if existing 74HC design reuse is mandatory and supply stays ≥2.0 V with controlled input voltages. |
Compared with SN74LV164APWR, the 74LV164BQ,115 offers superior thermal performance in compact layouts due to DHVQFN14's lower junction-to-board resistance, while versus 74HC164PW,118 it enables true single-supply 1.0 V–5.5 V interoperability and robust input interfacing.
Availability
74LV164BQ,115 is available at Aetrix Electronics and suitable for LED display drivers, microcontroller I/O expansion, address latching, and serial data buffering requiring stable component supply across industrial temperature ranges.
Supply support for 74LV164BQ,115 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on essential efficiency technologies, delivering high-performance logic, analog, and MOSFET solutions for automotive, industrial, and consumer markets.
The 74LV164BQ,115 belongs to Nexperia's LV (Low-Voltage) logic family, designed specifically for energy-efficient, wide-supply-range digital interfacing in space- and power-constrained embedded systems.
FAQ
What is the minimum supply voltage at which 74LV164BQ,115 guarantees full functionality?
The 74LV164BQ,115 is fully specified and guaranteed to operate down to 1.0 V, including all static and dynamic parameters such as VIH/VIL thresholds, propagation delay, and output drive strength - unlike standard HC or HCT families that require ≥2.0 V.
Can DSA and DSB both be driven HIGH simultaneously?
No - driving both DSA and DSB HIGH violates the functional table condition for valid shift operation. The device enters a "no-shift" state where Q0–Q7 retain prior values regardless of CP edges; this is not a fault condition but a defined hold mode per Table 3.
Is the exposed thermal pad on the DHVQFN14 package required to be soldered?
No - per datasheet note, the thermal pad has no electrical or mechanical requirement to be soldered. If soldered, it must remain floating or be connected to VCC; grounding it may cause undefined behavior or increased leakage.
How does the 74LV164BQ,115 handle input signals exceeding VCC?
Internal clamp diodes on all inputs permit safe interfacing to voltages up to VCC + 0.5 V when used with external current-limiting resistors, limiting input current to ±20 mA per IEC 60134 absolute maximum ratings - enabling direct connection to higher-voltage buses.
74LV164BQ,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- 74LV
- Package/Case:
- 14-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Logic Type:
- Shift Register
- Output Type:
- Push-Pull
- Number of Elements:
- 1
- Number of Bits per Element:
- 8
- Function:
- Serial to Parallel
- Voltage - Supply:
- 1V ~ 5.5V
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-DHVQFN (2.5x3)
74LV164BQ,115 FAQ
1.How can I place an order for 74LV164BQ,115 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74LV164BQ,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74LV164BQ,115 reliable?
The price and inventory of 74LV164BQ,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74LV164BQ,115 is usually 5 days.
3.What payment methods are accepted for 74LV164BQ,115?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74LV164BQ,115 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 74LV164BQ,115?
74LV164BQ,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74LV164BQ,115 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74LV164BQ,115?
For technical support, including 74LV164BQ,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74LV164BQ,115 requirements.
6.How does Aetrix verify that 74LV164BQ,115 is sourced from the original manufacturer or authorized distributors?
All 74LV164BQ,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74LV164BQ,115 meets industry standards.
7.What is the process for return or replacement of 74LV164BQ,115?
All 74LV164BQ,115 units undergo pre-shipment inspection (PSI). If there is an issue with 74LV164BQ,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74LV164BQ,115 part is unused and in its original packaging.
Return procedure for 74LV164BQ,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
74LV164BQ,115 Tags
-
SN74HC164DR
Texas Instruments
-
SN74HC595DR
Texas Instruments
-
74HC595PW,118
Nexperia USA Inc.
-
SN74HC165PWR
Texas Instruments
-
HEF4094BT,653
Nexperia USA Inc.
-
74HC595D,118
Nexperia USA Inc.
-
SN74HC595PWR
Texas Instruments
-
74HC165D,653
Nexperia USA Inc.
-
SN74LV165APWR
Texas Instruments
-
74HC595BQ,115
Nexperia USA Inc.
-
74HC165BQ,115
Nexperia USA Inc.
-
CD4094BPWR
Texas Instruments
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