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NXP Semiconductors 74LV164D,112
- Part No.:
- 74LV164D,112
- Manufacturer:
- NXP Semiconductors
- Category:
- Shift Registers
- Package:
- -
- Datasheet:
-
74LV164D,112.pdf
- Description:
- IC 8BIT SHIFT REGISTER 14SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:2,853
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Product details
Overview
74LV164D,112 from Nexperia is an 8-bit serial-in/parallel-out CMOS shift register with dual gated serial inputs (DSA, DSB), asynchronous master reset (MR), and edge-triggered clock (CP). It operates from 1.0 V to 5.5 V, delivers 12 ns propagation delay at 3.3 V/15 pF, and supports industrial temperature range (−40 °C to +125 °C) in SO14 package. Used for LED matrix expansion, GPIO port extension, and serial-to-parallel data conversion in low-voltage embedded control systems.
For engineers reviewing the 74LV164D,112 datasheet, 74LV164D,112 pinout, 74LV164D,112 application, or 74LV164D,112 equivalent, key selection criteria include supply voltage flexibility (1.0–5.5 V), dual-input gating logic, asynchronous reset behavior, and SO14 thermal derating (10.1 mW/K above 100 °C).
Technical Context
The 74LV164D implements a synchronous 8-stage shift register with independent serial data enable logic: either DSA or DSB can serve as active-HIGH gate for the other input, enabling flexible serial data routing. Data shifts on LOW-to-HIGH CP transition, and MR forces all Q0–Q7 outputs LOW asynchronously.
Its CMOS architecture ensures low static current (≤160 μA at 5.5 V), TTL-level compatibility at VCC = 2.7–3.6 V, and robust ESD protection (HBM >2000 V, CDM >1000 V). Input clamp diodes allow safe interfacing to voltages exceeding VCC when used with current-limiting resistors.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Function | 8-bit serial-in/parallel-out shift register with gated dual data inputs and asynchronous reset |
| Supply Voltage Range | 1.0 V to 5.5 V - enables direct interface with 1.2 V, 1.8 V, 2.5 V, 3.3 V, and 5 V logic domains |
| Propagation Delay (tpd) | 12 ns at VCC = 3.3 V, CL = 15 pF - supports ≥78 MHz clock operation for high-throughput serial loading |
| Operating Temperature | −40 °C to +125 °C - qualified for under-hood automotive modules and industrial motor controllers |
| Input Compatibility | TTL-level inputs accepted at VCC = 2.7–3.6 V - eliminates level-shifter requirement in mixed-voltage systems |
| ESD Protection | HBM >2000 V, CDM >1000 V - reduces need for external transient suppression in board-level ESD zones |
| Power Dissipation | 500 mW max at Tamb ≤100 °C (SO14); derates 10.1 mW/K above - defines heatsink/no-heatsink boundary in compact enclosures |
Pinout & Package
74LV164D,112 is housed in SO14 (SOT108-1) plastic small outline package: 14-lead, 3.9 mm body width, 1.27 mm lead pitch, 8.75 mm length, 3.9 mm width, 1.75 mm height. Pin 1 index located at top-left corner with notch or bevel.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (DSA) | Serial data input A | Primary serial input; gated by DSB - when DSB = HIGH, DSA data shifts on CP rising edge |
| 2 (DSB) | Serial data input B | Secondary serial input; acts as enable for DSA - when DSA = HIGH, DSB data shifts on CP rising edge |
| 3 (Q0) | Parallel output 0 | LSB of 8-bit parallel output bus; updated after first CP rising edge following valid serial load |
| 4 (Q1) | Parallel output 1 | Second bit of parallel output; reflects serial input shifted one position after Q0 |
| 5 (Q2) | Parallel output 2 | Third bit of parallel output; provides deterministic timing offset relative to Q0 for cascaded register alignment |
| 6 (Q3) | Parallel output 3 | Fourth bit of parallel output; used in 4-bit nibble-aligned display driver interfaces |
| 7 (GND) | Ground reference | 0 V return path for all internal logic and output drivers; must be low-impedance for stable VOL/VOLP |
| 8 (CP) | Clock input | Rising-edge triggered; LOW-to-HIGH transition advances shift register - critical for setup/hold timing validation |
| 9 (MR) | Master reset | Asynchronous active-LOW input; forces Q0–Q7 = LOW regardless of CP or data state - essential for power-on initialization |
| 10 (Q4) | Parallel output 4 | Fifth bit of parallel output; supports 8-bit segmented LED column driving without external latching |
| 11 (Q5) | Parallel output 5 | Sixth bit of parallel output; enables full 8-bit parallel readback in microcontroller GPIO expansion |
| 12 (Q6) | Parallel output 6 | Seventh bit of parallel output; used in bidirectional shift register daisy-chains via Q7→DSA interconnect |
| 13 (Q7) | Parallel output 7 | MSB of parallel output; provides serial output for cascading multiple 74LV164 devices into longer word lengths |
| 14 (VCC) | Supply voltage | Positive supply rail (1.0–5.5 V); powers all internal logic and output drivers - decoupling capacitor required within 10 mm |
Key Features
| Feature | Design Value |
|---|---|
| Dual-gated serial inputs | DSA and DSB provide hardware-selectable serial data path without software overhead or external logic |
| Wide VCC range (1.0–5.5 V) | Eliminates level translation between 1.2 V FPGA I/O banks and 5 V display backplanes |
| Asynchronous master reset | Ensures deterministic Q0–Q7 = LOW state at power-up or fault recovery, independent of clock stability |
| Input clamp diodes | Enables safe connection to 12 V sensors or 24 V PLC outputs using series current-limiting resistors |
| Low ground bounce (VOLP < 0.8 V) | Maintains signal integrity in dense PCB layouts with shared ground planes and fast-switching loads |
| Latch-up immunity >100 mA | Guarantees robustness against transient overvoltage events per JESD78 Class II Level B |
Applications
| LED Matrix Driver | Microcontroller GPIO Expander |
|---|---|
|
Use Scenario: Driving 8×8 monochrome LED display with row-scanning controller. IC Role / Device Role / Timing Role: Serial-to-parallel converter buffering SPI data into parallel column outputs synchronized to row enable signals. Use Value: Reduces MCU pin count by 7 (vs. direct 8-bit port), supports 100+ Hz refresh with 12 ns tpd ensuring minimal ghosting. |
Use Scenario: Adding 8 digital outputs to an ARM Cortex-M0+ with limited GPIO. IC Role / Device Role / Timing Role: Shift register extending SPI peripheral into parallel output bank, controlled via standard HAL_SPI_Transmit. Use Value: Enables firmware-compatible expansion without modifying PCB layout or adding address decoding logic. |
| Industrial I/O Module | Legacy Bus Interface Adapter |
|
Use Scenario: Isolated digital output card for PLC backplane with 24 V sinking outputs. IC Role / Device Role / Timing Role: Level-translating serial interface between 3.3 V FPGA and 24 V optocoupler drivers. Use Value: Clamp diodes allow direct 24 V-tolerant input via 22 kΩ resistor; 125 °C rating supports enclosure mounting near motors. |
Use Scenario: Adapting RS-232 serial stream to parallel 8-bit data bus for legacy test equipment. IC Role / Device Role / Timing Role: Synchronizing asynchronous UART RX data into aligned byte frames using external baud-rate clock. Use Value: Dual DSA/DSB gating permits clean start-bit detection and frame alignment without microcontroller intervention. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 8-bit serial-in/parallel-out shift register applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LV164APWR | TI part in TSSOP14 (SOT402-1); identical logic but 7.3 mW/K thermal derating above 81 °C vs. 10.1 mW/K for SO14 | Lower profile (1.2 mm vs. 1.75 mm) suits space-constrained designs; requires different reflow profile due to finer pitch | Select for PCB area reduction where thermal margin allows; verify solder paste volume for 0.65 mm pitch. |
| 74HC164D,653 | Nexperia HC variant; 2.0–6.0 V range, slower tpd (23 ns @ 4.5 V), no 1.0–2.0 V operation, higher ICC | Not suitable for 1.2 V/1.8 V systems; better noise immunity at 5 V but incompatible with ultra-low-power domains | Choose only if existing 5 V design requires drop-in replacement with identical pinout and no VCC scaling. |
Compared with SN74LV164APWR, the 74LV164D,112 offers superior thermal margin in SO14 for high-ambient environments; versus 74HC164D,653, it enables true single-supply operation down to 1.0 V while consuming less quiescent current.
Availability
74LV164D,112 is available at Aetrix Electronics and suitable for LED display drivers, microcontroller GPIO expansion, industrial I/O modules, and legacy bus interface adapters requiring stable component supply across automotive and industrial temperature ranges.
Supply support for 74LV164D,112 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a leading Dutch semiconductor manufacturer specializing in high-volume logic, discrete, and MOSFET solutions, with focus on reliability, efficiency, and application-specific optimization.
The 74LV164 belongs to Nexperia's LV (Low-Voltage) logic family, designed specifically for energy-efficient operation across 1.0–5.5 V supply rails in battery-powered and mixed-voltage embedded systems.
FAQ
What is the minimum supply voltage for guaranteed operation of 74LV164D,112?
The 74LV164D,112 is fully specified and guaranteed functional down to 1.0 V, with static characteristics validated from 1.2 V and dynamic performance characterized at 1.2 V (75 ns tpd). Input thresholds scale with VCC, enabling reliable operation in 1.2 V FPGA I/O banks and ultra-low-power sensor nodes without level shifters.
How does the dual-input gating (DSA/DSB) function in practice?
DSA and DSB form an AND-gate structure: data enters only when one input is HIGH (enabling) and the other carries the serial bit. For example, holding DSB = HIGH allows DSA data to shift on each CP rising edge; conversely, DSA = HIGH enables DSB data flow. This eliminates external gating logic for multiplexed serial sources.
Can 74LV164D,112 drive standard 5 V TTL loads directly?
Yes - at VCC = 5.0 V, VOH ≥ 4.2 V (IO = −12 mA) and VOL ≤ 0.55 V (IO = 12 mA), meeting TTL VIH (≥2.0 V) and VIL (≤0.8 V) thresholds. Output drive strength remains compliant across −40 °C to +125 °C, supporting direct interface to 74LS/74ALS loads without buffers.
Is the SO14 package (SOT108-1) RoHS and REACH compliant?
Yes - the 74LV164D,112 in SO14 packaging meets RoHS Directive 2011/65/EU (Pb-free leads, homogeneous material restrictions) and REACH Regulation (EC) No. 1907/2006 (SVHC screening), with full compliance documentation available through Nexperia's product change notifications and material declarations portal.
74LV164D,112 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- *
- Package/Case:
- -
- Packaging:
- Bulk
- Product Status:
- Active
- Logic Type:
- -
- Output Type:
- -
- Number of Elements:
- -
- Number of Bits per Element:
- -
- Function:
- -
- Voltage - Supply:
- -
- Operating Temperature:
- -
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- -
- Supplier Device Package:
- -
74LV164D,112 FAQ
1.How can I place an order for 74LV164D,112 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74LV164D,112 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74LV164D,112 reliable?
The price and inventory of 74LV164D,112 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74LV164D,112 is usually 5 days.
3.What payment methods are accepted for 74LV164D,112?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74LV164D,112 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 74LV164D,112?
74LV164D,112 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74LV164D,112 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74LV164D,112?
For technical support, including 74LV164D,112 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74LV164D,112 requirements.
6.How does Aetrix verify that 74LV164D,112 is sourced from the original manufacturer or authorized distributors?
All 74LV164D,112 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74LV164D,112 meets industry standards.
7.What is the process for return or replacement of 74LV164D,112?
All 74LV164D,112 units undergo pre-shipment inspection (PSI). If there is an issue with 74LV164D,112, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74LV164D,112 part is unused and in its original packaging.
Return procedure for 74LV164D,112:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
74LV164D,112 Tags
-
SN74HC164DR
Texas Instruments
-
SN74HC595DR
Texas Instruments
-
74HC595PW,118
Nexperia USA Inc.
-
SN74HC165PWR
Texas Instruments
-
HEF4094BT,653
Nexperia USA Inc.
-
74HC595D,118
Nexperia USA Inc.
-
SN74HC595PWR
Texas Instruments
-
74HC165D,653
Nexperia USA Inc.
-
SN74LV165APWR
Texas Instruments
-
74HC595BQ,115
Nexperia USA Inc.
-
74HC165BQ,115
Nexperia USA Inc.
-
CD4094BPWR
Texas Instruments
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