My Inquiry
My Account
Nexperia USA Inc. 74LV164PW,112
- Part No.:
- 74LV164PW,112
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Shift Registers
- Package:
- 14-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
74LV164PW,112.pdf
- Description:
- IC 8BIT SHIFT REGISTER 14TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:2,641
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
74LV164PW,112 from Nexperia is an 8-bit serial-in/parallel-out CMOS shift register with dual gated serial inputs (DSA, DSB), asynchronous active-LOW master reset (MR), and edge-triggered clock (CP) operating on LOW-to-HIGH transitions. It supports 1.0 V to 5.5 V supply, delivers <0.8 V output ground bounce at 3.3 V, and operates across –40 °C to +125 °C - used in LED matrix drivers and microcontroller GPIO expansion.
For engineers reviewing the 74LV164PW,112 datasheet, 74LV164PW,112 pinout, 74LV164PW,112 application, or 74LV164PW,112 equivalent, key selection criteria include its dual-input gating logic, wide VCC range (1.0–5.5 V), guaranteed operation down to 1.0 V, asynchronous MR behavior, and TSSOP14 package thermal profile for high-density PCB layouts.
Technical Context
The 74LV164PW,112 implements a synchronous 8-stage shift register with independent data enable control via DSA/DSB gating: either input acts as an active-HIGH enable for the other. Its CP input triggers on LOW-to-HIGH transitions only, and MR forces all Q0–Q7 outputs LOW asynchronously, overriding clock and data states.
Designed for low-voltage interoperability, it accepts TTL-level inputs when VCC = 2.7 V to 3.6 V and features integrated input clamp diodes enabling safe interface to voltages exceeding VCC using current-limiting resistors - critical for mixed-supply system interfacing.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Function | 8-bit serial-in/parallel-out shift register with dual gated data inputs and asynchronous reset |
| Supply Voltage (VCC) | 1.0 V to 5.5 V - enables direct interface with 1.2 V, 1.8 V, 2.5 V, 3.3 V, and 5 V logic domains |
| Operating Temperature | –40 °C to +125 °C - qualified for industrial and extended-temperature embedded control applications |
| Propagation Delay (tpd) | 12 ns at VCC = 3.3 V, CL = 15 pF - supports >70 MHz clock rates in 3.3 V systems |
| Output Drive | ±12 mA at VCC = 3.0 V - sufficient to directly drive LEDs or standard CMOS/TTL loads without buffers |
| Input Clamp Diodes | Integrated - allows safe connection of inputs to signals up to VCC + 0.5 V using external current-limiting resistors |
| ESD Protection | HBM >2000 V, CDM >1000 V - meets JEDEC JS-001/JS-002 Class 2/C3 for robust board-level handling |
Pinout & Package
TSSOP14 package (SOT402-1): plastic thin shrink small outline, 14 leads, 4.4 mm body width, 0.65 mm pitch, 0.80 mm max height - optimized for automated assembly and thermal performance in space-constrained designs.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - DSA | Serial data input A | Primary serial input; enabled only when DSB = HIGH - used for data chaining or conditional load control |
| 2 - DSB | Serial data input B | Secondary serial input; enabled only when DSA = HIGH - provides hardware-selectable data path routing |
| 3 - Q0 | Parallel output 0 | LSB of shifted data; updates on CP rising edge after first bit shift - aligns with standard LSB-first protocols |
| 4 - Q1 | Parallel output 1 | Second stage output; phase-aligned with Q0 under continuous clocking - enables byte-wide parallel readout |
| 5 - Q2 | Parallel output 2 | Third stage output; maintains deterministic timing relationship to CP - supports synchronous sampling by MCU |
| 6 - Q3 | Parallel output 3 | Fourth stage output; stable within 12 ns of CP edge at 3.3 V - suitable for timing-critical display refresh |
| 7 - GND | Ground reference | 0 V return path for all internal logic and I/O - must be low-impedance for stable VOL/VOLP performance |
| 8 - CP | Clock input | Edge-triggered input; registers data on LOW-to-HIGH transition only - eliminates metastability from slow edges |
| 9 - MR | Master reset | Asynchronous active-LOW input; clears all Q outputs to LOW regardless of CP or data state - ensures known startup condition |
| 10 - Q4 | Parallel output 4 | Fifth stage output; identical timing to Q0–Q3 - enables full 8-bit parallel capture with single CP edge |
| 11 - Q5 | Parallel output 5 | Sixth stage output; no additional delay vs. Q0–Q4 - preserves bit alignment across entire bus |
| 12 - Q6 | Parallel output 6 | Seventh stage output; same propagation characteristics as other Q outputs - ensures uniform timing skew |
| 13 - Q7 | Parallel output 7 | MSB of shifted data; updated simultaneously with Q0–Q6 on CP edge - completes full 8-bit parallel word |
| 14 - VCC | Supply voltage | Positive supply rail; powers all internal logic and output drivers - decoupling capacitor required near pin for noise immunity |
Key Features
| Feature | Design Value |
|---|---|
| Dual gated serial inputs | DSA and DSB act as mutual enables - eliminates need for external AND gates in multi-source data routing |
| Wide VCC range (1.0–5.5 V) | Operates across legacy 5 V, standard 3.3 V, and ultra-low-power 1.2/1.8 V domains without level shifters |
| Asynchronous master reset | MR forces Q0–Q7 LOW independently of CP or data - guarantees deterministic initialization in safety-critical sequences |
| Input clamp diodes | Enables overvoltage-tolerant interfacing (up to VCC + 0.5 V) using simple series resistors - reduces BOM count |
| Low ground bounce (VOLP < 0.8 V) | Minimizes switching noise on shared GND planes - critical for mixed-signal systems with ADCs or precision analog |
Applications
| LED Matrix Driver | Microcontroller GPIO Expander |
|---|---|
|
Use Scenario: Driving 8×8 monochrome LED displays in consumer electronics and industrial HMI panels. IC Role / Device Role / Timing Role: Serial-to-parallel converter translating SPI data from MCU into parallel column/row enable signals. Use Value: Reduces MCU pin count by 7 (vs. direct 8-bit port), supports daisy-chained cascading for larger arrays, and delivers 12 mA per output to eliminate external drivers. |
Use Scenario: Extending digital I/O capability of resource-constrained microcontrollers in smart sensors and IoT edge nodes. IC Role / Device Role / Timing Role: Synchronous peripheral providing eight additional programmable output pins controlled via UART/SPI. Use Value: Enables reliable 8-bit parallel output latching at up to 70 MHz (3.3 V), with MR ensuring safe power-up state before firmware initialization. |
| Industrial Control Bus Interface | Legacy System Protocol Translator |
|
Use Scenario: Interfacing modern 3.3 V MCUs to older 5 V PLC modules requiring parallel handshake signaling. IC Role / Device Role / Timing Role: Level-shifting shift register bridging voltage domains while preserving timing integrity across CP and MR paths. Use Value: Operates natively at 5 V with TTL-compatible inputs, eliminating discrete level translators and reducing signal path jitter. |
Use Scenario: Converting serial control commands from RS-232 or UART peripherals into parallel status/control bits for legacy instrumentation. IC Role / Device Role / Timing Role: Protocol adapter synchronizing asynchronous host data to local clock domain via DSA/DSB gating logic. Use Value: Dual-input gating allows hardware handshaking (e.g., DSB = READY, DSA = DATA), preventing data overrun without software polling. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 8-bit serial-in/parallel-out shift register applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LV164APW | TI variant with identical pinout and function but higher ICC (max 50 μA vs. Nexperia's 160 μA at 5.5 V); slightly slower tpd (14 ns @ 3.3 V) | Valid for drop-in replacement where lower static current is not critical; requires verification of MR timing margin in fast-reset systems | Select when TI supply chain preference exists and 14 ns propagation delay is acceptable in target clock budget |
| 74HC164PW,118 | Nexperia HC variant: higher VCC min (2.0 V), no 1.0–1.8 V support; faster fmax (100 MHz @ 5 V) but higher VOLP (>1.0 V) | Suitable for 5 V-only systems needing higher speed; unsuitable for battery-powered 1.8 V designs due to VCC cutoff | Choose only if design operates strictly ≥2.0 V and requires >78 MHz operation at 3.3 V - otherwise LV version offers broader voltage flexibility |
Compared with SN74LV164APW and 74HC164PW,118, the 74LV164PW,112 uniquely supports 1.0 V operation and delivers lowest ground bounce (<0.8 V), making it optimal for ultra-low-voltage, noise-sensitive embedded systems where supply headroom and signal integrity are constrained.
Availability
74LV164PW,112 is available at Aetrix Electronics and suitable for LED display drivers, microcontroller GPIO expansion, industrial control bus interfaces, and legacy protocol translation requiring stable component supply across automotive-adjacent temperature ranges.
Supply support for 74LV164PW,112 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on essential efficiency technologies - delivering high-performance, reliable, and scalable logic, power, and analog components.
The 74LV164PW,112 belongs to Nexperia's LV logic family, engineered for ultra-low-voltage interoperability (1.0–5.5 V) and robust operation in industrial and extended-temperature environments.
FAQ
What is the minimum supply voltage at which 74LV164PW,112 guarantees functional operation?
The 74LV164PW,112 is guaranteed to function down to VCC = 1.0 V, with static characteristics specified from 1.2 V and full dynamic operation confirmed at 1.0 V when inputs are driven to GND or VCC levels. This enables use in energy-harvesting and coin-cell-powered systems where supply rails dip below 1.2 V during brownout conditions.
How does the dual-input gating (DSA/DSB) affect data loading behavior?
Data enters only when one input is HIGH (enabling) and the other carries the data signal - e.g., DSB = HIGH enables DSA as the active data path. This eliminates race conditions during simultaneous input changes and allows hardware-controlled data flow without external logic, simplifying control sequencing in real-time systems.
Can 74LV164PW,112 safely interface with 5 V signals while operating at 3.3 V VCC?
Yes - integrated input clamp diodes allow DSA/DSB/CP/MR inputs to tolerate voltages up to VCC + 0.5 V. With a 3.3 V supply, 5 V signals can be safely applied using a series current-limiting resistor (e.g., 10 kΩ), limiting IIK to <±20 mA per input as specified in the absolute maximum ratings.
What is the impact of the asynchronous MR pin on system startup reliability?
The active-LOW MR pin forces Q0–Q7 LOW immediately upon assertion, independent of CP state or data - ensuring all outputs begin in a known, safe state at power-on or fault recovery. This eliminates undefined output glitches that could trigger unintended actions in connected loads like relays or MOSFET gates.
74LV164PW,112 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- 74LV
- Package/Case:
- 14-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Logic Type:
- Shift Register
- Output Type:
- Push-Pull
- Number of Elements:
- 1
- Number of Bits per Element:
- 8
- Function:
- Serial to Parallel
- Voltage - Supply:
- 1V ~ 5.5V
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-TSSOP
74LV164PW,112 FAQ
1.How can I place an order for 74LV164PW,112 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74LV164PW,112 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74LV164PW,112 reliable?
The price and inventory of 74LV164PW,112 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74LV164PW,112 is usually 5 days.
3.What payment methods are accepted for 74LV164PW,112?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74LV164PW,112 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 74LV164PW,112?
74LV164PW,112 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74LV164PW,112 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74LV164PW,112?
For technical support, including 74LV164PW,112 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74LV164PW,112 requirements.
6.How does Aetrix verify that 74LV164PW,112 is sourced from the original manufacturer or authorized distributors?
All 74LV164PW,112 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74LV164PW,112 meets industry standards.
7.What is the process for return or replacement of 74LV164PW,112?
All 74LV164PW,112 units undergo pre-shipment inspection (PSI). If there is an issue with 74LV164PW,112, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74LV164PW,112 part is unused and in its original packaging.
Return procedure for 74LV164PW,112:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
74LV164PW,112 Tags
-
SN74HC164DR
Texas Instruments
-
SN74HC595DR
Texas Instruments
-
74HC595PW,118
Nexperia USA Inc.
-
SN74HC165PWR
Texas Instruments
-
HEF4094BT,653
Nexperia USA Inc.
-
74HC595D,118
Nexperia USA Inc.
-
SN74HC595PWR
Texas Instruments
-
74HC165D,653
Nexperia USA Inc.
-
SN74LV165APWR
Texas Instruments
-
74HC595BQ,115
Nexperia USA Inc.
-
74HC165BQ,115
Nexperia USA Inc.
-
CD4094BPWR
Texas Instruments
Tech Hub
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
LDO regulator guide covering low dropout voltage, power dissipation, thermal design, PSRR, output noise, capacitor stability, adjustable LDO circuits, LDO vs buck converter and datasheet selection chec…
Conditional Access Module guide covering CAM meaning, CI/CI+ interface, smart card authorization, DVB security workflow, TV and set-top box compatibility, internal electronics, ESD protection, connecto…
Guide to electronic component obsolescence covering EOL risk, PCN/PDN notices, last-time buy planning, replacement options, form-fit-function validation, counterfeit risk and BOM lifecycle management.
18650 battery guide covering lithium-ion cell basics, 3.6V/3.7V voltage, 4.2V charging, mAh and Wh capacity, protected cells, chargers, BMS, series-parallel packs, holders, welding and sourcing checks.…
Hall effect sensor guide covering working principle, linear and digital sensors, Arduino circuits, current sensing, speed detection, automotive applications, A3144 examples, signal filtering and datash…
Product Change Notification guide for electronic components, covering PCN meaning, PCN vs PDN/EOL, common change types, risk levels, form-fit-function review, engineering validation, BOM control, LTB/L…
A practical guide to blend door actuators, covering HVAC function, symptoms, location, AC and heater issues, reset and calibration, replacement cost, electrical diagnosis, compatibility checks, and rep…
