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Diodes Incorporated 74LV32AT14-13

Part No.:
74LV32AT14-13
Manufacturer:
Diodes Incorporated
Category:
Gates and Inverters
Package:
14-TSSOP (0.173", 4.40mm Width)
Datasheet:
Aetrix74LV32AT14-13.pdf
Description:
IC GATE OR 4CH 2-INP 14TSSOP
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:2,500

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Product details

Overview

74LV32AT14-13 from Diodes Incorporated is a quad 2-input OR gate IC in TSSOP-14 package, operating from 2.0V to 5.5V supply, with 5.5V-tolerant inputs, IOFF-enabled partial power-down protection, and Schmitt-trigger inputs. It delivers 12mA output drive at 4.5V and supports voltage translation between 3.3V and 5V logic domains in PC and peripheral interfaces.

For engineers reviewing the 74LV32AT14-13 datasheet, 74LV32AT14-13 pinout, 74LV32AT14-13 application, or 74LV32AT14-13 equivalent, key selection criteria include input voltage tolerance (5.5V), IOFF leakage (<5μA), propagation delay (3.6ns typ @5V), output drive capability (±12mA), and TSSOP-14 thermal and board-space constraints.

Technical Context

This device implements four independent Boolean OR functions (Y = A + B) using CMOS logic with push-pull outputs. Its IOFF circuitry actively disables outputs during power-down to prevent back-current flow, enabling safe use in mixed-voltage systems with asynchronous power sequencing.

All inputs feature Schmitt-trigger action for noise immunity, and the design meets JESD22 ESD ratings (2kV HBM, 1kV CDM, 200V MM) and JESD78 latch-up immunity (>100mA). Input thresholds scale with VCC (VIH = 0.7×VCC, VIL = 0.3×VCC), ensuring robust operation across 2.0–5.5V.

Key Specifications

ParameterValue and Actual Design Meaning
Supply Voltage Range2.0V to 5.5V - enables direct interface with 3.3V and 5V logic families without level shifters
Input Voltage ToleranceUp to 5.5V - allows 5V inputs to drive 3.3V-supplied device safely in mixed-voltage designs
IOFF Leakage Current<5μA - prevents damaging backflow when VCC = 0V, critical for hot-swap and partial-power-down systems
Output Drive (IOL/IOH)±12mA @ 4.5V - sufficient to drive standard TTL loads or multiple CMOS inputs without buffering
Propagation Delay3.6ns (typ) @ 5V, CL = 15pF - supports >100MHz toggle rates in low-skew combinatorial paths
Input HysteresisSchmitt-trigger action - rejects up to ~0.6V of input noise on slow-rising/falling signals
Power Dissipation per Gate9.5pF @ 3.3V, 10MHz - enables ultra-low dynamic power in battery-powered logic subsystems

Pinout & Package

TSSOP-14 (Thin Shrink Small Outline Package), 4.9mm × 4.4mm body, 0.65mm pitch, 1.2mm max height, lead-free and RoHS-compliant.

Pin/TerminalCircuit RoleDesign Meaning
1, 4, 9, 12Input A (Gate 1–4)First OR input per gate; 5.5V-tolerant, Schmitt-triggered, IOFF-isolated when powered down
2, 5, 10, 13Input B (Gate 1–4)Second OR input per gate; identical electrical behavior to Input A pins
3, 6, 8, 11Output Y (Gate 1–4)Push-pull OR output; actively driven high/low; disabled by IOFF during VCC=0
7GNDGround reference for all logic and power domains; must be low-impedance for noise immunity
14VCCPrimary supply rail; powers internal logic and output drivers; IOFF active only when VCC = 0V

Key Features

FeatureDesign Value
Wide Supply Range (2.0–5.5V)Eliminates need for dedicated LDOs in multi-rail systems; supports direct connection to USB 3.3V and legacy 5V rails
IOFF Partial Power-DownPrevents current backflow from live inputs into unpowered VCC, satisfying IEC 61000-4-2 system-level ESD robustness requirements
5.5V-Tolerant InputsEnables bidirectional voltage translation: 5V microcontroller outputs can safely control 3.3V FPGA configuration logic
Schmitt-Trigger InputsRejects noise on slow-switching signals (e.g., front-panel buttons, reset lines) without external RC filtering
Low ICC (20μA max)Reduces quiescent power in always-on subsystems such as wake-on-LAN or real-time clock supervisors

Applications

PC Motherboard Power SequencingUSB Peripheral Interface Logic

Use Scenario: OR-ing of multiple power-good signals (e.g., +12V_PG, +3.3V_PG, +5V_PG) to generate a global SYS_PWR_OK signal.

IC Role / Device Role / Timing Role: Combinatorial logic gate aggregating asynchronous power-status flags with sub-10ns propagation delay.

Use Value: Ensures system reset assertion only after all rails stabilize, eliminating race conditions during cold boot.

Use Scenario: Level-shifting and signal conditioning between 5V USB transceiver status pins and 3.3V host controller GPIOs.

IC Role / Device Role / Timing Role: Voltage-tolerant OR gate performing logical OR of VBUS-detected and enumeration-complete signals.

Use Value: Enables single GPIO interrupt to indicate composite USB attach+ready state without external level translators.

Industrial PLC Input ConditioningEmbedded Display Backlight Control

Use Scenario: Debouncing and noise rejection for mechanical limit switches feeding into a microcontroller's interrupt-capable input.

IC Role / Device Role / Timing Role: Schmitt-triggered OR gate acting as hardware-based switch conditioner before digital sampling.

Use Value: Reduces firmware overhead by eliminating software debouncing loops; improves response time to critical motion limits.

Use Scenario: Combining PWM dimming enable and overtemperature shutdown signals to gate backlight driver activation.

IC Role / Device Role / Timing Role: Fail-safe OR logic ensuring backlight remains off if either thermal fault or disable command is asserted.

Use Value: Provides hardware-enforced safety interlock independent of MCU firmware execution integrity.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad 2-input OR gate applications.

Alternative PartTechnical DifferenceApplication DifferenceSelection Advice
SN74LVC32APWHigher drive (24mA), no IOFF, 1.65–3.6V supply onlyNot suitable for mixed 5V/3.3V systems or partial power-down designsSelect when higher speed (2.5ns tPD) and full 3.3V compliance are prioritized over voltage flexibility
74AHC32PWWider supply (2–5.5V), no IOFF, higher ICC (40μA), no Schmitt inputsLacks input hysteresis and power-down isolation; susceptible to noise on slow edgesChoose where cost sensitivity outweighs need for noise immunity and hot-swap safety

Compared with SN74LVC32APW and 74AHC32PW, the 74LV32AT14-13 uniquely combines 5.5V input tolerance, IOFF protection, and Schmitt-trigger inputs-making it the only option qualified for robust, mixed-voltage, hot-pluggable logic interfacing without additional discrete components.

Availability

74LV32AT14-13 is available at Aetrix Electronics and suitable for PC motherboard power sequencing, USB peripheral interface logic, and industrial PLC input conditioning requiring stable component supply and long-term lifecycle support.

Supply support for 74LV32AT14-13 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Diodes Incorporated is a global manufacturer of discrete semiconductors and analog ICs, specializing in high-reliability, energy-efficient solutions for computing, industrial, and consumer markets.

The 74LV logic family targets low-voltage, mixed-supply digital interfacing with emphasis on power-down safety, voltage translation, and noise immunity-designed specifically for modern embedded systems with aggressive power management and heterogeneous voltage domains.

FAQ

Can 74LV32AT14-13 be used with 5V inputs while powered from 3.3V?

Yes. Its inputs tolerate up to 5.5V regardless of VCC, enabling safe 5V-to-3.3V level translation without external resistors or clamps. This is confirmed by VI absolute maximum rating (−0.5V to +7.0V) and recommended operating condition (0V to 5.5V input range at any VCC from 2.0V to 5.5V).

What happens to outputs during power-down (VCC = 0V)?

IOFF circuitry disables all outputs, limiting leakage current to <5μA and preventing back-current flow from live inputs. This behavior is verified under Electrical Characteristics (IOFF test condition: VI or VO = 0 to 5.5V, VCC = 0V) and ensures system-level safety during hot-swap or partial power-down sequences.

Does this device require external pull-up or pull-down resistors on unused inputs?

No-unused inputs must be tied to VCC or GND per Recommended Operating Conditions (Note 5), but not via resistors. The device has no internal weak pull-ups; floating inputs cause excessive ICC and potential oscillation. Direct connection avoids timing uncertainty and ensures defined logic states per gate truth table.

Is the TSSOP-14 package compatible with standard SO-14 PCB footprints?

No. TSSOP-14 has 0.65mm pin pitch and 4.9mm × 4.4mm body, while SO-14 uses 1.27mm pitch and 8.65mm × 3.9mm body. Pad layout differs significantly-using SO-14 land patterns will cause solder bridging or open circuits. Refer to Diodes AP02001 for correct TSSOP-14 footprint dimensions (X = 0.45mm, Y = 1.45mm, C1 = 5.9mm, C2 = 0.65mm).

74LV32AT14-13 Specifications

Product attributes
Attribute value
Manufacturer:
Diodes Incorporated
Series:
74LV
Package/Case:
14-TSSOP (0.173", 4.40mm Width)
Packaging:
Tape & Reel (TR)
Product Status:
Active
Logic Type:
OR Gate
Number of Circuits:
4
Number of Inputs:
2
Features:
-
Voltage - Supply:
2V ~ 5.5V
Current - Quiescent (Max):
20 µA
Current - Output High, Low:
12mA, 12mA
Input Logic Level - Low:
0.5V
Input Logic Level - High:
1.5V
Max Propagation Delay @ V, Max CL:
7.5ns @ 5V, 50pF
Operating Temperature:
-40°C ~ 125°C
Grade:
-
Qualification:
-
Mounting Type:
Surface Mount
Supplier Device Package:
14-TSSOP

74LV32AT14-13 FAQ

1.How can I place an order for 74LV32AT14-13 through Aetrix?

Please submit a Request for Quotation (RFQ) for 74LV32AT14-13 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for 74LV32AT14-13 reliable?

The price and inventory of 74LV32AT14-13 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74LV32AT14-13 is usually 5 days.

3.What payment methods are accepted for 74LV32AT14-13?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74LV32AT14-13 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for 74LV32AT14-13?

74LV32AT14-13 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your 74LV32AT14-13 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for 74LV32AT14-13?

For technical support, including 74LV32AT14-13 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74LV32AT14-13 requirements.

6.How does Aetrix verify that 74LV32AT14-13 is sourced from the original manufacturer or authorized distributors?

All 74LV32AT14-13 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74LV32AT14-13 meets industry standards.

7.What is the process for return or replacement of 74LV32AT14-13?

All 74LV32AT14-13 units undergo pre-shipment inspection (PSI). If there is an issue with 74LV32AT14-13, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The 74LV32AT14-13 part is unused and in its original packaging.

Return procedure for 74LV32AT14-13:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

74LV32AT14-13 Tags

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