NXP Semiconductors 74LV4051N,112
- Part No.:
- 74LV4051N,112
- Manufacturer:
- NXP Semiconductors
- Package:
- 16-DIP (0.300", 7.62mm)
- Datasheet:
-
74LV4051N,112.pdf
- Description:
- IC MUX 8:1 85OHM 16DIP
- Quantity:
- Payment:

- Shipping:

Inventory:3,099
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Product details
Overview
74LV4051N,112 from NXP Semiconductors is an 8-channel analog multiplexer/demultiplexer with active-LOW enable (E), three binary select inputs (S0–S2), eight independent I/O channels (Y0–Y7), and a common I/O terminal (Z). It operates from 1.0 V to 6.0 V supply, delivers ≤80 Ω typical ON resistance at 3.0 V, supports −40 °C to +125 °C ambient, and enables bidirectional analog signal routing in mixed-voltage data acquisition systems.
For engineers reviewing the 74LV4051N,112 datasheet, 74LV4051N,112 pinout, 74LV4051N,112 application, or 74LV4051N,112 equivalent, this device is selected for low-voltage analog switching where rail-to-rail analog swing (VCC to VEE), logic-level translation between 3 V digital control and ±3 V analog domains, and built-in break-before-make timing are required.
Technical Context
The 74LV4051N,112 implements a Si-gate CMOS 1-of-8 decoder driving eight bilateral analog switches. Its digital control section (S0–S2, E) is powered by VCC/GND (1.0–6.0 V), while analog paths (Y0–Y7, Z) support voltage ranges from VEE to VCC, with |VCC − VEE| ≤ 6.0 V. The device features inherent break-before-make switching to prevent channel shorting during state transitions.
It accepts TTL-compatible input levels when VCC = 2.7 V to 3.6 V and provides ESD protection exceeding 2000 V HBM and 200 V MM. Switch leakage remains ≤2.0 µA across temperature and supply conditions, ensuring signal integrity in high-impedance sensor interfaces.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply range | VCC = 1.0 V to 6.0 V; enables operation from single-cell Li-ion (3.0 V) to dual-supply ±3 V systems |
| ON resistance | 80 Ω typical at VCC = 3.0 V; ensures minimal insertion loss and distortion in audio/ADC front-end paths |
| Analog voltage range | VCC to VEE, |VCC − VEE| ≤ 6.0 V; supports ±3 V analog rails with 3.3 V digital logic |
| Propagation delay | 5 ns typical (VCC = 3.3 V); suitable for multiplexing up to ~100 MHz sample-and-hold signals |
| Switch isolation | −50 dB at 1 MHz; prevents crosstalk between inactive channels in multi-sensor monitoring |
| Operating temperature | −40 °C to +125 °C; qualified for under-hood automotive and industrial motor control environments |
| ESD rating | HBM > 2000 V; protects against handling damage during PCB assembly and field service |
Pinout & Package
DIP16 plastic dual in-line package (300 mil), 16-pin through-hole mounting with 0.1-inch lead pitch and standard DIP footprint compatibility.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 5, 2, 4, 13, 14, 15, 12 | Y0–Y7 | Independent analog I/O terminals; each connects bidirectionally to Z when selected |
| 3 | Z | Common analog I/O node; routed to one Yn channel based on S0–S2 and E state |
| 6 | E | Active-LOW enable; all switches go high-Z when E = HIGH, regardless of S0–S2 |
| 9, 10, 11 | S0, S1, S2 | Binary address inputs; decode to select one of eight Yn–Z paths when E = LOW |
| 7 | VEE | Negative analog supply rail; sets lower voltage limit for analog signal swing |
| 8 | GND | Digital ground reference for control logic (S0–S2, E) |
| 16 | VCC | Digital supply for control logic; also defines upper analog limit when VEE = GND |
Key Features
| Feature | Design Value |
|---|---|
| Low-voltage operation | Functional down to 1.0 V VCC - supports ultra-low-power battery-operated instrumentation |
| Logic-level translation | 3 V digital control can switch ±3 V analog signals without external level shifters |
| Built-in break-before-make | Prevents momentary short-circuit between Y channels during address changes |
| Low ON-resistance mismatch | ≤4 Ω max mismatch between channels at 3.3 V - ensures consistent gain/attenuation across multiplexed sensors |
| High OFF-state isolation | −50 dB at 1 MHz - maintains signal integrity in multi-channel medical ECG front-ends |
Applications
| Data Acquisition Systems | Automotive Sensor Multiplexing |
|---|---|
Use Scenario: Simultaneous sampling of 8 thermocouples or RTDs using a single ADC channel. IC Role / Device Role / Timing Role: Analog MUX routes individual sensor outputs to shared ADC input under microcontroller control. Use Value: Reduces BOM cost and PCB area versus discrete analog switches; 80 Ω RON minimizes gain error in precision ratiometric measurements. | Use Scenario: Consolidating engine coolant, oil pressure, intake air, and exhaust gas temperature signals into one ECU analog input bank. IC Role / Device Role / Timing Role: High-temp-rated analog switch enabling fault-tolerant sensor redundancy and diagnostics. Use Value: −40 °C to +125 °C rating matches under-hood thermal requirements; −50 dB isolation prevents cross-talk during OBD-II diagnostic sweeps. |
| Programmable Gain Amplifier Front-End | Industrial PLC Analog Input Modules |
Use Scenario: Selecting between fixed resistor networks to configure PGA gain settings via GPIO. IC Role / Device Role / Timing Role: Low-leakage analog switch implementing digitally controlled feedback path selection. Use Value: ≤2.0 µA OFF-state leakage preserves DC accuracy; 1.0 V minimum VCC allows integration with ultra-low-power microcontrollers. | Use Scenario: Routing 8 field sensor inputs (4–20 mA, 0–10 V) to shared signal conditioning and isolation stages. IC Role / Device Role / Timing Role: Robust analog interface providing channel isolation and fail-safe disable (E pin). Use Value: ESD-hardened design withstands industrial EMI; 6.0 V max VCC supports direct connection to 5 V PLC backplane supplies. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar analog multiplexer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 74HC4051N,652 | Higher VCC min = 2.0 V; RON = 120 Ω typical at 4.5 V; no guaranteed 1.0 V operation | Not suitable for sub-2 V battery-powered designs; less optimal for ±3 V analog rails | Select when operating exclusively above 2.0 V and legacy HC logic compatibility is required |
| ADG708BRUZ | CMOS process; RON = 4 Ω typical at 5 V; requires separate VDD/VSS supplies; no TTL input compatibility | Superior RON and bandwidth but needs level-shifting for 3.3 V MCU control; higher cost | Select when ultra-low distortion and <100 MHz bandwidth are critical, and board space allows dedicated supply routing |
Compared with 74LV4051N,112, the 74HC4051N,652 lacks sub-2 V operation and offers higher RON, while the ADG708BRUZ delivers far lower resistance and faster switching but requires additional supply management and level translation - making the 74LV4051N,112 the optimal balance of low-voltage flexibility, analog performance, and system integration simplicity.
Availability
74LV4051N,112 is available at Aetrix Electronics and suitable for data acquisition systems, automotive sensor interfaces, and industrial PLC analog input modules requiring stable component supply across extended temperature ranges.
Supply support for 74LV4051N,112 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and IoT applications.
The 74LV4051N,112 belongs to NXP's LV (Low-Voltage) logic family, designed specifically for mixed-signal systems requiring robust analog switching with ultra-low-voltage digital control and wide temperature resilience.
FAQ
What is the minimum supply voltage required for reliable operation of the 74LV4051N,112?
The 74LV4051N,112 is guaranteed to function down to VCC = 1.0 V, with static characteristics specified from 1.2 V. At 1.0 V, it supports digital signal transmission only - analog switching performance degrades significantly below 1.2 V due to nonlinear ON resistance. For full analog multiplexer functionality, use VCC ≥ 1.2 V per the datasheet's recommended operating conditions.
Can the 74LV4051N,112 interface 3.3 V microcontroller GPIOs with ±3 V analog signals?
Yes. The 74LV4051N,112 supports logic-level translation: its digital inputs (S0–S2, E) accept TTL levels when VCC = 2.7 V to 3.6 V, while analog terminals (Y0–Y7, Z) operate from VEE to VCC. With VCC = 3.3 V and VEE = −3.0 V, the device directly routes ±3 V analog signals under 3.3 V digital control without external level shifters.
Does the 74LV4051N,112 include built-in break-before-make timing?
Yes. The 74LV4051N,112 incorporates inherent break-before-make behavior during address transitions (S0–S2 changes). This prevents momentary short-circuiting between Y channels, eliminating signal glitches and protecting downstream circuitry - a critical feature for reliable operation in sensor multiplexing and programmable gain amplifier applications.
What is the maximum allowable voltage difference between VCC and VEE for the 74LV4051N,112?
The absolute maximum voltage difference between VCC and VEE is 6.0 V, as defined in the limiting values table. Exceeding this risks permanent damage. For example, if VCC = 5.0 V, then VEE must be ≥ −1.0 V; if VEE = −3.0 V, then VCC must be ≤ 3.0 V. This constraint ensures safe operation of the internal analog switch transistors.
Is the 74LV4051N,112 pin-compatible with the 74HC4051 and 74HCT4051?
Yes. The 74LV4051N,112 is explicitly stated as pin and function compatible with both the 74HC4051 and 74HCT4051. All share identical DIP16 pinout, terminal assignments (Y0–Y7, Z, S0–S2, E, VCC, GND, VEE), and functional truth table - enabling drop-in replacement in existing designs while offering improved low-voltage operation and reduced ON resistance.
74LV4051N,112 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Packaging:
- Tube
- Product Status:
- Obsolete
- Switch Circuit:
- -
- Multiplexer/Demultiplexer Circuit:
- 8:1
- Number of Circuits:
- 1
- On-State Resistance (Max):
- 85Ohm
- Channel-to-Channel Matching (ΔRon):
- 2Ohm
- Voltage - Supply, Single (V+):
- 1V ~ 6V
- Voltage - Supply, Dual (V±):
- -
- Switch Time (Ton, Toff) (Max):
- 34ns, 29ns
- -3db Bandwidth:
- 200MHz
- Charge Injection:
- -
- Channel Capacitance (CS(off), CD(off)):
- 3.5pF
- Current - Leakage (IS(off)) (Max):
- 2µA
- Crosstalk:
- -60dB @ 1MHz
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 16-DIP
74LV4051N,112 FAQ
1.How can I place an order for 74LV4051N,112 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74LV4051N,112 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74LV4051N,112 reliable?
The price and inventory of 74LV4051N,112 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74LV4051N,112 is usually 5 days.
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74LV4051N,112 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74LV4051N,112 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74LV4051N,112?
For technical support, including 74LV4051N,112 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74LV4051N,112 requirements.
6.How does Aetrix verify that 74LV4051N,112 is sourced from the original manufacturer or authorized distributors?
All 74LV4051N,112 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74LV4051N,112 meets industry standards.
7.What is the process for return or replacement of 74LV4051N,112?
All 74LV4051N,112 units undergo pre-shipment inspection (PSI). If there is an issue with 74LV4051N,112, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74LV4051N,112 part is unused and in its original packaging.
Return procedure for 74LV4051N,112:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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