Nexperia USA Inc. 74LV595D,112
- Part No.:
- 74LV595D,112
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Shift Registers
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
74LV595D,112.pdf
- Description:
- IC SHIFT REGISTER 8BIT 16SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:1,518
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Product details
Overview
74LV595D,112 from Nexperia is an 8-bit serial-in/parallel-out or serial-out shift register with separate shift and storage register clocks, 3-state parallel outputs, asynchronous master reset (MR), and serial output (Q7S) for daisy-chaining. It operates from 1.0 V to 3.6 V, supports -40 °C to +125 °C, and is used in LED matrix drivers, GPIO expansion for microcontrollers, and serial-to-parallel data conversion in industrial control panels.
For engineers reviewing the 74LV595D,112 datasheet, 74LV595D,112 pinout, 74LV595D,112 application, or 74LV595D,112 equivalent, key selection criteria include its dual-clock architecture (SHCP/STCP), 3-state output enable (OE) timing, bus-driver output capability (8 mA), propagation delay at 3.3 V (15 ns typ), and SO16 package compatibility with legacy 74-series PCB footprints.
Technical Context
The device implements two independent synchronous registers: an 8-stage shift register clocked by SHCP and an 8-bit storage latch clocked by STCP. Data shifts on SHCP rising edge and transfers to outputs only on STCP rising edge - enabling glitch-free latched parallel output updates. MR asynchronously clears the shift register but leaves the storage register unaffected until next STCP.
Outputs are CMOS-compatible with TTL-level input thresholds and feature bus-driver strength (8 mA sink/source), while OE controls high-impedance state without altering internal register contents. Input clamp diodes allow safe interfacing to voltages exceeding VCC when used with current-limiting resistors.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply voltage range | 1.0 V to 3.6 V - enables direct interface with 1.8 V, 2.5 V, and 3.3 V logic domains without level shifters. |
| Propagation delay (SHCP→Q7S) | 15 ns typical at VCC = 3.3 V, CL = 15 pF - supports >70 MHz shift clock operation for high-throughput serial loading. |
| Output drive (bus driver) | 8 mA sink/source at VCC = 3.0 V - directly drives LEDs or standard CMOS/TTL loads without external buffers. |
| Operating temperature | -40 °C to +125 °C - qualified for under-hood automotive modules and industrial motor controllers. |
| Input voltage thresholds | VIH = 2.0 V min, VIL = 0.8 V max at VCC = 3.3 V - ensures robust noise margin against TTL and 3.3 V CMOS logic. |
| ESD protection | HBM > 2000 V, CDM > 1000 V - meets JEDEC JS-001/JS-002 Class 2/C3 for reliable handling in automated assembly lines. |
| Power dissipation capacitance | CPD = 115 pF - enables accurate dynamic power estimation (PD = CPD × VCC² × fi × N) for thermal design. |
Pinout & Package
74LV595D,112 is housed in a plastic small outline package (SO16) per SOT109-1, with 16 leads, 3.9 mm body width, and standard 1.27 mm lead pitch. Pin 1 is marked by a notch or dot; pin numbering follows counter-clockwise convention from top-left corner.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1–7, 15 | Q0–Q7 parallel outputs | CMOS 3-state outputs; active LOW on OE enables 8-bit parallel data delivery to buses or LEDs. |
| 8 | GND | Ground reference for all internal logic and output stages; must be low-impedance for stable switching. |
| 9 | Q7S serial output | Shift register MSB output; connects to DS of next device for cascaded 16-/24-bit shift chains. |
| 10 | MR (Master Reset) | Asynchronous active-LOW input; clears shift register only - storage register retains prior latched data. |
| 11 | SHCP (Shift Clock) | Rising-edge-triggered clock for serial data shifting; independent of STCP to prevent output glitches. |
| 12 | STCP (Storage Clock) | Rising-edge-triggered clock that transfers shift register contents to output latches - controls update timing. |
| 13 | OE (Output Enable) | Active-LOW control for 3-state outputs; no effect on internal registers - enables bus sharing without data corruption. |
| 14 | DS (Data Serial input) | Serial data input synchronized to SHCP; accepts standard logic levels across full 1.0–3.6 V supply range. |
| 16 | VCC | Positive supply rail; decoupling capacitor (100 nF) required near pin for stable high-speed operation. |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent clocks | Separate SHCP and STCP inputs eliminate race conditions - allows continuous serial loading while holding stable parallel outputs. |
| Bus-driver output strength | 8 mA sink/source capability at 3.0 V - directly interfaces with LEDs, relays, and standard logic without external drivers. |
| Wide voltage operation | 1.0 V to 3.6 V supply range - supports mixed-voltage systems and battery-powered designs down to single-cell Li-ion (3.0 V). |
| Input clamp diodes | Integrated ESD protection diodes on all inputs - permits safe connection to signals up to VCC + 0.5 V using series resistors. |
| High-temp qualification | Specified from -40 °C to +125 °C - validated for use in engine control units, power supplies, and industrial PLC I/O modules. |
Applications
| LED Matrix Driver | Microcontroller GPIO Expander |
|---|---|
|
Use Scenario: Driving 8×8 monochrome LED displays in signage or instrumentation panels using SPI-controlled serial data. IC Role / Device Role: Serial-to-parallel converter that translates MCU SPI output into parallel column/row enable signals. Use Value: Reduces MCU pin count from 16 to 3 (CLK, DATA, LATCH), while 8 mA outputs drive LEDs directly without transistors. |
Use Scenario: Adding 8 digital output pins to an STM32F4 with limited GPIO, controlling solenoids and status indicators. IC Role / Device Role: Output expander synchronized to MCU's hardware SPI peripheral for deterministic timing. Use Value: Enables precise STCP-aligned output updates - avoids partial-frame flicker during multi-byte writes. |
| Industrial Serial Bus Interface | Remote Sensor Data Register |
|
Use Scenario: Cascading four 74LV595D devices to form a 32-bit parallel output for PLC output modules. IC Role / Device Role: Daisy-chained shift register providing isolated, latched digital outputs for relay banks. Use Value: Q7S-to-DS chaining eliminates need for additional control lines; 3-state OE allows shared bus access during diagnostics. |
Use Scenario: Holding sensor alarm states (e.g., temperature, pressure) from distributed field nodes until polled by host controller. IC Role / Device Role: Remote holding register updated via RS-485 UART bit-banging, then read in parallel. Use Value: Asynchronous MR allows global reset of alarm flags; STCP ensures atomic capture of all 8 sensor bits simultaneously. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 8-bit serial-in/parallel-out shift register applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74HC595N | Higher VCC range (2 V–6 V); slower max fCLK (25 MHz at 4.5 V); no 1.0 V operation. | Not suitable for 1.8 V systems; higher VOL at 3.3 V (0.33 V vs. 0.25 V) reduces noise margin. | Select if legacy 5 V design requires pin compatibility and higher drive at 5 V; avoid for low-voltage battery systems. |
| 74AHC595PW | Faster propagation (10 ns typ at 3.3 V); identical SO16 footprint; same 1.0–3.6 V range. | Higher ICC (160 μA max vs. 20 μA) increases static power; identical functionality otherwise. | Choose for timing-critical applications requiring <12 ns tpd; accept higher quiescent current for speed gain. |
Compared with SN74HC595N and 74AHC595PW, the 74LV595D,112 uniquely balances ultra-low-voltage operation (1.0 V), industry-grade temperature range (-40 °C to +125 °C), and optimized 3.3 V timing - making it preferred for modern embedded systems where supply headroom and thermal robustness are constrained.
Availability
74LV595D,112 is available at Aetrix Electronics and suitable for LED display drivers, microcontroller GPIO expansion, industrial PLC output modules, and remote sensor register applications requiring stable component supply across extended temperature ranges.
Supply support for 74LV595D,112 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a leading Dutch semiconductor manufacturer specializing in high-performance logic, analog, and discrete components for automotive, industrial, and consumer markets.
The 74LV logic family targets low-voltage, high-reliability applications - designed specifically for energy-efficient systems operating from 1.0 V to 3.6 V while maintaining robust noise immunity and extended temperature performance.
FAQ
What is the minimum supply voltage for guaranteed operation of the 74LV595D,112?
The 74LV595D,112 is fully specified from 1.0 V to 3.6 V. At VCC = 1.0 V, it guarantees VIH ≥ 0.9 V and VIL ≤ 0.3 V, with propagation delays up to 95 ns (SHCP→Q7S). All DC and AC parameters in Table 5 and Table 7 are validated across this range, including -40 °C to +125 °C operation.
Can the 74LV595D,112 be used in cascaded configurations, and what is required for reliable daisy-chaining?
Yes - Q7S (pin 9) provides the serial output for cascading. To ensure reliable daisy-chaining, connect Q7S of one device to DS (pin 14) of the next, synchronize all SHCP and STCP lines, and assert OE (pin 13) LOW only after all shift registers are loaded and STCP is pulsed. Propagation delay between Q7S and DS must exceed tsu (15 ns min at 3.3 V) for the downstream device.
How does the master reset (MR) affect the storage register and parallel outputs?
MR (pin 10) asynchronously clears only the 8-bit shift register; it has no effect on the storage register contents or the parallel outputs (Q0–Q7). Outputs retain their last latched state until STCP is pulsed. This allows safe initialization of serial data paths without disrupting active parallel outputs - critical in live-control systems.
Is the 74LV595D,112 pin-compatible with older 74HC595 designs, and what layout changes are needed?
Yes - the SO16 (SOT109-1) package and pinout are identical to 74HC595 and 74AHC595. No PCB layout change is required. However, due to lower VOL (0.25 V max at 3.0 V) and tighter VIH/VIL thresholds, verify that driving sources meet LV logic levels; 3.3 V CMOS outputs are compatible, but 5 V TTL may require level translation for reliable VIH.
74LV595D,112 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- 74LV
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Logic Type:
- Shift Register
- Output Type:
- Tri-State
- Number of Elements:
- 1
- Number of Bits per Element:
- 8
- Function:
- Serial to Parallel, Serial
- Voltage - Supply:
- 1V ~ 3.6V
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SO
74LV595D,112 FAQ
1.How can I place an order for 74LV595D,112 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74LV595D,112 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74LV595D,112 reliable?
The price and inventory of 74LV595D,112 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74LV595D,112 is usually 5 days.
3.What payment methods are accepted for 74LV595D,112?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74LV595D,112 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 74LV595D,112?
74LV595D,112 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74LV595D,112 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74LV595D,112?
For technical support, including 74LV595D,112 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74LV595D,112 requirements.
6.How does Aetrix verify that 74LV595D,112 is sourced from the original manufacturer or authorized distributors?
All 74LV595D,112 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74LV595D,112 meets industry standards.
7.What is the process for return or replacement of 74LV595D,112?
All 74LV595D,112 units undergo pre-shipment inspection (PSI). If there is an issue with 74LV595D,112, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74LV595D,112 part is unused and in its original packaging.
Return procedure for 74LV595D,112:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
74LV595D,112 Tags
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Texas Instruments
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SN74HC595DR
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74HC595PW,118
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HEF4094BT,653
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74HC595D,118
Nexperia USA Inc.
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SN74HC595PWR
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74HC165D,653
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SN74LV165APWR
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74HC595BQ,115
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74HC165BQ,115
Nexperia USA Inc.
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CD4094BPWR
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