Diodes Incorporated 74LVC06AT14-13

Overview

74LVC06AT14-13 from Diodes Incorporated is a hex inverter IC with six independent open-drain outputs, operating across 1.65V–5.5V supply, tolerating 5.5V inputs, and supporting partial power-down via IOFF. It enables wired-OR/AND logic in voltage translation and signal isolation circuits for mixed-voltage systems.

For engineers reviewing the 74LVC06AT14-13 datasheet, 74LVC06AT14-13 pinout, 74LVC06AT14-13 application, or 74LVC06AT14-13 equivalent, key selection criteria include open-drain sink capability (24mA @ 3.3V), IOFF-enabled backflow protection, 5.5V-tolerant inputs, and TSSOP-14 thermal performance (θJA = 159°C/W).

Technical Context

The 74LVC06AT14-13 implements six identical CMOS inverters with open-drain outputs, requiring external pull-up resistors to define high-level logic states. Its IOFF circuit actively disables outputs during VCC = 0V, preventing current backflow into powered subsystems.

Input voltage tolerance up to 5.5V-regardless of VCC level-enables bidirectional level shifting between 1.8V, 2.5V, 3.3V, and 5V domains. Propagation delay ranges from 1.7ns (typ, 5V) to 7.6ns (max, –40°C to +125°C at 1.65V), with input transition rate limits specified per VCC range.

Key Specifications

Pinout & Package

TSSOP-14 surface-mount package (4.9mm × 4.4mm × 1.1mm), lead-free and RoHS-compliant, optimized for high-density PCB layouts with 0.65mm pitch and θJA = 159°C/W.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar hex inverter applications.

Compared with SN74LVC06APWR, the 74LVC06AT14-13 offers lower typical supply current and broader industrial temperature support (–40°C to +125°C), while the 74AHC06PW lacks IOFF and input overvoltage tolerance-making it incompatible with mixed-voltage or hot-plug architectures.

Availability

74LVC06AT14-13 is available at Aetrix Electronics and suitable for industrial I/O expansion, USB power control, and PCIe presence detection requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant packaging.

Supply support for 74LVC06AT14-13 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Diodes Incorporated is a global manufacturer of discrete semiconductors and analog ICs, specializing in high-reliability, energy-efficient components for industrial, computing, and consumer markets.

The 74LVC06AT14-13 belongs to Diodes' LVC logic family-designed specifically for low-voltage, mixed-signal interface applications demanding wide VCC range, IOFF safety, and robust ESD immunity.

FAQ

Can the 74LVC06AT14-13 drive a 10kΩ pull-up resistor to 5V while maintaining valid logic levels?

Yes. With 24mA sink capability at 3.3V, the device pulls output below 0.6V at 12mA load (per datasheet VOL spec), ensuring >4.4V HIGH margin with a 10kΩ pull-up to 5V. At 3.3V VCC, VOL remains ≤0.3V under 100μA load-fully compatible with TTL and CMOS thresholds.

Does the IOFF feature activate automatically when VCC = 0V?

Yes. IOFF engages whenever VCC is near 0V, disabling all outputs regardless of input state. Measured IOFF leakage is ≤20μA at 3.6V, preventing back-current flow into powered downstream circuits during partial power-down sequences.

What is the maximum capacitive load the 74LVC06AT14-13 can drive without violating timing specs?

The device specifies switching characteristics up to 50pF load capacitance (per test condition in DS35259 Rev. 5–2, p.6). Driving >50pF increases propagation delay nonlinearly; for 100pF loads, measured tPLZ increases by ~35% at 3.3V-requiring layout optimization or buffering.

Is the TSSOP-14 package thermally adequate for continuous 24mA per output operation?

Yes. At full 24mA sink per output (6 channels = 144mA total IOUT), power dissipation remains <100mW (based on VOL ≈0.55V). With θJA = 159°C/W, junction rise is <16°C above ambient-well within the 150°C TJ(max) limit even at +125°C ambient.