NXP Semiconductors 74LVC10AD,118
- Part No.:
- 74LVC10AD,118
- Manufacturer:
- NXP Semiconductors
- Category:
- Gates and Inverters
- Package:
- -
- Datasheet:
-
74LVC10AD,118.pdf
- Description:
- IC GATE NAND
- Quantity:
- Payment:

- Shipping:

Inventory:15,000
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
74LVC10AD from Nexperia is a triple 3-input NAND gate logic IC operating across 1.2 V to 3.6 V supply, with 5.5 V-tolerant inputs enabling mixed-voltage level translation between 3.3 V and 5 V systems. It delivers three independent NAND functions in SO14 (SOT108-1) package, supports -40 °C to +125 °C ambient operation, and exhibits typical propagation delay of 2.4 ns at 3.3 V - used in digital control sequencing, address decoding, and bus arbitration circuits.
For engineers reviewing the 74LVC10AD datasheet, 74LVC10AD pinout, 74LVC10AD application, or 74LVC10AD equivalent, this device is selected for low-voltage logic interfacing where input voltage tolerance, CMOS power efficiency, and JEDEC-compliant latch-up immunity are critical design requirements.
Technical Context
The 74LVC10AD implements three independent 3-input NAND gates using advanced CMOS process technology, supporting rail-to-rail input voltage swing up to 5.5 V while powered from as low as 1.2 V. Its logic function follows standard Boolean NAND truth table with active-low output behavior and no internal feedback or enable control.
It operates within JEDEC-standard voltage ranges (JESD8-7A, JESD8-5A, JESD8-C/JESD36), features HBM ESD protection exceeding 2000 V and CDM protection exceeding 1000 V, and maintains specified static and dynamic performance across full industrial temperature range (-40 °C to +125 °C).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 1.2 V to 3.6 V - enables direct integration into low-power 1.8 V and 3.3 V systems without level-shifting circuitry. |
| Input Voltage Tolerance | Up to 5.5 V - allows safe connection to legacy 5 V TTL outputs without external clamping diodes. |
| Propagation Delay (tpd) | 2.4 ns typical at VCC = 3.3 V - supports high-speed combinational logic in timing-critical paths. |
| Output Drive Strength | ±24 mA at VCC = 3.0 V - sufficient to drive multiple LVC/LVT inputs or small capacitive loads (≤30 pF). |
| Operating Temperature | -40 °C to +125 °C - qualified for under-hood automotive modules and industrial motor control environments. |
| Power Dissipation (Ptot) | 500 mW max at Tamb ≤ 100 °C (SO14) - thermal derating begins at 10.1 mW/K above 100 °C. |
| Input Leakage Current | ±0.1 μA typical at VCC = 3.6 V - ensures minimal current draw in battery-backed or always-on logic states. |
Pinout & Package
74LVC10AD is housed in SO14 plastic small outline package (SOT108-1), 14-pin, body width 3.9 mm, with gull-wing leads and pin 1 index marked on top surface.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1A, 2A, 3A | Data Input (Gate A, B, C) | Three independent first inputs per NAND gate; 5.5 V tolerant, compatible with TTL/CMOS logic families. |
| 1B, 2B, 3B | Data Input (Gate A, B, C) | Three independent second inputs per NAND gate; identical electrical characteristics to 1A/2A/3A. |
| 1C, 2C, 3C | Data Input (Gate A, B, C) | Three independent third inputs per NAND gate; fully interchangeable with other input pins. |
| 1Y, 2Y, 3Y | Data Output (Gate A, B, C) | Active-low open-drain–compatible outputs; each drives one NAND result with CMOS push-pull structure. |
| VCC | Supply Voltage | Primary power rail (1.2–3.6 V); must be decoupled locally with 100 nF ceramic capacitor near pin 14. |
| GND | Ground Reference | 0 V reference for all I/O and internal logic; connects to system ground plane with low-inductance path. |
Key Features
| Feature | Design Value |
|---|---|
| Wide Supply Range | 1.2 V to 3.6 V operation enables drop-in replacement in both 1.8 V and 3.3 V logic domains without redesign. |
| 5.5 V-Tolerant Inputs | Eliminates need for external level translators when interfacing with 5 V microcontrollers or legacy peripherals. |
| JEDEC-Compliant Latch-Up Immunity | Exceeds 250 mA - ensures robustness against transient current surges in noisy industrial environments. |
| Low Dynamic Power | CPD = 8.8 pF at 3.3 V - reduces switching power consumption in high-frequency clocked logic applications. |
| Extended Temperature Range | -40 °C to +125 °C - validated for use in automotive engine control units and industrial PLC backplanes. |
Applications
| Industrial Motor Control | Automotive Body Controller |
|---|---|
|
Use Scenario: Logic-level signal conditioning for PWM enable/disable sequencing across multiple motor drivers. IC Role / Device Role / Timing Role: NAND gate implements AND-NOT logic to combine fault signals and enable commands before driving gate drivers. Use Value: 5.5 V input tolerance allows direct interface with 5 V CAN transceiver status lines while powered from 3.3 V MCU rail. |
Use Scenario: Door lock actuator interlock logic preventing simultaneous forward/reverse activation. IC Role / Device Role / Timing Role: Each NAND gate processes three sensor inputs (door position, key fob presence, timeout flag) to generate safe actuation enable. Use Value: -40 °C to +125 °C rating ensures reliable operation inside door modules exposed to extreme cabin temperatures. |
| Embedded System Address Decoding | IoT Sensor Hub Signal Conditioning |
|
Use Scenario: Chip select generation for peripheral memory mapping in resource-constrained microcontroller designs. IC Role / Device Role / Timing Role: Three independent NAND gates decode upper address bits to activate SPI flash, EEPROM, and ADC peripherals. Use Value: 2.4 ns propagation delay preserves timing margins in 20 MHz bus systems with tight setup/hold windows. |
Use Scenario: Wake-up logic combining motion, light, and button press signals to trigger ultra-low-power MCU sleep exit. IC Role / Device Role / Timing Role: NAND gate performs active-low OR function (via De Morgan's law) to assert wake interrupt on any event. Use Value: 0.1 μA input leakage minimizes quiescent current in battery-powered nodes requiring multi-year shelf life. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar triple 3-input NAND gate applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC10APW | TSSOP14 (SOT402-1) package; 0.65 mm lead pitch; 0.8 mm height - 30 % smaller footprint than SO14. | Better thermal resistance (7.3 mW/K derating above 81 °C) but lower mechanical robustness in high-vibration environments. | Select for space-constrained PCBs where reflow compatibility and automated assembly are prioritized over manual repairability. |
| 74AHC10PW | Higher VCC range (2 V to 5.5 V); faster tpd (2.1 ns @ 5 V); higher ICC (20 μA typical) - not 5.5 V input tolerant at VCC < 4.5 V. | Requires ≥4.5 V supply to accept 5 V inputs; unsuitable for 1.8 V or 2.5 V domains where 74LVC10AD operates natively. | Choose only when system runs exclusively at 5 V and sub-2.5 ns speed is mandatory; verify input voltage compliance per operating condition. |
Compared with SN74LVC10APW and 74AHC10PW, the 74LVC10AD uniquely balances 1.2 V minimum supply, 5.5 V input tolerance, and SO14 mechanical reliability - making it optimal for mixed-voltage industrial controllers where field serviceability and wide-rail compatibility are non-negotiable.
Availability
74LVC10AD is available at Aetrix Electronics and suitable for industrial motor control, automotive body electronics, embedded address decoding, and IoT sensor hub applications requiring stable component supply across extended temperature and voltage ranges.
Supply support for 74LVC10AD includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert headquartered in Nijmegen, Netherlands, specializing in high-volume logic, discrete, and MOSFET solutions with emphasis on reliability, efficiency, and manufacturability.
The 74LVC10AD belongs to Nexperia's LVC (Low-Voltage CMOS) logic family, engineered for interoperability across voltage domains and optimized for low-power, high-noise-immunity digital interfacing in industrial and automotive subsystems.
FAQ
Can 74LVC10AD operate reliably at 1.2 V supply?
Yes. The device is fully specified down to 1.2 V supply voltage per JEDEC JESD8-7A, with guaranteed VIH/VIL thresholds, propagation delay (13 ns max), and output drive capability at that rail. Static and dynamic parameters are validated across -40 °C to +125 °C at 1.2 V.
Is pin 7 (GND) the only ground connection required?
Yes. Pin 7 is the sole dedicated GND terminal. No secondary ground or thermal pad grounding is required. The SO14 package has no exposed thermal pad; all grounding is achieved through pin 7's bond wire and PCB copper pour connection.
What is the maximum capacitive load the outputs can drive?
Each output is characterized up to 50 pF load capacitance at VCC = 3.0–3.6 V with 500 Ω termination, maintaining 2.4 ns typical tpd and VOH/VOL specs. Driving >50 pF increases propagation delay nonlinearly and may require series termination or buffer staging.
Does 74LVC10AD support hot insertion?
No. The device lacks explicit hot-swap protection circuitry. While 5.5 V-tolerant inputs reduce risk during partial power-up, VCC must be stable before applying input signals to avoid undefined output states or increased ICC during transition periods.
74LVC10AD,118 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- 74LVC
- Package/Case:
- -
- Packaging:
- Bulk
- Product Status:
- Active
- Logic Type:
- -
- Number of Circuits:
- -
- Number of Inputs:
- -
- Features:
- -
- Voltage - Supply:
- -
- Current - Quiescent (Max):
- -
- Current - Output High, Low:
- -
- Input Logic Level - Low:
- -
- Input Logic Level - High:
- -
- Max Propagation Delay @ V, Max CL:
- -
- Operating Temperature:
- -
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- -
- Supplier Device Package:
- -
74LVC10AD,118 FAQ
1.How can I place an order for 74LVC10AD,118 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74LVC10AD,118 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74LVC10AD,118 reliable?
The price and inventory of 74LVC10AD,118 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74LVC10AD,118 is usually 5 days.
3.What payment methods are accepted for 74LVC10AD,118?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74LVC10AD,118 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 74LVC10AD,118?
74LVC10AD,118 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74LVC10AD,118 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74LVC10AD,118?
For technical support, including 74LVC10AD,118 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74LVC10AD,118 requirements.
6.How does Aetrix verify that 74LVC10AD,118 is sourced from the original manufacturer or authorized distributors?
All 74LVC10AD,118 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74LVC10AD,118 meets industry standards.
7.What is the process for return or replacement of 74LVC10AD,118?
All 74LVC10AD,118 units undergo pre-shipment inspection (PSI). If there is an issue with 74LVC10AD,118, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74LVC10AD,118 part is unused and in its original packaging.
Return procedure for 74LVC10AD,118:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
74LVC10AD,118 Tags
-
SN74LVC1G14DBVR
Texas Instruments
-
SN74LVC1G14DCKR
Texas Instruments
-
SN74AHC1G14DBVR
Texas Instruments
-
SN74LVC1G08DBVR
Texas Instruments
-
SN74LVC1G08DCKR
Texas Instruments
-
SN74LVC1G32DCKR
Texas Instruments
-
SN74LVC1G04DBVR
Texas Instruments
.jpg)
-
74LVC1G08GW,125
Nexperia USA Inc.
-
SN74LVC1G04DCKR
Texas Instruments
-
SN74AHC1G08DBVR
Texas Instruments
-
SN74LVC1G32DBVR
Texas Instruments
-
SN74AHCT1G08DBVR
Texas Instruments
Tech Hub
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
LDO regulator guide covering low dropout voltage, power dissipation, thermal design, PSRR, output noise, capacitor stability, adjustable LDO circuits, LDO vs buck converter and datasheet selection chec…
Conditional Access Module guide covering CAM meaning, CI/CI+ interface, smart card authorization, DVB security workflow, TV and set-top box compatibility, internal electronics, ESD protection, connecto…
Guide to electronic component obsolescence covering EOL risk, PCN/PDN notices, last-time buy planning, replacement options, form-fit-function validation, counterfeit risk and BOM lifecycle management.
18650 battery guide covering lithium-ion cell basics, 3.6V/3.7V voltage, 4.2V charging, mAh and Wh capacity, protected cells, chargers, BMS, series-parallel packs, holders, welding and sourcing checks.…
Hall effect sensor guide covering working principle, linear and digital sensors, Arduino circuits, current sensing, speed detection, automotive applications, A3144 examples, signal filtering and datash…

