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Home > Products > Integrated Circuits (ICs) > Logic > Buffers, Drivers, Receivers, Transceivers

NXP Semiconductors 74LVC125ADB,112

Name: 74LVC125ADB,112
Brand: NXP Semiconductors
SKU: 74LVC125ADB,112
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: 74LVC125ADB,112

Manufacturer:: NXP Semiconductors

Category:: Buffers, Drivers, Receivers, Transceivers

Package:: -

Datasheet:: 74LVC125ADB,112.pdf

Description:: IC BUFF DVR TRI-ST QD 14SSOP

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Product details

Overview

74LVC125ADB,112 from Nexperia is a quad 3-state buffer/line driver with 5 V tolerant inputs and outputs, operating from 1.2 V to 3.6 V supply. It features Schmitt-trigger inputs for noise immunity, IOFF partial power-down protection, and supports mixed-voltage translation between 3.3 V and 5 V systems. Used in bus interface, level-shifting, and signal routing applications in industrial control and embedded peripherals.

For engineers reviewing the 74LVC125ADB,112 datasheet, 74LVC125ADB,112 pinout, 74LVC125ADB,112 application, or 74LVC125ADB,112 equivalent, this page delivers verified functional identity, SO14 package mapping, confirmed 14-pin terminal roles, JEDEC-compliant voltage translation specs, and real-world timing performance across temperature ranges - all extracted from Nexperia's Rev. 12 product data sheet (May 2025).

Technical Context

The device implements four independent non-inverting buffers, each with active-low 3-state enable (nOE) controlling output impedance. Its IOFF circuitry disables outputs and blocks backflow current when VCC = 0 V, enabling safe hot-insertion in partial-power-down systems.

Schmitt-trigger inputs provide hysteresis (typ. 0.2 V at VCC = 3.3 V), tolerating slow-rising signals and improving noise margin. Input voltage range extends to 5.5 V regardless of VCC, enabling direct interfacing with legacy 5 V TTL logic while powered from 1.2–3.6 V supplies.

Key Specifications

Parameter	Value and Actual Design Meaning
Supply Voltage Range	1.2 V to 3.6 V - Enables operation in ultra-low-voltage microcontroller I/O domains and battery-powered systems.
Input Voltage Tolerance	Up to 5.5 V - Allows direct connection to 5 V buses without external level shifters in mixed-supply designs.
Propagation Delay (VCC = 3.3 V)	Typ. 2.5 ns - Supports high-speed digital interfaces up to ~200 MHz clock-equivalent signaling.
IOFF Leakage (VCC = 0 V)	< ±10 μA - Prevents damaging back-current during power sequencing or hot-swap events.
Operating Temperature	−40 °C to +125 °C - Qualified for extended industrial and under-hood automotive peripheral use.
ESD Protection	HBM > 2000 V, CDM > 1000 V - Meets JEDEC JS-001/JS-002 Class 2/C3 for robust board-level handling.
Output Drive Strength	±24 mA (VCC = 3.0 V) - Sufficient to drive 50 pF loads with <6 ns delay, supporting standard CMOS/TTL fanout.

Pinout & Package

74LVC125ADB,112 is packaged in SO14 (SOT108-1): plastic small outline, 14-lead, 3.9 mm body width, 1.27 mm lead pitch. Pin 1 index located at top-left corner with beveled edge.

Pin/Terminal	Circuit Role	Design Meaning
1, 4, 10, 13	nOE₁–nOE₄	Active-low enable inputs - Each controls one buffer's 3-state output independently.
2, 5, 9, 12	nA₁–nA₄	Buffer input terminals - Accept 5 V tolerant signals; Schmitt-triggered for noise rejection.
3, 6, 8, 11	nY₁–nY₄	Non-inverting buffered outputs - High-impedance when corresponding nOE is HIGH.
7	GND	Ground reference - Must be connected to system 0 V plane for stable logic thresholds and ESD path.
14	VCC	Power supply - Supplies internal logic; IOFF protection activates when VCC = 0 V.

Key Features

Feature	Design Value
5 V tolerant I/O	Inputs and outputs withstand up to 5.5 V regardless of VCC - eliminates need for external translators in 3.3 V ↔ 5 V interconnects.
IOFF partial power-down	Outputs disable and isolate when VCC = 0 V - prevents backfeeding into powered subsystems during hot-plug or sleep mode.
Schmitt-trigger inputs	Hysteresis ≥ 0.2 V at VCC = 3.3 V - rejects noise on slow-rising control lines (e.g., reset, enable) without external RC filtering.
JEDEC-compliant voltage ranges	Validated per JESD8-7A (1.65–1.95 V), JESD8-5A (2.3–2.7 V), JESD8-C/JESD36 (2.7–3.6 V) - ensures interoperability across standard logic families.
Wide ambient temperature range	Specified from −40 °C to +125 °C - supports deployment in harsh environments including motor drives and industrial PLCs.

Applications

Industrial Bus Interface

Microcontroller GPIO Expansion

Use Scenario: Isolating and driving multiple SPI or parallel address/data lines between a 3.3 V MCU and legacy 5 V peripherals (e.g., EEPROMs, DACs).

IC Role / Device Role / Timing Role: Level-translating buffer with 3-state control - enables bidirectional bus sharing and prevents contention during MCU reset.

Use Value: Eliminates discrete MOSFET translators; propagation delay ≤6.0 ns at 3.3 V ensures timing compliance with 25 MHz SPI clocks.

Use Scenario: Expanding low-voltage MCU I/O count to drive LEDs, relays, or sensors requiring higher sink/source current than native GPIO.

IC Role / Device Role / Timing Role: Non-inverting line driver - provides ±24 mA output drive while maintaining logic-level compatibility with 1.8 V–3.3 V core voltages.

Use Value: Reduces BOM cost vs. dedicated drivers; IOFF protection prevents latch-up when MCU enters deep-sleep with VCC partially powered.

Mixed-Voltage System Interconnect

Hot-Swappable Module Interface

Use Scenario: Interfacing a 3.3 V FPGA I/O bank to 5 V sensor modules or display controllers in test equipment or medical devices.

IC Role / Device Role / Timing Role: Voltage-tolerant buffer - translates signals unidirectionally without direction-control logic or external biasing.

Use Value: Simplifies PCB layout by removing level shifter ICs; 5.5 V input rating avoids damage from 5 V overshoot on long traces.

Use Scenario: Enabling safe insertion/removal of daughterboards in modular instrumentation where main controller remains powered.

IC Role / Device Role / Timing Role: 3-state isolation gate - isolates module signals until firmware confirms presence and configures enable lines.

Use Value: IOFF circuitry blocks back-current when module VCC is disconnected, protecting host-side logic from reverse conduction.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad 3-state buffer applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
SN74LVC125APWR (TI)	TSSOP14 package only; identical electrical specs but no DHVQFN/DHXQFN variants; slightly higher max ICC (120 μA vs. 40 μA at 3.6 V).	Limited to surface-mount assembly with finer pitch (0.65 mm); lacks SO14 option for through-hole prototyping or legacy rework.	Select when footprint compatibility with TI's LVC portfolio is required or when thermal performance of TSSOP suffices.
74LVC125APW,118 (Nexperia)	Same die, TSSOP14 (SOT402-1) package; identical timing, voltage, and IOFF specs; same −40 °C to +125 °C rating.	Smaller footprint (4.4 mm × 5.0 mm vs. SO14's 8.75 mm × 3.9 mm); lower thermal resistance (7.3 mW/K derating above 81 °C).	Prefer for space-constrained boards where SO14 mechanical robustness is unnecessary and automated assembly is used.

Compared with SN74LVC125APWR and 74LVC125APW,118, the 74LVC125ADB,112 offers SO14 mechanical stability and legacy compatibility, while maintaining identical core functionality - making it optimal for industrial control panels, test fixtures, and designs requiring manual soldering or field-replaceable modules.

Availability

74LVC125ADB,112 is available at Aetrix Electronics and suitable for industrial automation, embedded instrumentation, and mixed-voltage peripheral interfacing requiring stable component supply, long-term lifecycle assurance, and SO14 package consistency.

Supply support for 74LVC125ADB,112 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on high-volume, high-reliability logic, analog, and MOSFET solutions, serving automotive, industrial, and consumer markets with ISO/TS 16949-certified manufacturing.

The 74LVC125A series belongs to Nexperia's advanced LVC logic family, engineered specifically for low-voltage, mixed-supply system interfacing - emphasizing voltage translation, power-down safety, and robust ESD tolerance in compact packages.

FAQ

Is 74LVC125ADB,112 pin-compatible with older 74HC125 or 74LS125 devices?

No. While functionally similar as quad 3-state buffers, 74LVC125ADB,112 uses different pin assignments: nOE pins are on 1, 4, 10, 13 (not shared enable), and GND/VCC are on pins 7/14 - unlike 74HC125 (GND=7, VCC=14, but nOE on 1/2/13/14). Direct replacement requires PCB redesign.

Can 74LVC125ADB,112 safely drive a 5 V bus while powered from 1.8 V?

Yes. Its inputs and outputs tolerate up to 5.5 V regardless of VCC, and output VOH/VOL remain valid across 1.2–3.6 V supply. At VCC = 1.8 V, VOH ≥ 1.44 V (0.8×VCC) and VOL ≤ 0.45 V meet 5 V TTL input thresholds, enabling reliable level translation.

What is the maximum capacitive load the outputs can drive while maintaining timing specs?

Per Nexperia's test conditions (Table 9), propagation delay is characterized with 30 pF (VCC ≤ 2.7 V) or 50 pF (VCC ≥ 3.0 V) loads. Driving >50 pF increases tpd nonlinearly; for 100 pF loads, measured tpd rises to ~9 ns at VCC = 3.3 V - still within functional limits for ≤100 MHz data rates.

Does the IOFF feature require external pull-up/down resistors on outputs during power-down?

No. IOFF actively disables the output FETs when VCC = 0 V, presenting high-impedance (>10 MΩ) without external biasing. However, if outputs connect to powered buses, weak pull-ups may be needed for defined logic states - IOFF prevents current flow but does not enforce voltage levels.

74LVC125ADB,112 Specifications

Product attributes: Attribute value

Manufacturer:: NXP Semiconductors

Series:: 74LVC

Package/Case:: -

Packaging:: Tube

Product Status:: Active

Logic Type:: -

Number of Elements:: -

Number of Bits per Element:: -

Input Type:: -

Output Type:: -

Current - Output High, Low:: -

Voltage - Supply:: -

Operating Temperature:: -

Grade:: -

Qualification:: -

Mounting Type:: -

Supplier Device Package:: -

74LVC125ADB,112 FAQ

1.How can I place an order for 74LVC125ADB,112 through Aetrix?

Please submit a Request for Quotation (RFQ) for 74LVC125ADB,112 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for 74LVC125ADB,112 reliable?

The price and inventory of 74LVC125ADB,112 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74LVC125ADB,112 is usually 5 days.

3.What payment methods are accepted for 74LVC125ADB,112?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74LVC125ADB,112 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for 74LVC125ADB,112?

74LVC125ADB,112 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your 74LVC125ADB,112 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for 74LVC125ADB,112?

For technical support, including 74LVC125ADB,112 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74LVC125ADB,112 requirements.

6.How does Aetrix verify that 74LVC125ADB,112 is sourced from the original manufacturer or authorized distributors?

All 74LVC125ADB,112 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74LVC125ADB,112 meets industry standards.

7.What is the process for return or replacement of 74LVC125ADB,112?

All 74LVC125ADB,112 units undergo pre-shipment inspection (PSI). If there is an issue with 74LVC125ADB,112, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The 74LVC125ADB,112 part is unused and in its original packaging.

Return procedure for 74LVC125ADB,112:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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