Diodes Incorporated 74LVC126AT14-13

Overview

74LVC126AT14-13 from Diodes Incorporated is a quadruple 3-state buffer IC with independent active-high output enable (OE) control per channel, operating across 1.65V–5.5V supply range and supporting 5.5V-tolerant inputs for mixed-voltage level shifting. It delivers ±24mA drive strength at 3.3V, features IOFF partial-power-down protection, and is packaged in RoHS-compliant TSSOP-14 for space-constrained logic interfacing in notebook and peripheral designs.

For engineers reviewing the 74LVC126AT14-13 datasheet, 74LVC126AT14-13 pinout, 74LVC126AT14-13 application, or 74LVC126AT14-13 equivalent, key selection criteria include VCC range compatibility, 3-state timing (tEN/tDIS), IOFF leakage (<20μA), and TSSOP-14 thermal resistance (θJA = 159°C/W) in high-density PCB layouts.

Technical Context

This device implements four non-inverting buffers with individually controlled 3-state outputs, each activated by a dedicated OE input. Its CMOS architecture enables rail-to-rail output swing and supports bidirectional voltage translation between 1.8V, 2.5V, 3.3V, and 5V domains without external components.

The IOFF circuit ensures outputs enter high-impedance state when VCC = 0V, blocking back-current flow during partial power-down sequences. Input thresholds scale with VCC (VIH = 0.65×VCC min), and propagation delay remains ≤4.5ns at 3.3V (tpd), enabling reliable operation in fast synchronous bus interfaces.

Key Specifications

Pinout & Package

TSSOP-14 package: 4.4mm × 5.0mm body, 0.65mm pitch, 1.0mm height, lead-free and halogen-free construction compliant with RoHS 3 and JEDEC MO-153.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 3-state buffer applications.

Compared with SN74LVC126APWR and 74LVC126ABQ,115, the 74LVC126AT14-13 provides superior thermal performance in standard TSSOP-14 layouts and avoids QFN assembly complexity, making it optimal for cost-sensitive industrial and computing designs requiring proven manufacturability.

Availability

74LVC126AT14-13 is available at Aetrix Electronics and suitable for USB peripheral interfaces, industrial PLC I/O modules, and notebook memory subsystems requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.

Supply support for 74LVC126AT14-13 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Diodes Incorporated is a global manufacturer of discrete semiconductors and analog ICs, specializing in high-reliability, energy-efficient components for computing, industrial, and automotive markets.

The 74LVC logic family targets low-voltage, mixed-signal interfacing applications requiring wide VCC range, voltage translation, and robust partial-power-down behavior in space-constrained systems.

FAQ

Can 74LVC126AT14-13 operate with VCC = 1.65V while accepting 5V inputs?

Yes. The device is fully specified for 1.65V–5.5V VCC operation and guarantees 5.5V input tolerance across this entire range. At 1.65V supply, VIH is 1.07V min (0.65×VCC), ensuring reliable recognition of 5V logic-high signals without damage or contention.

What is the maximum capacitive load the outputs can drive at 3.3V?

Each output can drive up to 50pF while maintaining guaranteed tPD ≤4.5ns and VOL ≤0.55V at IOH = –24mA. This supports standard 50Ω transmission lines and typical CMOS fan-out (≥10 loads) without signal degradation or timing violations.

Does IOFF functionality require external pull-down resistors on OE pins?

No. IOFF operates independently of OE state: when VCC = 0V, all outputs enter high-impedance regardless of OE voltage. OE pins may float or be left unconnected during power-down, as internal circuitry disables output FETs without external biasing.

How does the 74LVC126AT14-13 handle input transitions near VCC/2?

Input thresholds are VIL ≤0.35×VCC and VIH ≥0.65×VCC across all VCC values, creating a guaranteed 30% noise margin around VCC/2. At 3.3V, this yields 1.16V hysteresis (0.83V to 2.15V), preventing chatter during slow-rising or noisy signals.