NXP Semiconductors 74LVC161D,112
- Part No.:
- 74LVC161D,112
- Manufacturer:
- NXP Semiconductors
- Category:
- Counters, Dividers
- Package:
- -
- Datasheet:
-
74LVC161D,112.pdf
- Description:
- NEXPERIA 74LVC161D - BINARY COUN
- Quantity:
- Payment:

- Shipping:

Inventory:7,370
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
74LVC161D from Nexperia is a synchronous presettable 4-bit binary counter with asynchronous master reset (MR), internal look-ahead carry, and dual count-enable inputs (CEP/CET) for cascading. It operates from 1.2 V to 3.6 V, supports 3.3 V/5 V mixed-voltage interfacing via overvoltage-tolerant inputs (up to 5.5 V), and delivers terminal count (TC) pulse width ≈ Q0 HIGH duration-enabling reliable multi-stage counting in industrial control sequencers and digital timing circuits.
For engineers reviewing the 74LVC161D datasheet, 74LVC161D pinout, 74LVC161D application, or 74LVC161D equivalent, this device serves as a drop-in replacement for legacy 74HC/HCT161 in low-voltage, high-noise-margin designs requiring precise synchronous load, asynchronous clear, and deterministic TC edge timing across -40 °C to +125 °C.
Technical Context
The 74LVC161D implements four edge-triggered D-type flip-flops with synchronous parallel load (via PE), asynchronous active-LOW reset (MR), and combinational logic for terminal count generation. Its look-ahead carry architecture ensures TC assertion occurs within 7.8 ns (VCC = 3.0–3.6 V) after CET goes HIGH at terminal state (Q3Q2Q1Q0 = 1111), enabling clean propagation to next-stage counters without ripple delay accumulation.
Input Schmitt-trigger action provides immunity to slow-rising signals, while dual count-enable (CEP and CET) allows hierarchical enable control: CEP gates clock-to-output propagation, and CET directly enables TC output-supporting both synchronous counting and carry-chain synchronization in n-bit counter configurations.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Logic Family | LVC (Low-Voltage CMOS) - Enables 1.2 V–3.6 V operation with TTL-level compatibility and sub-μA static current. |
| Counter Width | 4-bit binary - Counts 0 to 15 (mod-16), with Q0–Q3 outputs and TC asserted only at 1111 state. |
| Max Clock Frequency | 150 MHz at VCC = 3.0–3.6 V - Supports high-speed timing in data acquisition and protocol state machines. |
| Propagation Delay (CP→Qn) | 1.5–7.3 ns (VCC = 3.0–3.6 V) - Ensures tight timing margins in synchronous logic chains. |
| Supply Voltage Range | 1.2 V to 3.6 V - Allows direct integration into battery-powered or mixed-supply systems without level shifters. |
| Input Overvoltage Tolerance | Up to 5.5 V - Permits safe interfacing with 5 V microcontrollers or legacy logic without external protection. |
| Operating Temperature | -40 °C to +125 °C - Qualified for under-hood automotive, industrial PLC, and outdoor embedded applications. |
Pinout & Package
74LVC161D is housed in a 16-pin SO16 plastic small outline package (SOT109-1), 3.9 mm body width, with standard JEDEC MS-012 footprint and gull-wing leads.
| Pin | Circuit Role | Design Meaning |
|---|---|---|
| 1 (MR) | Asynchronous master reset | Active-LOW signal forces Q0–Q3 = 0000 immediately, independent of clock or enable states. |
| 2 (CP) | Positive-edge clock input | Triggers all flip-flops simultaneously; rising edge advances count or loads data when enabled. |
| 3–6 (D0–D3) | Parallel data inputs | 4-bit value loaded into counter on CP↑ when PE = LOW, overriding current count state. |
| 7 (CEP) | Count enable (parallel) | MUST be HIGH for clock to affect counter; used for hierarchical gating of counting action. |
| 8 (GND) | Ground reference | 0 V return path for all internal logic and I/O; decoupling capacitor required near VCC pin. |
| 9 (PE) | Parallel enable | Active-LOW control: when LOW, D0–D3 are latched on next CP↑ regardless of CEP/CET state. |
| 10 (CET) | Count enable (terminal) | MUST be HIGH for TC output assertion; also feeds forward to enable TC pulse generation. |
| 11–14 (Q0–Q3) | Binary output bits | Q0 = LSB, Q3 = MSB; outputs drive standard LVC loads (±24 mA) with rail-to-rail swing. |
| 15 (TC) | Terminal count output | HIGH pulse ≈ Q0 HIGH duration at count = 15; used to cascade to next counter stage. |
| 16 (VCC) | Supply voltage | Primary power rail (1.2–3.6 V); requires local 100 nF ceramic decoupling to GND. |
Key Features
| Feature | Design Value |
|---|---|
| Synchronous parallel load with asynchronous reset | Enables deterministic initialization and state recovery without clock-domain conflicts. |
| Look-ahead carry for multi-stage cascading | Eliminates ripple delay in n-bit counters; TC output triggers next stage within one clock cycle. |
| Overvoltage-tolerant inputs (≤5.5 V) | Permits direct connection to 5 V logic in mixed-voltage systems without external translators. |
| Schmitt-trigger inputs | Accepts slow-rising/falling signals (e.g., mechanical switches, RC networks) without oscillation. |
| JEDEC-compliant voltage ranges | Validated per JESD8-7A (1.65–1.95 V), JESD8-5A (2.3–2.7 V), and JESD8-C/JESD36 (2.7–3.6 V). |
Applications
| Industrial Motion Control | Digital Panel Metering |
|---|---|
Use Scenario: Counting encoder pulses in servo motor position feedback loops with real-time reset on fault detection. IC Role / Device Role / Timing Role: Synchronous 4-bit counter with MR-driven zero-reset and TC-cascaded multi-axis coordination. Use Value: Asynchronous MR ensures immediate axis homing on error; TC pulse synchronizes secondary counters for 16-bit resolution without software overhead. |
Use Scenario: Accumulating sensor samples (e.g., ADC conversions) over fixed intervals before display update. IC Role / Device Role / Timing Role: Presettable binary counter generating periodic interrupt windows via TC edge detection. Use Value: PE-controlled preset allows dynamic interval adjustment (e.g., 12 → 15 counts); LVC low-power operation extends battery life in portable meters. |
| Automotive Lighting Sequencing | Programmable Logic Controller (PLC) Timers |
Use Scenario: Driving sequential LED turn-signal patterns using cascaded counters for 16-step animation cycles. IC Role / Device Role / Timing Role: Binary counter with TC output triggering next-stage enable in daisy-chained lighting modules. Use Value: Look-ahead carry ensures glitch-free transitions between stages; -40 °C to +125 °C rating supports under-hood deployment. |
Use Scenario: Implementing configurable on/off delay timers in modular PLC I/O racks with field-replaceable logic. IC Role / Device Role / Timing Role: Synchronous counter with parallel load for user-defined time constants (e.g., 0–15 × base clock period). Use Value: Dual CE inputs (CEP/CET) allow hardware-gated timer activation; overvoltage tolerance simplifies interface to 24 V industrial sensors. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 4-bit synchronous counter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 74LVC163D | Includes synchronous reset (instead of asynchronous MR); identical pinout and supply range. | Requires clocked reset sequence; unsuitable for immediate fault-clear scenarios where MR is mandatory. | Select 74LVC163D only if system design permits synchronous reset coordination and avoids critical timing hazards during reset. |
| SN74LV161APW | TSSOP16 package (SOT403-1); same electrical specs but 4.4 mm body width and finer pitch (0.65 mm). | Higher board density but requires rework-compatible layout; thermal resistance differs (8.5 mW/K derating above 91 °C). | Choose SN74LV161APW for space-constrained PCBs where SO16 footprint is unavailable and thermal profile permits. |
Compared with 74LVC161D, 74LVC163D trades asynchronous reset for synchronous control-reducing fault-response speed but improving metastability immunity-while SN74LV161APW offers identical functionality in a smaller package at the cost of soldering complexity and altered thermal derating behavior.
Availability
74LVC161D is available at Aetrix Electronics and suitable for industrial motion control, automotive lighting sequencing, and programmable logic controller (PLC) timer applications requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for 74LVC161D includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on high-volume, high-reliability logic, discrete, and MOSFET solutions for automotive, industrial, and consumer markets.
The 74LVC161D belongs to Nexperia's LVC logic family-designed specifically for low-voltage, mixed-signal systems demanding robust noise immunity, wide supply flexibility, and seamless 3.3 V/5 V interoperability.
FAQ
What is the minimum supply voltage for guaranteed operation of the 74LVC161D?
The 74LVC161D is fully specified down to 1.2 V supply voltage, with VIH/VIL thresholds scaling proportionally (e.g., VIH = 0.65 × VCC at 1.65–1.95 V). Below 1.2 V, functionality is not guaranteed per datasheet limits, and propagation delays increase significantly.
Can the 74LVC161D be used with a 5 V microcontroller driving its inputs?
Yes-the 74LVC161D inputs tolerate up to 5.5 V regardless of VCC level, allowing direct connection to 5 V GPIOs without level-shifting circuitry. Output voltages remain bounded by VCC (e.g., VOH ≈ VCC − 0.2 V), so 5 V MCU reading outputs requires pull-up or translation if VCC < 4.5 V.
How does the terminal count (TC) output behave during cascading?
TC goes HIGH only when CET = HIGH and Q3Q2Q1Q0 = 1111; its pulse width matches Q0's HIGH time. When cascading, TC drives CET of the next 74LVC161D, enabling synchronized advancement-no external logic needed for mod-256 or higher counting.
Is the 74LVC161D pin-compatible with older 74HC161 variants?
Yes-74LVC161D uses identical SO16 pinout (SOT109-1) as 74HC161, including MR, CP, D0–D3, Q0–Q3, PE, CEP, CET, TC, VCC, and GND assignments. However, VCC range differs (HC: 2–6 V; LVC: 1.2–3.6 V), so supply voltage must be verified before substitution.
74LVC161D,112 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- 74LVC
- Package/Case:
- -
- Packaging:
- Bulk
- Product Status:
- Active
- Logic Type:
- -
- Direction:
- -
- Number of Elements:
- -
- Number of Bits per Element:
- -
- Reset:
- -
- Timing:
- -
- Count Rate:
- -
- Trigger Type:
- -
- Voltage - Supply:
- -
- Operating Temperature:
- -
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- -
- Supplier Device Package:
- -
74LVC161D,112 FAQ
1.How can I place an order for 74LVC161D,112 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74LVC161D,112 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74LVC161D,112 reliable?
The price and inventory of 74LVC161D,112 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74LVC161D,112 is usually 5 days.
3.What payment methods are accepted for 74LVC161D,112?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74LVC161D,112 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 74LVC161D,112?
74LVC161D,112 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74LVC161D,112 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74LVC161D,112?
For technical support, including 74LVC161D,112 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74LVC161D,112 requirements.
6.How does Aetrix verify that 74LVC161D,112 is sourced from the original manufacturer or authorized distributors?
All 74LVC161D,112 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74LVC161D,112 meets industry standards.
7.What is the process for return or replacement of 74LVC161D,112?
All 74LVC161D,112 units undergo pre-shipment inspection (PSI). If there is an issue with 74LVC161D,112, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74LVC161D,112 part is unused and in its original packaging.
Return procedure for 74LVC161D,112:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
74LVC161D,112 Tags

-
74HC393BQ,115
Nexperia USA Inc.

-
SN74LV8154PWR
Texas Instruments
-
MC14516BDR2G
onsemi
-
MC14020BDR2G
onsemi

-
MC100EP32DTR2G
onsemi

-
MC100EP016AMNG
onsemi

-
MC100EP016AFAG
onsemi
-
SN74LV163ADR
Texas Instruments
-
SN74LV163APWR
Texas Instruments
-
SN74HC393DR
Texas Instruments
-
SN74HC161DR
Texas Instruments
-
SN74HC163DR
Texas Instruments
Tech Hub
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
LDO regulator guide covering low dropout voltage, power dissipation, thermal design, PSRR, output noise, capacitor stability, adjustable LDO circuits, LDO vs buck converter and datasheet selection chec…
Conditional Access Module guide covering CAM meaning, CI/CI+ interface, smart card authorization, DVB security workflow, TV and set-top box compatibility, internal electronics, ESD protection, connecto…
Guide to electronic component obsolescence covering EOL risk, PCN/PDN notices, last-time buy planning, replacement options, form-fit-function validation, counterfeit risk and BOM lifecycle management.
18650 battery guide covering lithium-ion cell basics, 3.6V/3.7V voltage, 4.2V charging, mAh and Wh capacity, protected cells, chargers, BMS, series-parallel packs, holders, welding and sourcing checks.…
Hall effect sensor guide covering working principle, linear and digital sensors, Arduino circuits, current sensing, speed detection, automotive applications, A3144 examples, signal filtering and datash…
Product Change Notification guide for electronic components, covering PCN meaning, PCN vs PDN/EOL, common change types, risk levels, form-fit-function review, engineering validation, BOM control, LTB/L…
A practical guide to blend door actuators, covering HVAC function, symptoms, location, AC and heater issues, reset and calibration, replacement cost, electrical diagnosis, compatibility checks, and rep…
Engineering guide to Raspberry Pi alternatives, covering chip-level differences, Orange Pi, ROCK, Jetson, Banana Pi, NanoPi, Compute Module, Pico, GPIO, camera, HAT compatibility, and replacement risks…

