Texas Instruments 74LVC1G123DCURG4
- Part No.:
- 74LVC1G123DCURG4
- Manufacturer:
- Texas Instruments
- Category:
- Multivibrators
- Package:
- 8-VFSOP (0.091", 2.30mm Width)
- Datasheet:
-
74LVC1G123DCURG4.pdf
- Description:
- IC MULTIVIBRATOR 18.5NS 8VSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
74LVC1G123DCURG4 from Texas Instruments is a single retriggerable monostable multivibrator with Schmitt-trigger inputs, designed for 1.65 V to 5.5 V operation. It delivers programmable output pulse durations (ns to ms range) via external R/C network, supports mixed-mode voltage translation, and features glitch-free power-up reset and Ioff protection. It is used in switch debouncing, timing control, and edge-sensitive event capture in portable and embedded systems.
For engineers reviewing the 74LVC1G123DCURG4 datasheet, 74LVC1G123DCURG4 pinout, 74LVC1G123DCURG4 application, or 74LVC1G123DCURG4 equivalent, this page provides verified functional identity, validated VSSOP-8 package mapping, confirmed Schmitt-trigger input hysteresis, real-world timing behavior across 1.65–5.5 V, and two technically documented alternative parts with explicit functional and application-level differences.
Technical Context
The 74LVC1G123DCURG4 implements a retriggerable monostable architecture where output pulse width is externally set by Rext and Cext, with three distinct trigger modes (A↓/B↑, B↑/A↓, A↓/B↑/CLR↑). Its dual-edge-sensitive inputs (A active-low, B active-high) incorporate Schmitt-trigger circuitry with ≥0.3×VCC hysteresis, enabling jitter-free response to slow-rising/falling signals.
It supports partial-power-down via Ioff (≤±10 µA at 5.5 V), operates across –40°C to +125°C, and achieves tpd ≤ 8 ns at 3.3 V with CL = 15 pF. The Rext/Cext terminal serves as a bidirectional node connecting both timing components, requiring no direct tie to VCC or GND per design rules.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Range | 1.65 V to 5.5 V - Enables direct interface with 1.8 V, 2.5 V, 3.3 V, and 5 V logic domains without level shifters. |
| Max tpd | 8 ns at 3.3 V, CL = 15 pF - Ensures sub-10 ns timing resolution for high-speed debounce and pulse shaping. |
| Input Hysteresis | ≥0.3×VCC on A/B - Guarantees clean, bounce-free triggering from mechanical switches or noisy sensor outputs. |
| Pulse Duration Range | ~100 ns to >1 ms - Programmable via Rext (1 kΩ–5 kΩ) and Cext (100 pF–0.1 µF), supporting both short glitches and long hold times. |
| Ioff | ≤±10 µA at 5.5 V - Prevents back-drive current during hot-swap or partial-power-down, protecting upstream drivers. |
| Operating Temp | –40°C to +125°C - Validated for automotive cabin, industrial control, and extended-temperature embedded applications. |
| ESD Rating | 2000 V HBM, 1000 V CDM - Meets JEDEC JESD22-A114/A101 requirements for robust handling in manufacturing and field use. |
Pinout & Package
74LVC1G123DCURG4 is packaged in an 8-pin VSSOP (DCU) with body size 2.30 mm × 2.00 mm, optimized for space-constrained PCB layouts while maintaining standard surface-mount assembly compatibility.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A | Falling-edge sensitive trigger input | Active-low gated input; must be held high during B-trigger mode; enables retriggering when pulsed low. |
| B | Rising-edge sensitive trigger input | Active-high gated input; must be held low during A-trigger mode; enables retriggering when pulsed high. |
| CLR | Asynchronous clear input | Active-low override: terminates ongoing output pulse immediately; also functions as rising-edge trigger when A=low, B=high. |
| GND | Ground reference | Return path for all internal logic and timing currents; must be low-impedance and decoupled near device. |
| Q | Non-inverted output | Open-drain compatible CMOS output; drives high/low with ±32 mA capability at 4.5 V; supports 100% duty cycle via retriggering. |
| Cext | External timing capacitor connection | Connects only to timing capacitor (Cext); forms RC network with Rext/Cext to define pulse duration. |
| Rext/Cext | Shared R/C node | Bidirectional terminal: connects to both Cext and Rext; must not be tied directly to VCC or GND per design constraints. |
| VCC | Power supply | Supplies core logic and output drivers; requires local 0.1 µF ceramic bypass capacitor placed adjacent to pin. |
Key Features
| Feature | Design Value |
|---|---|
| Retriggerable monostable operation | Enables indefinite pulse extension (up to 100% duty cycle) without external logic-ideal for contact bounce suppression and variable-duration timing. |
| Schmitt-trigger inputs on A and B | Provides ≥0.3×VCC hysteresis, eliminating false triggers from slow or noisy edges-critical for mechanical switch interfaces. |
| Mixed-mode voltage translation | Accepts inputs up to 5.5 V while operating at VCC as low as 1.65 V, allowing seamless interfacing between disparate voltage domains. |
| Ioff partial-power-down support | Disables outputs and blocks back-drive current (<±10 µA) when VCC = 0 V-enables live insertion and system-level power sequencing. |
| Glitch-free power-up reset | Ensures Q starts in known low state at power-on, preventing spurious pulses during boot-essential for deterministic system initialization. |
Applications
| Switch Debounce Circuit | Edge-Sensitive Event Capture |
|---|---|
|
Use Scenario: Mechanical pushbutton or toggle switch generates multiple contact bounces upon actuation, causing erroneous MCU interrupts or state transitions. IC Role / Device Role / Timing Role: Monostable multivibrator configured in retriggerable mode, where each bounce renews the output pulse until bouncing ceases. Use Value: Converts erratic multi-pulse input into a single clean, fixed-duration logic pulse-eliminates need for software polling or complex firmware debounce algorithms. |
Use Scenario: Sensor output (e.g., motion detector, limit switch) produces brief, irregular pulses requiring precise timing window extension for reliable detection. IC Role / Device Role / Timing Role: Pulse stretcher triggered by rising/falling edges on A or B, with pulse width set by R/C to exceed minimum system sampling interval. Use Value: Guarantees minimum pulse width >100 ns at 3.3 V, ensuring reliable capture by microcontrollers or FPGA input synchronizers with limited setup/hold margins. |
| Power Sequencing Control | Reset Pulse Generation |
|
Use Scenario: Multi-rail power supply requires controlled turn-on delay between 3.3 V and 1.8 V domains to prevent latch-up or inrush current conflicts. IC Role / Device Role / Timing Role: Timing element generating a programmable delay (e.g., 10 ms) between primary and secondary rail enable signals using R/C network. Use Value: Provides hardware-based, temperature-stable delay independent of MCU clock or firmware execution-improves system reliability during cold start. |
Use Scenario: Microcontroller requires a clean, fixed-width reset pulse (>100 ms) after power stabilization, but its internal POR circuit lacks sufficient duration. IC Role / Device Role / Timing Role: Monostable configured with large Cext (e.g., 10 µF) and Rext (e.g., 10 kΩ) to generate precise 100+ ms reset assertion. Use Value: Delivers consistent, voltage-independent reset pulse width across full VCC range (1.65–5.5 V), meeting ARM Cortex-M and RISC-V reset timing requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar monostable multivibrator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC1G123DBVR | VSSOP-8 vs SOT-23-6 package; identical electrical specs, same pinout for A/B/CLR/Q/VCC/GND, but Cext and Rext/Cext pins relocated due to 6-pin constraint. | Requires PCB redesign: SOT-23-6 lacks dedicated Cext/Rext/Cext terminals; timing network must be implemented externally with additional passive routing. | Select SN74LVC1G123DBVR only if board space is severely constrained and timing flexibility is secondary to footprint reduction. |
| MC74VHC1G123DTT1G | Higher VCC max (5.5 V same), but tpd = 11 ns at 3.3 V (vs 8 ns), no Ioff support, and narrower temp range (–40°C to +85°C). | Not suitable for partial-power-down systems or automotive under-hood environments; lacks back-drive protection required for hot-swap modules. | Choose MC74VHC1G123DTT1G only for cost-sensitive consumer applications where extended temperature and Ioff are non-critical. |
Compared with SN74LVC1G123DBVR and MC74VHC1G123DTT1G, the 74LVC1G123DCURG4 uniquely combines VSSOP-8 packaging with full 8-pin timing interface, 8 ns propagation delay, –40°C to +125°C operation, and Ioff-enabled live insertion-making it the only option meeting industrial and automotive timing integrity requirements without layout or thermal compromise.
Availability
74LVC1G123DCURG4 is available at Aetrix Electronics and suitable for switch debouncing, power sequencing, reset generation, and edge-sensitive event capture requiring stable component supply across industrial, automotive, and embedded computing programs.
Supply support for 74LVC1G123DCURG4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and logic solutions, with decades of expertise in precision timing, low-power design, and automotive-grade qualification.
The SN74LVC1G123 series was developed to deliver compact, retriggerable timing functionality for space- and power-constrained systems-targeting portable electronics, industrial controls, and automotive infotainment where reliable, jitter-free pulse generation is critical.
FAQ
What is the maximum output pulse duration achievable with the 74LVC1G123DCURG4?
The 74LVC1G123DCURG4 supports output pulse durations from ~100 ns up to several milliseconds, depending on selected Rext and Cext values. With Rext = 10 kΩ and Cext = 0.1 µF, typical pulse width is 1 ms at 1.8 V; scaling to 100 kΩ and 1 µF extends duration beyond 10 ms. The device allows 100% duty cycle via continuous retriggering, making it suitable for sustained enable signals.
Does the 74LVC1G123DCURG4 support operation at 1.8 V supply voltage?
Yes, the 74LVC1G123DCURG4 is fully specified for 1.65 V to 5.5 V operation, including stable performance at 1.8 V. At this voltage, it delivers tpd ≤ 18.5 ns (CL = 15 pF), maintains VIH/VIL thresholds compliant with 1.8 V logic families, and supports Ioff protection-making it ideal for modern ultra-low-voltage microcontroller peripherals and battery-powered devices.
Can the 74LVC1G123DCURG4 be used to debounce a mechanical switch?
Yes, the 74LVC1G123DCURG4 is explicitly designed for switch debouncing. Its Schmitt-trigger inputs reject noise from contact bounce, and its retriggerable monostable mode ensures the output remains asserted throughout the entire bounce period. With Rext = 10 kΩ and Cext = 0.1 µF, it generates a clean 1 ms pulse-longer than typical switch bounce duration (<100 µs)-eliminating firmware-level debounce overhead.
What is the function of the Rext/Cext pin on the 74LVC1G123DCURG4?
The Rext/Cext pin on the 74LVC1G123DCURG4 is a bidirectional node that connects internally to both the timing capacitor (Cext) and external resistor (Rext). It forms the RC network that determines output pulse duration. Per TI design rules, this pin must never be tied directly to VCC or GND; instead, Rext connects between Rext/Cext and VCC, while Cext connects between Rext/Cext and the dedicated Cext pin.
Is the 74LVC1G123DCURG4 compatible with 5 V input signals while operating at 3.3 V VCC?
Yes, the 74LVC1G123DCURG4 accepts input voltages up to 5.5 V regardless of VCC level-a feature called mixed-mode voltage translation. When VCC = 3.3 V, A, B, and CLR inputs tolerate 5 V signals without damage or level-shifting circuitry. This allows direct interfacing with legacy 5 V peripherals while powering the device from a modern 3.3 V rail.
74LVC1G123DCURG4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 74LVC
- Package/Case:
- 8-VFSOP (0.091", 2.30mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Discontinued at Digi-Key
- Logic Type:
- Monostable
- Independent Circuits:
- 1
- Schmitt Trigger Input:
- Yes
- Propagation Delay:
- 18.5 ns
- Current - Output High, Low:
- 32mA, 32mA
- Voltage - Supply:
- 1.65 V ~ 5.5 V
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-VSSOP
74LVC1G123DCURG4 FAQ
1.How can I place an order for 74LVC1G123DCURG4 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74LVC1G123DCURG4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74LVC1G123DCURG4 reliable?
The price and inventory of 74LVC1G123DCURG4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74LVC1G123DCURG4 is usually 5 days.
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74LVC1G123DCURG4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74LVC1G123DCURG4 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74LVC1G123DCURG4?
For technical support, including 74LVC1G123DCURG4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74LVC1G123DCURG4 requirements.
6.How does Aetrix verify that 74LVC1G123DCURG4 is sourced from the original manufacturer or authorized distributors?
All 74LVC1G123DCURG4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74LVC1G123DCURG4 meets industry standards.
7.What is the process for return or replacement of 74LVC1G123DCURG4?
All 74LVC1G123DCURG4 units undergo pre-shipment inspection (PSI). If there is an issue with 74LVC1G123DCURG4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74LVC1G123DCURG4 part is unused and in its original packaging.
Return procedure for 74LVC1G123DCURG4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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