Nexperia USA Inc. 74LVC1G157GF,132

Overview

74LVC1G157GF,132 from Nexperia is a single 2-input CMOS multiplexer with Schmitt-trigger inputs, IOFF partial power-down protection, and dual-voltage translation capability (1.65 V to 5.5 V supply). It selects between two data sources (I0/I1) using a common select input (S), delivering the chosen signal to output Y. Used in mixed-voltage logic interfacing, level-shifting I/O expansion, and low-power signal routing in portable and industrial control systems.

For engineers reviewing the 74LVC1G157GF,132 datasheet, 74LVC1G157GF,132 pinout, 74LVC1G157GF,132 application, or 74LVC1G157GF,132 equivalent, key selection criteria include its ±24 mA drive at 3.0 V, -40 °C to +125 °C operation, IOFF-enabled backflow prevention during power-down, and overvoltage-tolerant inputs up to 5.5 V.

Technical Context

This device implements a standard 2:1 multiplexer function with active-HIGH select logic: when S = L, Y = I0; when S = H, Y = I1. Its Schmitt-trigger inputs provide hysteresis (typ. 0.3 V at VCC = 3.3 V), enabling robust operation with slow-rising or noisy signals.

The IOFF circuit ensures high-impedance outputs when VCC = 0 V, blocking current flow between powered and unpowered sections of a system. Input voltage tolerance extends to 5.5 V regardless of VCC, supporting direct interface with 5 V TTL logic while operating from as low as 1.65 V.

Key Specifications

Pinout & Package

XSON6 package (SOT886): plastic extremely thin small outline, no leads, 6 terminals, body size 1.0 × 1.45 × 0.5 mm. Pin 1 index located on lower left corner below marking code "YP".

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 2:1 multiplexer applications.

Compared with SN74LVC1G157DBVR and 74LVC1G157GV,125, the 74LVC1G157GF,132 offers the smallest footprint and lowest static current, making it optimal for space-constrained, battery-sensitive designs requiring minimal leakage during deep sleep.

Availability

74LVC1G157GF,132 is available at Aetrix Electronics and suitable for industrial sensor interfaces, portable device I/O expansion, mixed-voltage logic translation, and power-managed system interfacing requiring stable component supply across extended temperature ranges.

Supply support for 74LVC1G157GF,132 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a leading global semiconductor expert focused on high-performance, high-reliability logic, discrete, and MOSFET solutions for automotive, industrial, and consumer markets.

The 74LVC1G157 belongs to Nexperia's LVC logic family, engineered for low-voltage operation, robust noise immunity, and seamless integration in mixed-supply systems with stringent power and space constraints.

FAQ

Can the 74LVC1G157GF,132 operate with VCC = 1.65 V while accepting 5 V inputs?

Yes. Its inputs are overvoltage tolerant up to 5.5 V independent of VCC, enabling safe interface with 5 V TTL or CMOS outputs even when powered from 1.65 V. This eliminates external clamping diodes or level shifters in mixed-voltage designs.

What happens to the output when VCC = 0 V and S is driven HIGH?

The IOFF circuit forces the output Y into a high-impedance state regardless of S or input states, limiting leakage current to ≤ ±2 μA. This prevents back-current flow from powered downstream circuits into the unpowered multiplexer, protecting both devices.

Is the 74LVC1G157GF,132 suitable for driving a 50 pF load at 10 MHz?

Yes. With CPD = 18 pF and tpd ≤ 5.0 ns at VCC = 4.5–5.5 V, it delivers clean edges into 50 pF loads. Dynamic power at 10 MHz and 3.3 V is ~2 μW (PD = CPD × VCC² × fi), well within its 250 mW Ptot rating at +85 °C.

Does the Schmitt-trigger input affect propagation delay specifications?

No. Propagation delay (tpd) is measured between input transition (at VM = 0.5 × VCC or 1.5 V) and output transition, per Fig. 8. The Schmitt trigger affects input threshold levels and noise rejection-not the specified delay values-so tpd remains valid for timing analysis.