Nexperia USA Inc. 74LVC2G04GM,115
- Part No.:
- 74LVC2G04GM,115
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Gates and Inverters
- Package:
- 6-XFDFN
- Datasheet:
-
74LVC2G04GM,115.pdf
- Description:
- IC INVERTER 2CH 2-INP 6XSON
- Quantity:
- Payment:

- Shipping:

Inventory:32,786
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
74LVC2G04GM,115 from Nexperia is a dual CMOS inverter with Schmitt-trigger inputs, operating from 1.65 V to 5.5 V supply, delivering ±24 mA output drive at 3.0 V, and featuring IOFF partial power-down protection for mixed-voltage bus isolation in level-shifting applications such as I²C signal conditioning and microcontroller GPIO buffering.
For engineers reviewing the 74LVC2G04GM,115 datasheet, 74LVC2G04GM,115 pinout, 74LVC2G04GM,115 application, or 74LVC2G04GM,115 equivalent, key selection criteria include its 6-terminal XSON6 (SOT886) package, −40 °C to +125 °C temperature rating, 2.7 ns typical propagation delay at 3.0 V, and overvoltage-tolerant 5.5 V inputs enabling safe interfacing between 3.3 V logic and legacy 5 V systems.
Technical Context
This device implements two independent inverting buffers with hysteresis on all inputs, allowing robust operation with slow-rising signals common in sensor interfaces and mechanical switch debouncing. Its IOFF circuit actively disables outputs when VCC = 0 V, blocking back-current flow during hot-swap or partial system power-down.
It complies with JEDEC standards JESD8-7, JESD8-5, JESD8C, and JESD36 across its full 1.65–5.5 V supply range and meets ANSI/ESDA/JEDEC JS-001 Class 2 (≥2000 V HBM) and JS-002 Class C3 (≥1000 V CDM) ESD specifications.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 1.65 V to 5.5 V - supports direct interface with both 1.8 V, 2.5 V, 3.3 V, and 5 V logic families without external level shifters. |
| Input Voltage Tolerance | Up to 5.5 V - enables safe connection of 5 V signals to 3.3 V or lower VCC systems without clamping diodes or resistors. |
| Output Drive Strength | ±24 mA at VCC = 3.0 V - sufficient to drive multiple LVC loads or moderate capacitive traces (≤30 pF) with <5.5 ns propagation delay. |
| Propagation Delay | 2.7 ns typical at VCC = 3.0 V - ensures timing integrity in high-speed digital control paths up to ~100 MHz toggle rate. |
| IOFF Leakage Current | ±2 μA max at VCC = 0 V - prevents destructive backflow current during power sequencing or partial shutdown in multi-rail systems. |
| Operating Temperature | −40 °C to +125 °C - qualified for industrial and extended-temperature embedded control environments including motor drives and power supplies. |
| ESD Robustness | HBM ≥2000 V, CDM ≥1000 V - reduces risk of field failure in manual handling and board-level assembly. |
Pinout & Package
XSON6 plastic extremely thin small outline package (SOT886), 1.0 × 1.45 × 0.5 mm body, no leads, 6 terminals, exposed die pad not electrically connected.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | 1A | First inverter input - accepts 0–5.5 V signals regardless of VCC; Schmitt-trigger threshold provides noise margin against slow edges. |
| 2 | GND | Digital ground reference - must be low-impedance and decoupled near device to maintain switching noise immunity. |
| 3 | 2A | Second inverter input - functionally identical to Pin 1; allows independent inversion of two signals in same footprint. |
| 4 | 2Y | Second inverter output - active-low inversion of Pin 3; capable of sourcing/sinking ±24 mA at 3.0 V. |
| 5 | VCC | Positive supply rail - must be bypassed with 100 nF ceramic capacitor placed ≤2 mm from Pin 5 to GND. |
| 6 | 1Y | First inverter output - complements Pin 1; shares same electrical specs and drive capability as Pin 4. |
Key Features
| Feature | Design Value |
|---|---|
| Schmitt-trigger inputs | Provides ≥0.35VCC hysteresis - eliminates chatter on noisy or slow-rising signals from sensors, encoders, or mechanical switches. |
| IOFF partial power-down | Disables outputs when VCC = 0 V - prevents back-current damage during hot-plug, battery-swapping, or multi-rail sequencing. |
| Overvoltage-tolerant inputs | Withstands 5.5 V regardless of VCC setting - enables reliable 5 V-to-3.3 V translation without external components. |
| Wide supply range | Operates from 1.65 V to 5.5 V - supports single-supply designs across voltage domains including 1.8 V FPGA I/O banks and 5 V MCU peripherals. |
| High noise immunity | CMOS input structure with >40 % VCC noise margin - resists coupling from adjacent switching traces or power rail ripple. |
Applications
| Industrial Sensor Interface | I²C Bus Level Translation |
|---|---|
Use Scenario: Conditioning open-collector output from temperature or pressure sensor with slow rise time into clean CMOS-compatible signal for microcontroller ADC trigger. IC Role / Device Role / Timing Role: Dual inverter acts as Schmitt-trigger buffer and polarity corrector, converting analog comparator output to synchronized digital edge. Use Value: Eliminates need for external RC debounce network; maintains signal integrity across 10 cm PCB trace with 20 ns jitter reduction. | Use Scenario: Interfacing 3.3 V microcontroller I²C master to 5 V EEPROM slave while maintaining bus timing compliance and pull-up compatibility. IC Role / Device Role / Timing Role: Inverter pair used in bidirectional level-shifting configuration with external pull-ups, translating SDA/SCL signals without clock skew. Use Value: Enables interoperability without dedicated level shifter IC; preserves standard-mode (100 kHz) and fast-mode (400 kHz) timing budgets. |
| Microcontroller GPIO Expansion | Power Sequencing Control Logic |
Use Scenario: Driving high-capacitance enable lines for multiple DC-DC converters from a low-drive STM32 GPIO pin. IC Role / Device Role / Timing Role: Inverter provides gain and current boost to meet 10 nF load requirement with <5 ns added delay. Use Value: Avoids use of discrete transistor arrays; reduces BOM count by consolidating two enable-path inverters in one 1.45 mm × 1.0 mm footprint. | Use Scenario: Generating complementary reset signals during multi-stage power-up of FPGA + memory subsystem where VCC_IO powers up before VCC_CORE. IC Role / Device Role / Timing Role: Inverter converts sequenced enable signal into inverted enable for secondary regulator, with IOFF ensuring isolation during intermediate states. Use Value: Prevents latch-up during staggered rail ramp-up; guarantees monotonic reset assertion across all rails within 100 μs window. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual inverter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC2G04DBVR | SOT-23-6 package (larger 2.9 × 1.6 mm body); 100 μA higher ICC at 3.3 V; identical logic function and IOFF spec. | Less suitable for ultra-dense layouts; thermal resistance 210 K/W vs. 180 K/W for SOT886 - impacts sustained 24 mA drive at +125 °C. | Select when board rework or hand-soldering is required; avoid if space-constrained or thermally limited. |
| 74AUP2G04GW,125 | Lower VCC range (0.8–3.6 V); 1.8 ns tpd at 3.0 V; 10 μA ICC typical; no 5.5 V input tolerance. | Not usable for 5 V signal translation; optimized for ultra-low-power sub-1 V logic but incompatible with mixed 5 V/3.3 V buses. | Select only for battery-powered 1.8 V systems requiring minimal quiescent current; reject for industrial mixed-voltage designs. |
Compared with SN74LVC2G04DBVR and 74AUP2G04GW,125, the 74LVC2G04GM,115 uniquely balances ultra-small XSON6 size, 5.5 V input tolerance, and −40 °C to +125 °C operation - making it the sole choice for space-constrained industrial controllers needing robust level translation without derating.
Availability
74LVC2G04GM,115 is available at Aetrix Electronics and suitable for industrial sensor interfaces, I²C bus translation, and microcontroller GPIO expansion requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for 74LVC2G04GM,115 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert specializing in high-performance, energy-efficient logic, discrete, and MOSFET solutions for automotive, industrial, and consumer markets.
The 74LVC2G04 belongs to Nexperia's LVC (Low-Voltage CMOS) logic family, designed specifically for robust, low-power signal conditioning and voltage-level translation in mixed-supply embedded systems.
FAQ
Can 74LVC2G04GM,115 safely interface a 5 V sensor output to a 1.8 V microcontroller input?
Yes - its inputs tolerate up to 5.5 V regardless of VCC, and VIH/VIL thresholds scale with VCC. With VCC = 1.8 V, VIH is 1.2 V min and VIL is 0.45 V max, ensuring reliable recognition of 5 V logic highs while avoiding input overstress. No series resistor is needed.
Does the IOFF feature protect against back-current when only one supply rail is powered down?
Yes - IOFF activates when VCC drops below ~0.2 V, disabling both outputs and presenting high-impedance (±2 μA leakage max) to connected signals. This prevents reverse current flow from live 5 V buses into unpowered sections, satisfying IEC 61000-4-2 system-level hot-swap requirements.
What is the maximum capacitive load this device can drive while maintaining 5 ns propagation delay?
At VCC = 3.0 V and Tamb = 25 °C, the device maintains ≤5.5 ns tpd driving 30 pF (including trace and probe capacitance). For 50 pF loads, tpd increases to ≤7.0 ns. Layout best practice: keep output trace length under 3 cm and use ground plane beneath to limit parasitic inductance.
Is the SOT886 package compatible with standard reflow profiles for lead-free assembly?
Yes - the XSON6 (SOT886) package is qualified for IPC/JEDEC J-STD-020D moisture sensitivity level 1 and withstands peak reflow temperatures up to 260 °C. Recommended profile: ramp-to-peak ≤3 °C/s, time above 217 °C = 60–150 s, peak = 235–245 °C, with no cold start limitation.
74LVC2G04GM,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- 74LVC
- Package/Case:
- 6-XFDFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Logic Type:
- Inverter
- Number of Circuits:
- 2
- Number of Inputs:
- 2
- Features:
- -
- Voltage - Supply:
- 1.65V ~ 5.5V
- Current - Quiescent (Max):
- 4 µA
- Current - Output High, Low:
- 32mA, 32mA
- Input Logic Level - Low:
- 0.7V ~ 0.8V
- Input Logic Level - High:
- 1.7V ~ 2V
- Max Propagation Delay @ V, Max CL:
- 3.2ns @ 5V, 50pF
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-XSON, SOT886 (1.45x1)
74LVC2G04GM,115 FAQ
1.How can I place an order for 74LVC2G04GM,115 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74LVC2G04GM,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74LVC2G04GM,115 reliable?
The price and inventory of 74LVC2G04GM,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74LVC2G04GM,115 is usually 5 days.
3.What payment methods are accepted for 74LVC2G04GM,115?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74LVC2G04GM,115 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 74LVC2G04GM,115?
74LVC2G04GM,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74LVC2G04GM,115 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74LVC2G04GM,115?
For technical support, including 74LVC2G04GM,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74LVC2G04GM,115 requirements.
6.How does Aetrix verify that 74LVC2G04GM,115 is sourced from the original manufacturer or authorized distributors?
All 74LVC2G04GM,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74LVC2G04GM,115 meets industry standards.
7.What is the process for return or replacement of 74LVC2G04GM,115?
All 74LVC2G04GM,115 units undergo pre-shipment inspection (PSI). If there is an issue with 74LVC2G04GM,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74LVC2G04GM,115 part is unused and in its original packaging.
Return procedure for 74LVC2G04GM,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
74LVC2G04GM,115 Tags
-
SN74LVC1G14DBVR
Texas Instruments
-
SN74LVC1G14DCKR
Texas Instruments
-
SN74AHC1G14DBVR
Texas Instruments
-
SN74LVC1G08DBVR
Texas Instruments
-
SN74LVC1G08DCKR
Texas Instruments
-
SN74LVC1G32DCKR
Texas Instruments
-
SN74LVC1G04DBVR
Texas Instruments
.jpg)
-
74LVC1G08GW,125
Nexperia USA Inc.
-
SN74LVC1G04DCKR
Texas Instruments
-
SN74AHC1G08DBVR
Texas Instruments
-
SN74LVC1G32DBVR
Texas Instruments
-
SN74AHCT1G08DBVR
Texas Instruments
Tech Hub
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
LDO regulator guide covering low dropout voltage, power dissipation, thermal design, PSRR, output noise, capacitor stability, adjustable LDO circuits, LDO vs buck converter and datasheet selection chec…
Conditional Access Module guide covering CAM meaning, CI/CI+ interface, smart card authorization, DVB security workflow, TV and set-top box compatibility, internal electronics, ESD protection, connecto…
Guide to electronic component obsolescence covering EOL risk, PCN/PDN notices, last-time buy planning, replacement options, form-fit-function validation, counterfeit risk and BOM lifecycle management.
18650 battery guide covering lithium-ion cell basics, 3.6V/3.7V voltage, 4.2V charging, mAh and Wh capacity, protected cells, chargers, BMS, series-parallel packs, holders, welding and sourcing checks.…
Hall effect sensor guide covering working principle, linear and digital sensors, Arduino circuits, current sensing, speed detection, automotive applications, A3144 examples, signal filtering and datash…
Product Change Notification guide for electronic components, covering PCN meaning, PCN vs PDN/EOL, common change types, risk levels, form-fit-function review, engineering validation, BOM control, LTB/L…
A practical guide to blend door actuators, covering HVAC function, symptoms, location, AC and heater issues, reset and calibration, replacement cost, electrical diagnosis, compatibility checks, and rep…

