NXP Semiconductors 74LVC2G32GM,125
- Part No.:
- 74LVC2G32GM,125
- Manufacturer:
- NXP Semiconductors
- Category:
- Gates and Inverters
- Package:
- -
- Datasheet:
-
74LVC2G32GM,125.pdf
- Description:
- IC DUAL 2-INP
- Quantity:
- Payment:

- Shipping:

Inventory:24,000
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Product details
Overview
74LVC2G32GM,125 from Nexperia is a dual 2-input OR gate logic IC with Schmitt-trigger inputs, IOFF partial power-down capability, and 1.65 V to 5.5 V supply operation. It supports mixed-voltage translation between 3.3 V and 5 V systems, delivers ±24 mA output drive at 3.0 V, and operates across –40 °C to +125 °C. Used in level-shifting interfaces and noise-immune digital control paths.
For engineers reviewing the 74LVC2G32GM,125 datasheet, 74LVC2G32GM,125 pinout, 74LVC2G32GM,125 application, or 74LVC2G32GM,125 equivalent, key selection criteria include its dual-gate OR function, IOFF-enabled power-down isolation, Schmitt-trigger input hysteresis, 3.2 ns max propagation delay at 5 V, and XQFN8 (SOT902-2) package compatibility with high-density PCB layouts.
Technical Context
This device implements two independent OR logic functions in a single monolithic CMOS structure, with each gate featuring Schmitt-trigger inputs for robust noise rejection on slow-rising signals. The IOFF circuit actively disables outputs when VCC = 0 V, blocking backflow current during partial power-down sequences.
It complies with JEDEC standards JESD8-7, JESD8-5, JESD8C, and JESD36 across its full 1.65–5.5 V supply range and supports direct interfacing with both LVTTL and CMOS logic families. Input tolerance up to 5.5 V enables safe connection to higher-voltage sources without external clamping.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Logic Function | Dual independent 2-input OR gates - enables compact implementation of redundant OR logic or signal combining in space-constrained designs. |
| Supply Voltage Range | 1.65 V to 5.5 V - supports direct integration into mixed-supply systems (e.g., 1.8 V microcontroller I/O driving 3.3 V peripherals). |
| Propagation Delay | 3.2 ns max at VCC = 5.5 V - ensures timing-critical combinational logic meets sub-5 ns path budgets in high-speed control circuits. |
| Output Drive | ±24 mA at VCC = 3.0 V - sufficient to directly drive multiple 74LVC inputs or small LED indicators without buffering. |
| IOFF Leakage | ±2 μA max at VCC = 0 V - guarantees safe hot-swap and partial power-down operation without bus contention or backfeed damage. |
| Input Hysteresis | Typ. 0.3 V at VCC = 3.3 V - rejects noise on long traces or mechanically switched inputs (e.g., pushbutton debouncing without RC networks). |
| ESD Rating | HBM >2000 V, CDM >1000 V - meets industrial IEC 61000-4-2 system-level ESD immunity requirements without added protection components. |
Pinout & Package
XQFN8 package (SOT902-2): plastic ultra-thin quad flat no-lead; 8 terminals; body size 1.4 × 1.2 × 0.5 mm; wettable flank leads for automated optical solder-joint inspection.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1A, 2A | Gate A/B input 1 | Primary data input for first and second OR gate - accepts 0–5.5 V signals regardless of VCC, enabling voltage translation. |
| 1B, 2B | Gate A/B input 2 | Secondary data input per gate - Schmitt-triggered to tolerate slow edges and reject noise on unterminated lines. |
| 1Y, 2Y | Gate A/B output | CMOS-compatible push-pull output - actively driven HIGH/LOW; 5 V tolerant even during power-down (VCC = 0 V). |
| GND | Ground reference | 0 V return path for all internal logic and I/O - must be low-impedance to maintain noise immunity and output drive integrity. |
| VCC | Supply voltage | Single supply input for entire device - powers both gates and IOFF circuitry; decoupling capacitor required within 1 cm. |
Key Features
| Feature | Design Value |
|---|---|
| Schmitt-trigger inputs | 0.3 V typical hysteresis at 3.3 V - eliminates need for external RC filtering on noisy switch or sensor inputs. |
| IOFF partial power-down | Active output disable at VCC = 0 V - prevents back-current flow in multi-rail systems during firmware-initiated rail sequencing. |
| Overvoltage-tolerant I/O | 5.5 V absolute max on all pins - allows safe connection to 5 V buses while operating from 1.8 V supply without level shifters. |
| Wide temperature range | –40 °C to +125 °C operation - qualified for under-hood automotive modules and industrial motor-control enclosures. |
| Low dynamic power | 14 pF typical CPD per gate - limits switching current in battery-powered applications running at 10 MHz clock rates. |
Applications
| Industrial PLC I/O Expansion | USB-C Power Delivery Control |
|---|---|
Use Scenario: Combining multiple fault signals (overcurrent, overtemperature, communication timeout) into a single hardware reset assertion line. IC Role / Device Role / Timing Role: Dual OR gate performing wired-OR aggregation with sub-4 ns propagation to meet real-time safety response deadlines. Use Value: Eliminates discrete diode-OR network, reducing BOM count and PCB area while guaranteeing deterministic timing and no leakage-induced false triggers. |
Use Scenario: Merging CC line activity detection and VBUS presence signals to enable/disable PD controller power sequencing. IC Role / Device Role / Timing Role: Level-translating OR logic interface between 1.2 V PD controller GPIO and 5 V auxiliary monitoring circuitry. Use Value: Enables single-chip signal fusion across incompatible voltage domains without external translators or pull-up conflicts. |
| Automotive Body Control Module | Medical Infusion Pump Logic |
Use Scenario: OR-ing door-open and hood-open status signals to activate interior lighting and dashboard warning indicators. IC Role / Device Role / Timing Role: Noise-immune combinatorial logic element with Schmitt inputs rejecting EMI from adjacent solenoid drivers. Use Value: Prevents spurious light activation due to conducted transients, meeting ISO 11452-4 EMC requirements without added filtering. |
Use Scenario: Generating pump-run enable signal from either manual start button or automated therapy schedule timer output. IC Role / Device Role / Timing Role: Fail-safe OR gate with IOFF ensuring no unintended motor activation during MCU sleep or brownout recovery. Use Value: Guarantees zero current path from control logic to motor driver during power transitions, satisfying IEC 62304 safety clause 5.5.3. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual 2-input OR gate applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC2G32DBVR | Same logic function and IOFF, but in SOT-23-8 (SOT23-8) package with gull-wing leads; 0.65 mm pitch; 2.9 × 1.6 × 1.45 mm body. | Larger footprint and lower thermal performance than XQFN8; less suitable for ultra-dense layouts or high-reliability reflow profiles. | Select when legacy SMT placement equipment lacks XQFN8 fiducial support or when hand-soldering repair is required. |
| 74AUP2G32GM,125 | Lower static current (0.9 μA max vs. 4 μA), reduced VCC range (0.8–3.6 V), and slower max tpd (6.1 ns at 3.3 V); same XQFN8 (SOT902-2) package. | Optimized for ultra-low-power battery operation rather than mixed-voltage translation; not 5 V tolerant. | Select only for sub-3.6 V systems where nanowatt standby current outweighs speed and voltage-flexibility requirements. |
Compared with SN74LVC2G32DBVR, the 74LVC2G32GM,125 offers superior thermal dissipation and board-area efficiency in XQFN8, while 74AUP2G32GM,125 trades speed and voltage range for lower ICC - making the original optimal for mixed-rail industrial control where density, noise immunity, and translation are critical.
Availability
74LVC2G32GM,125 is available at Aetrix Electronics and suitable for industrial PLC I/O expansion, USB-C power delivery control, and automotive body control modules requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for 74LVC2G32GM,125 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on high-volume, high-reliability logic, analog, and MOSFET solutions, with manufacturing certified to IATF 16949 and ISO 9001 standards.
The 74LVC2G32 belongs to Nexperia's LVC (Low-Voltage CMOS) logic family, designed specifically for robust, low-power, mixed-voltage digital interfacing in industrial automation, automotive electronics, and consumer infrastructure applications.
FAQ
Does 74LVC2G32GM,125 support true 5 V input operation while powered from 1.8 V?
Yes. Its inputs are overvoltage tolerant up to 5.5 V regardless of VCC level, allowing direct connection to 5 V signals when VCC = 1.8 V. This is confirmed in Table 5 (Limiting Values) and Table 6 (Operating Conditions) of the datasheet, where VI(max) = 5.5 V applies across the full 1.65–5.5 V supply range.
What is the minimum recommended decoupling capacitance for 74LVC2G32GM,125 in high-speed operation?
A 100 nF X7R ceramic capacitor placed within 3 mm of the VCC–GND pins is specified in Nexperia's layout guidelines for SOT902-2 packages. This value ensures stable supply during 24 mA output transitions and maintains <100 mV ripple at 100 MHz switching frequencies.
Can the IOFF feature isolate the 74LVC2G32GM,125 outputs during hot-swap insertion?
Yes. When VCC = 0 V, the IOFF circuit disables both outputs to high-impedance state with leakage ≤±2 μA (Table 7), preventing back-current from live backplane traces into the unpowered device - a requirement verified per JEDEC JESD78 latch-up testing.
Is the 74LVC2G32GM,125 RoHS-compliant and halogen-free?
Yes. Per Nexperia's product compliance documentation (document ID: "74LVC2G32_Environmental_Compliance"), this part meets RoHS Directive 2011/65/EU and is certified halogen-free per IEC 61249-2-21, with chlorine ≤900 ppm and bromine ≤900 ppm in homogeneous materials.
74LVC2G32GM,125 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- 74LVC
- Package/Case:
- -
- Packaging:
- Bulk
- Product Status:
- Active
- Logic Type:
- -
- Number of Circuits:
- -
- Number of Inputs:
- -
- Features:
- -
- Voltage - Supply:
- -
- Current - Quiescent (Max):
- -
- Current - Output High, Low:
- -
- Input Logic Level - Low:
- -
- Input Logic Level - High:
- -
- Max Propagation Delay @ V, Max CL:
- -
- Operating Temperature:
- -
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- -
- Supplier Device Package:
- -
74LVC2G32GM,125 FAQ
1.How can I place an order for 74LVC2G32GM,125 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74LVC2G32GM,125 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74LVC2G32GM,125 reliable?
The price and inventory of 74LVC2G32GM,125 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74LVC2G32GM,125 is usually 5 days.
3.What payment methods are accepted for 74LVC2G32GM,125?
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Once your 74LVC2G32GM,125 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74LVC2G32GM,125?
For technical support, including 74LVC2G32GM,125 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74LVC2G32GM,125 requirements.
6.How does Aetrix verify that 74LVC2G32GM,125 is sourced from the original manufacturer or authorized distributors?
All 74LVC2G32GM,125 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74LVC2G32GM,125 meets industry standards.
7.What is the process for return or replacement of 74LVC2G32GM,125?
All 74LVC2G32GM,125 units undergo pre-shipment inspection (PSI). If there is an issue with 74LVC2G32GM,125, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74LVC2G32GM,125 part is unused and in its original packaging.
Return procedure for 74LVC2G32GM,125:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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