Nexperia USA Inc. 74LVC2G32GXX
- Part No.:
- 74LVC2G32GXX
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Gates and Inverters
- Package:
- 8-XFDFN Exposed Pad
- Datasheet:
-
74LVC2G32GXX.pdf
- Description:
- IC GATE OR 2CH 2-INP 8X2SON
- Quantity:
- Payment:

- Shipping:

Inventory:2,630
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Product details
Overview
74LVC2G32 from Nexperia is a dual 2-input OR gate logic IC designed for level translation between 3.3 V and 5 V systems, featuring Schmitt-trigger inputs for noise immunity, IOFF partial power-down protection, and operation across 1.65 V to 5.5 V supply. It delivers ±24 mA output drive at 3.0 V and supports industrial temperature range up to +125 °C.
For engineers reviewing the 74LVC2G32 datasheet, 74LVC2G32 pinout, 74LVC2G32 application, or 74LVC2G32 equivalent, this device is selected for mixed-voltage signal routing, bus interface conditioning, and low-power logic consolidation in space-constrained embedded control and portable electronics.
Technical Context
The 74LVC2G32 implements two independent OR gates with Schmitt-trigger inputs that tolerate slow-rising/falling edges and reject high-frequency noise. Its IOFF circuit actively disables outputs during power-down, blocking backflow current when VCC = 0 V.
It complies with JEDEC standards JESD8-7 (1.65–1.95 V), JESD8-5 (2.3–2.7 V), JESD8C (2.7–3.6 V), and JESD36 (4.5–5.5 V), and supports overvoltage-tolerant inputs up to 5.5 V regardless of supply voltage.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 1.65 V to 5.5 V - enables direct interface with both 1.8 V, 2.5 V, 3.3 V, and 5 V logic families without external level shifters. |
| Input Voltage Tolerance | Up to 5.5 V - allows safe connection to 5 V signals even when powered at 1.65 V, critical for mixed-supply system interoperability. |
| Output Drive Strength | ±24 mA at VCC = 3.0 V - sufficient to drive multiple LVC/LVT inputs or small capacitive loads without buffering. |
| Propagation Delay | 0.7 ns (min) to 4.0 ns (max) at VCC = 4.5–5.5 V - ensures timing-critical combinational logic paths meet sub-5 ns budget in high-speed control circuits. |
| IOFF Leakage Current | ±2 μA at VCC = 0 V - limits backfeed current during hot-swap or partial power-down, protecting upstream drivers and downstream loads. |
| Operating Temperature | −40 °C to +125 °C - qualified for under-hood automotive modules, industrial PLC I/O, and extended-temperature edge computing nodes. |
| ESD Protection | HBM > 2000 V, CDM > 1000 V - meets robustness requirements for handling and assembly in automated SMT lines without special ESD controls. |
Pinout & Package
Available in multiple compact packages including TSSOP8 (SOT505-2), VSSOP8 (SOT765-1), and XSON8 variants (SOT833-1, SOT1116, SOT1203, SOT1233-2), all with 8 terminals and footprint compatibility for high-density PCB layouts.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1A, 2A | Input A for Gate 1 and Gate 2 | Dual independent data inputs accepting 0–5.5 V; Schmitt-triggered for noise margin and slow-edge tolerance. |
| 1B, 2B | Input B for Gate 1 and Gate 2 | Second input per gate; identical electrical behavior to 1A/2A; enables full dual OR functionality. |
| 1Y, 2Y | Output Y for Gate 1 and Gate 2 | CMOS-compatible push-pull outputs with rail-to-rail swing and ±24 mA drive capability at 3.0 V. |
| GND | Ground Reference | Primary 0 V return path; must be low-impedance for stable noise immunity and IOFF operation. |
| VCC | Supply Voltage Input | Single supply pin supporting 1.65–5.5 V; powers both gates and enables IOFF state when de-energized. |
Key Features
| Feature | Design Value |
|---|---|
| Wide Supply Range | 1.65 V to 5.5 V operation eliminates need for separate voltage translators in multi-rail systems. |
| IOFF Partial Power-Down | Outputs go high-impedance when VCC = 0 V, preventing destructive back-current in live-backplane or hot-swap applications. |
| Schmitt-Trigger Inputs | Hysteresis > 0.3 V typical ensures reliable switching on noisy or slow-rising signals (e.g., mechanical switch debouncing). |
| 5 V-Tolerant Outputs | Outputs remain functional and non-damaging when driving 5 V loads while operating at 1.65 V supply. |
| Low Static Power | ICC ≤ 4 μA max across full temperature and voltage range - ideal for battery-powered always-on monitoring nodes. |
Applications
| Industrial Sensor Interface | USB-C Power Delivery Control |
|---|---|
Use Scenario: Aggregating fault signals from multiple analog sensor conditioners (e.g., temperature, pressure) into a single interrupt line for MCU polling. IC Role / Device Role / Timing Role: Dual OR gate performing wired-OR logic summation; no propagation delay accumulation due to parallel structure. Use Value: Reduces BOM count by replacing discrete diode-OR networks, improves noise immunity via Schmitt inputs, and maintains signal integrity across 3.3 V sensor and 5 V host domains. |
Use Scenario: Combining CC1/CC2 connector orientation detection outputs with VBUS presence to enable USB-C port controller power sequencing. IC Role / Device Role / Timing Role: Level-translating OR logic element interfacing 1.8 V port controller GPIOs with 5 V PD policy engine signals. Use Value: Enables single-chip USB-C implementation without external level shifters; IOFF prevents backfeed during VBUS ramp-up before controller initialization. |
| Automotive Body Control Module | IoT Edge Node Wake-Up Logic |
Use Scenario: Merging door-open, hood-open, and trunk-open switch inputs into a unified "body intrusion" alert signal for CAN gateway wakeup. IC Role / Device Role / Timing Role: Fault-tolerant combinatorial logic block operating at 5 V with Schmitt inputs rejecting EMI from harness crosstalk. Use Value: Meets AEC-Q100 Class 0 (−40 °C to +125 °C) thermal requirement; overvoltage-tolerant inputs withstand load-dump transients up to 5.5 V. |
Use Scenario: Waking an ultra-low-power microcontroller from deep sleep upon motion (PIR), button press, or BLE beacon detection. IC Role / Device Role / Timing Role: Low-leakage OR gate combining multiple asynchronous wake sources into one IRQ line, powered from coin-cell backup rail. Use Value: ICC ≤ 4 μA ensures <10 nA average system leakage contribution; 1.65 V minimum VCC supports direct coin-cell (1.5 V) operation with margin. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual 2-input OR gate applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC2G32DCUR | Texas Instruments variant in VSSOP8 (SOT765-1); identical logic function and IOFF but higher ICC (≤10 μA) and lower ESD rating (HBM 2000 V vs. Nexperia's >2000 V). | Same footprint and pinout; suitable for TI-centric designs where sourcing continuity with TI portfolio is prioritized. | Select when TI qualification or existing TI design reuse is required; verify HBM margin against assembly environment. |
| 74AUP2G32GM | Nexperia's AUP family version offers lower static current (≤0.5 μA) and reduced propagation delay (0.8 ns typ. at 3.3 V), but narrower VCC range (0.8–3.6 V). | Not 5 V tolerant; limited to single-supply 1.8 V/2.5 V/3.3 V systems; unsuitable for mixed-voltage translation. | Prefer for ultra-low-power battery applications where 5 V tolerance is unnecessary and sub-1 μA ICC is critical. |
Compared with SN74LVC2G32DCUR, the 74LVC2G32 offers tighter ICC spec and stronger ESD robustness; compared with 74AUP2G32GM, it trades higher static current for universal 1.65–5.5 V interoperability and 5 V signal compatibility.
Availability
74LVC2G32 is available at Aetrix Electronics and suitable for industrial sensor interfaces, USB-C power delivery control, automotive body control modules, and IoT edge node wake-up logic requiring stable component supply across extended temperature and mixed-voltage environments.
Supply support for 74LVC2G32 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on essential efficiency technologies, delivering high-performance logic, power, analog, and MOSFET solutions for automotive, industrial, and consumer markets.
The 74LVC2G32 belongs to Nexperia's LVC logic family, engineered for broad voltage interoperability, robust ESD performance, and seamless integration in mixed-supply digital systems with stringent reliability demands.
FAQ
Can the 74LVC2G32 safely interface a 5 V microcontroller GPIO with a 1.8 V FPGA input?
Yes - its inputs tolerate up to 5.5 V regardless of VCC, and its outputs swing rail-to-rail. When powered at 1.8 V, it accepts 5 V inputs without damage and drives the FPGA with a 0–1.8 V output compatible with 1.8 V LVTTL/LVCMOS inputs. No external resistors or clamps are needed.
Does the IOFF feature require external pull-up or pull-down resistors on outputs?
No - the IOFF circuit internally forces outputs into high-impedance state when VCC = 0 V, eliminating need for external biasing. This prevents back-current flow into powered sections of the system, making it suitable for hot-swap and partial-power-down architectures without added components.
What is the maximum capacitive load the 74LVC2G32 can drive while maintaining specified propagation delay?
The datasheet specifies dynamic characteristics with 30–50 pF loads. At VCC = 3.3 V, tpd remains within 4.2 ns (max) up to 50 pF. Driving >50 pF increases delay nonlinearly and may cause ringing; for >100 pF loads, add series termination or buffer stage to maintain timing integrity and signal fidelity.
Is the 74LVC2G32 qualified for automotive applications per AEC-Q100?
No - while rated for −40 °C to +125 °C, the 74LVC2G32 is not AEC-Q100 qualified. Nexperia offers automotive-grade equivalents like the 74LVC2G32-Q100 (SOT765-1) with full stress testing, failure analysis, and PPAP documentation required for automotive use.
74LVC2G32GXX Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- 74LVC
- Package/Case:
- 8-XFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Logic Type:
- OR Gate
- Number of Circuits:
- 2
- Number of Inputs:
- 2
- Features:
- -
- Voltage - Supply:
- 1.65V ~ 5.5V
- Current - Quiescent (Max):
- 4 µA
- Current - Output High, Low:
- 32mA, 32mA
- Input Logic Level - Low:
- 0.1V ~ 0.8V
- Input Logic Level - High:
- 0.95V ~ 3.4V
- Max Propagation Delay @ V, Max CL:
- 4ns @ 5V, 50pF
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-X2SON (1.35x0.8)
74LVC2G32GXX FAQ
1.How can I place an order for 74LVC2G32GXX through Aetrix?
Please submit a Request for Quotation (RFQ) for 74LVC2G32GXX on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74LVC2G32GXX reliable?
The price and inventory of 74LVC2G32GXX are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74LVC2G32GXX is usually 5 days.
3.What payment methods are accepted for 74LVC2G32GXX?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74LVC2G32GXX transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 74LVC2G32GXX?
74LVC2G32GXX orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74LVC2G32GXX order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74LVC2G32GXX?
For technical support, including 74LVC2G32GXX datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74LVC2G32GXX requirements.
6.How does Aetrix verify that 74LVC2G32GXX is sourced from the original manufacturer or authorized distributors?
All 74LVC2G32GXX products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74LVC2G32GXX meets industry standards.
7.What is the process for return or replacement of 74LVC2G32GXX?
All 74LVC2G32GXX units undergo pre-shipment inspection (PSI). If there is an issue with 74LVC2G32GXX, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74LVC2G32GXX part is unused and in its original packaging.
Return procedure for 74LVC2G32GXX:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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