Nexperia USA Inc. 74LVC3G04DC,125
- Part No.:
- 74LVC3G04DC,125
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Gates and Inverters
- Package:
- 8-VFSOP (0.091", 2.30mm Width)
- Datasheet:
-
74LVC3G04DC,125.pdf
- Description:
- IC INVERTER 3CH 3-INP 8VSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:3,425
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Product details
Overview
74LVC3G04DC,125 from Nexperia is a triple CMOS inverter IC with Schmitt-trigger inputs, operating from 1.65 V to 5.5 V supply, supporting mixed-voltage translation between 3.3 V and 5 V logic domains, and featuring IOFF partial power-down protection. It delivers ±24 mA output drive at 3.0 V and is rated for operation from −40 °C to +125 °C in the VSSOP8 (SOT765-1) package.
For engineers reviewing the 74LVC3G04DC,125 datasheet, 74LVC3G04DC,125 pinout, 74LVC3G04DC,125 application, or 74LVC3G04DC,125 equivalent, key selection considerations include its 3-channel inverting function, rail-to-rail input tolerance, IOFF-enabled system-level power sequencing, and compact 2.3 mm body width VSSOP8 footprint for space-constrained digital interface designs.
Technical Context
This device implements three independent inverting buffers with Schmitt-trigger inputs, enabling robust signal conditioning of slow-rising or noisy digital signals across wide voltage ranges. Each channel operates with identical logic behavior: LOW input yields HIGH output, and HIGH input yields LOW output - per Table 4 function table.
The IOFF circuitry actively disables outputs when VCC = 0 V, blocking backflow current during partial power-down sequences. Input clamping diodes and ±24 mA drive capability support direct interfacing with TTL and 5 V CMOS logic while maintaining compatibility with 1.65 V LVC-family systems.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 1.65 V to 5.5 V - enables single-supply operation across LVTTL, LVCMOS, and mixed-voltage board interfaces |
| Output Drive Strength | ±24 mA at VCC = 3.0 V - sufficient to drive standard 50 Ω transmission lines or fan-out to ≥10 LS-TTL loads |
| Propagation Delay | 0.5 ns to 5.5 ns (VCC = 1.65 V to 5.5 V) - supports >100 MHz toggle rates in high-speed control paths |
| IOFF Leakage Current | ±2 μA max at VCC = 0 V - ensures safe hot-insertion and multi-rail power sequencing without bus contention |
| Input Voltage Tolerance | 0 V to 5.5 V independent of VCC - allows 5 V inputs even when powered from 1.8 V or 2.5 V rails |
| Operating Temperature | −40 °C to +125 °C - qualified for under-hood automotive modules, industrial PLC I/O, and extended-range embedded controllers |
| ESD Robustness | HBM >2000 V, CDM >1000 V - reduces need for external protection in board-level ESD zones |
Pinout & Package
VSSOP8 (SOT765-1) package: plastic very thin shrink small outline, 8 leads, 2.3 mm body width, 0.5 mm lead length, 0.65 mm pitch.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 3, 6 | 1A / 2A / 3A | Independent logic inputs - each accepts 0–5.5 V regardless of VCC; Schmitt-triggered for noise immunity |
| 4 | GND | Ground reference for all I/O and internal circuitry - must be low-impedance connection to system ground plane |
| 2, 5, 7 | 3Y / 2Y / 1Y | Inverted outputs - active-drive outputs with rail-to-rail swing and IOFF disable when VCC = 0 V |
| 8 | VCC | Primary supply rail - powers all three inverters and IOFF control; decoupling capacitor required within 1 cm |
Key Features
| Feature | Design Value |
|---|---|
| Wide Supply Range | 1.65 V to 5.5 V operation eliminates need for level shifters in mixed-voltage FPGA/CPU peripheral interfaces |
| 5 V-Tolerant Inputs | Accepts 5 V signals at any VCC ≥1.65 V - enables direct connection to legacy 5 V microcontrollers or sensors |
| Schmitt-Trigger Inputs | Hysteresis >0.3 V typical - rejects noise on long PCB traces or mechanical switch bounce in reset/enable lines |
| IOFF Partial Power-Down | Outputs go high-impedance when VCC = 0 V - prevents back-current during hot-swap or staggered power sequencing |
| High Noise Immunity | VIH/VIL thresholds scale with VCC and include margin - maintains logic integrity in electrically noisy motor-control or power-conversion environments |
Applications
| Industrial Sensor Interface | FPGA Configuration Management |
|---|---|
Use Scenario: Inverting enable signals from 5 V proximity sensors before routing to 1.8 V FPGA configuration pins. IC Role / Device Role / Timing Role: Level-translating inverter buffer with Schmitt-trigger input to clean noisy sensor edges and translate voltage domain. Use Value: Eliminates external resistor-divider networks and discrete Schmitt triggers, reducing BOM count and layout area by 40%. |
Use Scenario: Driving inverted reset or boot-mode select lines on Xilinx Artix-7 FPGAs requiring precise timing and 5 V-tolerant inputs. IC Role / Device Role / Timing Role: Timing-critical inverter with sub-2 ns propagation delay at 3.3 V to meet FPGA startup setup/hold windows. Use Value: Guarantees monotonic reset deassertion with no glitches during power ramp, preventing FPGA configuration failure. |
| Automotive Body Control Module | USB-C Power Delivery Sequencing |
Use Scenario: Inverting ignition-switch status for CAN transceiver enable in under-hood junction boxes. IC Role / Device Role / Timing Role: High-reliability inverter with −40 °C to +125 °C rating and IOFF for safe power-down during battery disconnect. Use Value: Enables fail-safe shutdown without latch-up risk when main 12 V rail drops while 5 V auxiliary remains active. |
Use Scenario: Inverting USB PD controller fault signals to disable power switches during overvoltage events. IC Role / Device Role / Timing Role: Fast, rail-to-rail inverter with 5 V tolerant input accepting PD controller's open-drain alert output. Use Value: Provides deterministic <10 ns response to fault conditions, meeting USB PD 3.1 fast-fault shutdown requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar triple inverter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC3G04DCUR | TI version in same VSSOP8 package; identical VCC range and IOFF, but lower max output drive (±24 mA only at VCC ≥ 4.5 V) | Less suitable for driving heavy capacitive loads at 3.3 V due to reduced drive strength below 4.5 V | Select when sourcing from TI-authorized channels or requiring TI-specific qualification documentation |
| 74AUP3G04GW,125 | Nexperia AUP variant: lower ICC (0.9 μA typ), slower tpd (max 11.5 ns), narrower VCC (0.8–3.6 V), no 5 V tolerance | Optimized for ultra-low-power battery-operated devices, not mixed-voltage translation | Prefer for energy-sensitive wearables or IoT nodes where speed and voltage flexibility are secondary to quiescent current |
Compared with SN74LVC3G04DCUR, the 74LVC3G04DC,125 provides stronger drive at mid-rail voltages and guaranteed 5 V input tolerance; versus 74AUP3G04GW,125, it trades higher static current for broader voltage operation and faster switching - making it optimal for industrial and automotive mixed-rail control logic.
Availability
74LVC3G04DC,125 is available at Aetrix Electronics and suitable for industrial sensor interfaces, FPGA configuration management, automotive body control modules, and USB-C power delivery sequencing requiring stable component supply across extended temperature ranges.
Supply support for 74LVC3G04DC,125 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert headquartered in Nijmegen, Netherlands, specializing in high-volume production of essential semiconductors including logic, discretes, and MOSFETs for industrial, automotive, and computing markets.
The 74LVC3G04 belongs to Nexperia's LVC logic family - engineered for low-voltage, high-noise-immunity digital interfacing in space- and power-constrained applications demanding robust mixed-voltage operation.
FAQ
Does 74LVC3G04DC,125 support hot-swap insertion into a live 5 V bus?
Yes - its 5 V-tolerant inputs and IOFF circuitry allow safe insertion while VCC is unpowered. When VCC = 0 V, outputs enter high-impedance state, preventing back-current flow from the 5 V bus through the device. Input clamping diodes limit VI to −0.5 V to +6.5 V, protecting internal circuitry during transient overvoltage events.
Can this device drive a 50 Ω transmission line directly?
Yes - at VCC = 3.0 V, it delivers ±24 mA, enabling direct termination of a 50 Ω line with a series resistor (e.g., 25 Ω) for impedance matching. Measured tpd remains ≤5.5 ns under 50 pF load, preserving signal integrity for clock distribution or control signaling up to 100 MHz.
What is the minimum input rise/fall time supported by the Schmitt-trigger inputs?
The datasheet specifies Δt/ΔV limits: 20 ns/V for VCC = 1.65–2.7 V and 10 ns/V for VCC = 2.7–5.5 V. At VCC = 3.3 V, this translates to maximum allowable edge rates of 33 ns for a full 0→3.3 V transition - sufficient for mechanical switch debouncing, slow microcontroller GPIO, or filtered analog comparator outputs.
Is the VSSOP8 package (SOT765-1) compatible with standard reflow profiles?
Yes - the SOT765-1 package is qualified for IPC/JEDEC J-STD-020D moisture sensitivity level 1 (MSL-1), allowing unlimited floor life and compatibility with standard Pb-free reflow profiles (peak 260 °C). Its 0.65 mm pitch and 2.3 mm body width support automated optical inspection and 0.3 mm stencil apertures for reliable solder paste release.
74LVC3G04DC,125 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- 74LVC
- Package/Case:
- 8-VFSOP (0.091", 2.30mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Logic Type:
- Inverter
- Number of Circuits:
- 3
- Number of Inputs:
- 3
- Features:
- -
- Voltage - Supply:
- 1.65V ~ 5.5V
- Current - Quiescent (Max):
- 4 µA
- Current - Output High, Low:
- 32mA, 32mA
- Input Logic Level - Low:
- -
- Input Logic Level - High:
- -
- Max Propagation Delay @ V, Max CL:
- 3.2ns @ 5V, 50pF
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-VSSOP
74LVC3G04DC,125 FAQ
1.How can I place an order for 74LVC3G04DC,125 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74LVC3G04DC,125 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74LVC3G04DC,125 reliable?
The price and inventory of 74LVC3G04DC,125 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74LVC3G04DC,125 is usually 5 days.
3.What payment methods are accepted for 74LVC3G04DC,125?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74LVC3G04DC,125 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 74LVC3G04DC,125?
74LVC3G04DC,125 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74LVC3G04DC,125 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74LVC3G04DC,125?
For technical support, including 74LVC3G04DC,125 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74LVC3G04DC,125 requirements.
6.How does Aetrix verify that 74LVC3G04DC,125 is sourced from the original manufacturer or authorized distributors?
All 74LVC3G04DC,125 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74LVC3G04DC,125 meets industry standards.
7.What is the process for return or replacement of 74LVC3G04DC,125?
All 74LVC3G04DC,125 units undergo pre-shipment inspection (PSI). If there is an issue with 74LVC3G04DC,125, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74LVC3G04DC,125 part is unused and in its original packaging.
Return procedure for 74LVC3G04DC,125:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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