STMicroelectronics 74V1T32STR
- Part No.:
- 74V1T32STR
- Manufacturer:
- STMicroelectronics
- Category:
- Gates and Inverters
- Package:
- SC-74A, SOT-753
- Datasheet:
-
74V1T32STR.pdf
- Description:
- IC GATE OR 1CH 2-INP SOT23-5
- Quantity:
- Payment:

- Shipping:

Inventory:2,265
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
74V1T32STR from STMicroelectronics is a single 2-input OR gate in SOT23-5L package, operating at 4.5–5.5 V with 4.5 ns typical propagation delay, ±8 mA symmetrical output drive, and input tolerance up to 7 V independent of supply. It enables level-shifting between 5 V and 3 V systems in interface logic applications.
For engineers reviewing the 74V1T32STR datasheet, 74V1T32STR pinout, 74V1T32STR application, or 74V1T32STR equivalent, key selection criteria include input overvoltage tolerance (0–7 V), power-down input protection, symmetrical output impedance, low ICC (1 µA max), and operation across –55°C to +125°C industrial temperature range.
Technical Context
This device implements a two-stage buffered CMOS OR gate using sub-micron C2MOS technology, delivering high noise immunity and stable switching. Its input structure accepts 0–7 V regardless of VCC, enabling robust interfacing across mixed-voltage domains.
The output stage provides matched tPLH ≅ tPHL propagation delays and symmetrical |IOH| = IOL = 8 mA (min) drive capability at VCC = 4.5 V, supporting clean signal integrity in high-speed digital control paths.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Propagation Delay | 4.5 ns (typ) at VCC = 5 V - enables ≤220 MHz toggle rate in non-loaded conditions |
| Supply Voltage Range | 4.5 V to 5.5 V - supports standard 5 V TTL/CMOS rail with ±10% tolerance |
| Input Voltage Range | –0.5 V to +7.0 V - allows safe interfacing with 3 V, 5 V, or overvoltage signals without clamping diodes |
| Output Drive | ±8 mA (min) at VCC = 4.5 V - ensures reliable fan-out to ≥10 LS-TTL loads |
| Quiescent Current | 1 µA (max) at TA = 25°C - supports ultra-low-power standby in battery-backed logic |
| Operating Temperature | –55°C to +125°C - qualified for automotive under-hood and industrial control environments |
| Input Leakage | ±1.0 µA (max) at VI = 5.5 V or GND - minimizes unintended biasing in high-impedance nodes |
Pinout & Package
SOT23-5L surface-mount package: 1.6 mm × 2.9 mm footprint, 1.3 mm height, 0.95 mm lead pitch, thermally enhanced with exposed pad not present.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | 1A | Primary OR input - accepts 0–7 V, protected by power-down circuitry during VCC=0 |
| 2 | 1B | Secondary OR input - identical voltage and protection specs as Pin 1 |
| 3 | GND | Ground reference - must be connected before VCC to avoid latch-up risk |
| 4 | 1Y | OR output - rail-to-rail swing (0 V to VCC), ±8 mA drive capability |
| 5 | VCC | Positive supply - decoupling capacitor (100 nF) required within 5 mm of this pin |
Key Features
| Feature | Design Value |
|---|---|
| Input Overvoltage Tolerance | 0–7 V independent of VCC - eliminates external level-shifters when connecting 3 V microcontrollers to 5 V peripherals |
| Power-Down Input Protection | Inputs remain high-impedance and non-latching when VCC = 0 - prevents back-driving and system corruption during hot-swap |
| Matched Propagation Delays | tPLH ≅ tPHL - reduces duty-cycle distortion in clocked OR-based enable/gating circuits |
| Low Dynamic Power | CPD = 14 pF - limits ICC(opr) to <100 µA at 1 MHz with 5 V supply, easing thermal design |
| Enhanced Latch-Up Immunity | Qualified per JEDEC JESD78 - withstands >200 mA transient current without functional interruption |
Applications
| Industrial PLC I/O Expansion | Automotive Body Control Module |
|---|---|
Use Scenario: OR-ing enable signals from multiple sensor conditioners before driving a shared ADC channel. IC Role / Device Role / Timing Role: Single 2-input OR gate performing wired-OR logic aggregation with sub-5 ns timing precision. Use Value: Eliminates need for discrete diode-OR networks, reducing board area by 60% and improving signal rise time consistency. | Use Scenario: Combining door-open and seat-belt-unlatched alerts into a single warning indicator enable path. IC Role / Device Role / Timing Role: Fault-tolerant combinatorial logic element with guaranteed operation at –40°C to +125°C. Use Value: Input overvoltage tolerance allows direct connection to 12 V switched lines via resistive dividers, cutting BOM count by one resistor network. |
| 5 V ↔ 3.3 V Interface Bridge | Low-Power Sensor Hub Logic |
Use Scenario: Translating active-high interrupt signals from a 3.3 V IoT MCU to a legacy 5 V UART controller. IC Role / Device Role / Timing Role: Bidirectional voltage-level translator configured as OR gate with supply-independent inputs. Use Value: No external biasing or direction control needed - simplifies PCB routing and reduces layout iterations. | Use Scenario: Enabling sleep-mode wake-up by OR-ing motion, light, and proximity sensor outputs. IC Role / Device Role / Timing Role: Ultra-low-quiescent-current combinatorial gate maintaining <1 µA system standby current. Use Value: Extends coin-cell battery life beyond 5 years in maintenance-free wireless sensors. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar single 2-input OR gate applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC1G32DBVR | 3.3 V only supply (1.65–5.5 V), lower ICC (100 nA typ), no 7 V input tolerance | Requires external clamping for >VCC inputs; unsuitable for mixed-voltage hot-swap | Prefer when system operates strictly at 3.3 V and lowest possible static power is critical |
| NC7SZ32P5X | Wider VCC range (1.65–5.5 V), higher speed (3.5 ns typ), but no input overvoltage protection | Lacks 0–7 V input rating - requires series resistors on all inputs in 5 V systems | Select for highest-speed 5 V-only designs where input protection is handled externally |
Compared with SN74LVC1G32DBVR and NC7SZ32P5X, the 74V1T32STR uniquely combines 5 V operation, 7 V input tolerance, and power-down protection - making it the only choice for robust 5 V system interfaces subject to undervoltage or hot-plug events.
Availability
74V1T32STR is available at Aetrix Electronics and suitable for industrial PLC I/O expansion, automotive body control modules, and 5 V ↔ 3.3 V interface bridges requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for 74V1T32STR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, designing and manufacturing analog, MEMS, power, and microcontroller solutions for industrial, automotive, and consumer markets.
The 74V series targets high-speed, high-reliability CMOS logic for mission-critical industrial and automotive applications, emphasizing latch-up immunity, wide temperature operation, and mixed-voltage interoperability.
FAQ
Can 74V1T32STR operate with VCC = 3.3 V?
No. The recommended operating VCC range is strictly 4.5 V to 5.5 V per datasheet Section "Recommended Operating Conditions". At 3.3 V, VOH drops below 2.4 V and VOL exceeds 0.55 V, violating TTL-compatible output thresholds and risking downstream logic misreads.
Does 74V1T32STR require external pull-up or pull-down resistors on inputs?
No. Inputs are internally protected with power-down circuitry and exhibit <±1 µA leakage across –0.5 V to +7.0 V. External resistors are unnecessary unless specific biasing is required for unused inputs in partial-enable configurations.
What is the maximum capacitive load CL supported at full speed?
At VCC = 5.0 V and input rise/fall time ≤3 ns, the device maintains tPLH/tPHL ≤9.0 ns (max) up to CL = 50 pF, including PCB trace and probe capacitance. Beyond 50 pF, propagation delay increases nonlinearly and output edge rate degrades.
Is 74V1T32STR pin-compatible with 74V1T00 or other 74V1Txx variants?
No. While all 74V1Txx devices use SOT23-5L, pin assignments differ: 74V1T00 (NAND) assigns Pin 1 to A, Pin 2 to B, Pin 4 to Y - same as 74V1T32 - but 74V1T02 (NOR) swaps output to Pin 2 and uses Pin 4 as B. Direct substitution requires schematic and layout verification.
74V1T32STR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- 74V
- Package/Case:
- SC-74A, SOT-753
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Logic Type:
- OR Gate
- Number of Circuits:
- 1
- Number of Inputs:
- 2
- Features:
- -
- Voltage - Supply:
- 4.5V ~ 5.5V
- Current - Quiescent (Max):
- 1 µA
- Current - Output High, Low:
- 8mA, 8mA
- Input Logic Level - Low:
- 0.8V
- Input Logic Level - High:
- 2V
- Max Propagation Delay @ V, Max CL:
- 7.5ns @ 5V, 50pF
- Operating Temperature:
- -55°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOT-23-5
74V1T32STR FAQ
1.How can I place an order for 74V1T32STR through Aetrix?
Please submit a Request for Quotation (RFQ) for 74V1T32STR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74V1T32STR reliable?
The price and inventory of 74V1T32STR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74V1T32STR is usually 5 days.
3.What payment methods are accepted for 74V1T32STR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74V1T32STR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 74V1T32STR?
74V1T32STR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74V1T32STR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74V1T32STR?
For technical support, including 74V1T32STR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74V1T32STR requirements.
6.How does Aetrix verify that 74V1T32STR is sourced from the original manufacturer or authorized distributors?
All 74V1T32STR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74V1T32STR meets industry standards.
7.What is the process for return or replacement of 74V1T32STR?
All 74V1T32STR units undergo pre-shipment inspection (PSI). If there is an issue with 74V1T32STR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74V1T32STR part is unused and in its original packaging.
Return procedure for 74V1T32STR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
74V1T32STR Tags
-
SN74LVC1G14DBVR
Texas Instruments
-
SN74LVC1G14DCKR
Texas Instruments
-
SN74AHC1G14DBVR
Texas Instruments
-
SN74LVC1G08DBVR
Texas Instruments
-
SN74LVC1G08DCKR
Texas Instruments
-
SN74LVC1G32DCKR
Texas Instruments
-
SN74LVC1G04DBVR
Texas Instruments
.jpg)
-
74LVC1G08GW,125
Nexperia USA Inc.
-
SN74LVC1G04DCKR
Texas Instruments
-
SN74AHC1G08DBVR
Texas Instruments
-
SN74LVC1G32DBVR
Texas Instruments
-
SN74AHCT1G08DBVR
Texas Instruments
Tech Hub
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
LDO regulator guide covering low dropout voltage, power dissipation, thermal design, PSRR, output noise, capacitor stability, adjustable LDO circuits, LDO vs buck converter and datasheet selection chec…
Conditional Access Module guide covering CAM meaning, CI/CI+ interface, smart card authorization, DVB security workflow, TV and set-top box compatibility, internal electronics, ESD protection, connecto…
Guide to electronic component obsolescence covering EOL risk, PCN/PDN notices, last-time buy planning, replacement options, form-fit-function validation, counterfeit risk and BOM lifecycle management.
18650 battery guide covering lithium-ion cell basics, 3.6V/3.7V voltage, 4.2V charging, mAh and Wh capacity, protected cells, chargers, BMS, series-parallel packs, holders, welding and sourcing checks.…

