onsemi 74VCX86MTC
- Part No.:
- 74VCX86MTC
- Manufacturer:
- onsemi
- Category:
- Gates and Inverters
- Package:
- 14-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
74VCX86MTC.pdf
- Description:
- IC GATE XOR 4CH 2-INP 14TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:381
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Product details
Overview
74VCX86MTC from ON Semiconductor is a low-voltage quad 2-input XOR gate IC operating from 1.2V to 3.6V VCC, with 3.6V-tolerant I/O, 3.0 ns max propagation delay at 3.3V, ±24 mA drive strength, and TSSOP-14 package. It serves as a logic-level combinatorial gate in voltage-translating data paths of portable and mixed-supply digital systems.
For engineers reviewing the 74VCX86MTC datasheet, pinout, applications, or equivalent options, key selection criteria include I/O voltage tolerance across supply domains, propagation delay consistency under 30 pF load, power-off high-impedance behavior, static drive capability at 1.8V/2.5V/3.3V, and JEDEC MO-153-compliant TSSOP packaging for space-constrained PCB layouts.
Technical Context
The 74VCX86MTC implements four independent 2-input exclusive-OR functions using advanced CMOS process technology optimized for simultaneous low-voltage operation and high-speed switching. Its input and output structures support bidirectional 3.6V tolerance regardless of VCC level (1.2V–3.6V), enabling safe interfacing between disparate logic families.
It features power-off high-impedance inputs and outputs-critical for hot-swap and partial-power-down system architectures-and meets JEDEC JESD78 latchup immunity requirements. Dynamic noise suppression circuitry is integrated to reduce EMI during fast edge transitions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Range | 1.2V to 3.6V - supports direct integration into 1.8V, 2.5V, and 3.3V logic domains without level shifters |
| Input/Output Tolerance | Up to 3.6V - allows connection to 3.3V or 5V legacy signals while powered from lower VCC |
| tPD Max | 3.0 ns @ VCC = 3.3V, CL = 30 pF - enables use in sub-100 MHz synchronous data paths |
| IOH/IOL | ±24 mA @ VCC = 3.0V - drives multiple standard CMOS loads or small capacitive buses |
| Power-off Hi-Z | Active - prevents back-driving and signal contention when VCC = 0V |
| Operating Temp | −40°C to +85°C - qualified for industrial ambient environments |
| CIN/COUT | 6 pF / 7 pF - minimizes loading on driving gates and reduces dynamic power consumption |
Pinout & Package
74VCX86MTC is housed in a 14-lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153 compliant, 4.4 mm wide, with 0.65 mm lead pitch. The package includes exposed pad designator "DAP" (Die Attach Pad) on bottom surface, electrically unconnected.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 4, 5, 8, 9, 12, 13 | A/B Inputs (A1–B4) | Dual inputs per XOR gate; accept 3.6V-tolerant logic levels independent of VCC |
| 3, 6, 10, 11 | O Outputs (O1–O4) | CMOS-compatible outputs with 3.6V tolerance and ±24 mA drive at 3.0V VCC |
| 7 | GND | Ground reference for all internal circuitry and I/O structures |
| 14 | VCC | Primary power supply rail (1.2V–3.6V); powers internal logic and output drivers |
Key Features
| Feature | Design Value |
|---|---|
| Wide VCC range with I/O tolerance | Operates from 1.2V while safely accepting 3.6V inputs/outputs - eliminates external level translators in mixed-voltage systems |
| Low propagation delay | 3.0 ns max at 3.3V/30 pF - supports timing-critical XOR applications such as parity generation and error detection |
| Power-off high-impedance I/O | Inputs and outputs enter Hi-Z state when VCC = 0 - essential for hot-plug, partial-power-down, and bus-sharing architectures |
| Robust ESD and latchup immunity | 2000V HBM ESD rating and JEDEC JESD78-compliant latchup performance - ensures reliability in handling and system-level stress |
| Pb-free TSSOP package | JEDEC MO-153-compliant MTC14 package with RoHS-compliant finish - compatible with standard reflow profiles and automated assembly |
Applications
| Parity Generation | Data Path XOR Logic |
|---|---|
Use Scenario: Real-time even/odd parity bit generation for 8-bit parallel data bus in microcontroller peripherals. IC Role / Device Role / Timing Role: Combinational XOR gate array computing bitwise XOR across four independent 2-bit pairs. Use Value: Enables single-cycle parity calculation with <3.0 ns delay, supporting >100 Mbps parallel throughput without pipeline stalls. | Use Scenario: Differential signal encoding in low-power sensor interface where inverted/non-inverted data streams are generated. IC Role / Device Role / Timing Role: Dual-rail logic translator producing complementary outputs synchronized to clock edges. Use Value: Delivers matched tPHL/tPLH and <0.75 ns skew across outputs - critical for jitter-sensitive differential signaling. |
| Voltage-Level Translation | Hot-Swap Bus Arbitration |
Use Scenario: Interfacing a 1.8V FPGA I/O bank to a 3.3V system management bus. IC Role / Device Role / Timing Role: Bidirectional logic-level shifter leveraging 3.6V-tolerant I/O and 1.8V VCC operation. Use Value: Eliminates discrete MOSFET translators; maintains signal integrity with 6 pF input capacitance and no level-shift latency. | Use Scenario: Enabling/disabling peripheral slots in modular industrial controllers with live backplane power. IC Role / Device Role / Timing Role: Isolation gate controlling enable signals to downstream power switches during insertion/removal. Use Value: Power-off Hi-Z behavior prevents backfeed into unpowered modules - satisfies IEC 61000-4-2 and hot-swap safety requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar XOR gate applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC86APW | Lower VCC min (1.65V), no 3.6V I/O tolerance, 3.7 ns tPD @ 3.3V | Not suitable for 1.2V–1.5V systems or 3.3V-to-lower-voltage translation | Select when only 1.65V–3.6V operation required and cost sensitivity outweighs voltage flexibility |
| 74ALVC86MTCX | Same VCC range (1.65V–3.6V), 3.6V tolerant, but 4.2 ns tPD @ 3.3V and higher ICC | Higher propagation delay limits use in >80 MHz timing paths; less optimal for battery-powered devices | Prefer when ALVC family compatibility is mandated and speed margin >1.2 ns is acceptable |
Compared with SN74LVC86APW and 74ALVC86MTCX, the 74VCX86MTC uniquely supports 1.2V operation and guarantees 3.6V I/O tolerance across its full supply range - making it the only option for ultra-low-voltage mixed-domain designs requiring sub-3 ns delay and robust hot-swap behavior.
Availability
74VCX86MTC is available at Aetrix Electronics and suitable for industrial control interfaces, portable medical monitors, automotive body electronics, and IoT edge node designs requiring stable component supply across extended temperature and mixed-voltage conditions.
Supply support for 74VCX86MTC includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
ON Semiconductor is a global semiconductor manufacturer specializing in energy-efficient power management, analog, logic, and sensor solutions for automotive, industrial, cloud power, and IoT applications.
The 74VCX logic family was developed by Fairchild (now ON Semiconductor) to deliver high-speed, low-voltage CMOS logic with enhanced I/O tolerance and power-off isolation - targeting portable, battery-operated, and mixed-supply digital systems.
FAQ
What is the minimum VCC supply voltage supported by the 74VCX86MTC?
The 74VCX86MTC supports a minimum VCC of 1.2V, verified per datasheet Recommended Operating Conditions. At 1.2V, it delivers functional XOR operation with IOL ≥ 100 µA and tPD ≤ 39 ns (CL = 15 pF). This enables direct use in ultra-low-power subsystems such as coin-cell–powered sensors or deep-sleep MCU peripherals where other LVC/ALVC families cannot operate.
Does the 74VCX86MTC support 3.3V inputs when powered from 1.8V VCC?
Yes - the 74VCX86MTC has guaranteed 3.6V-tolerant inputs and outputs across its entire 1.2V–3.6V VCC range. When VCC = 1.8V, inputs up to 3.6V are safely accepted without damage or leakage, and outputs swing rail-to-rail (0V to 1.8V) while maintaining 3.6V tolerance on the output pins. This is confirmed in the Absolute Maximum Ratings and DC Electrical Characteristics tables.
What is the propagation delay variation across temperature for the 74VCX86MTC?
The 74VCX86MTC exhibits monotonic tPD increase with temperature: at VCC = 3.3V and CL = 30 pF, tPD is 0.6–3.0 ns over −40°C to +85°C. The datasheet specifies maximum values only; typical delay at 25°C is ~1.8 ns. Designers must validate timing margins using worst-case (max) values across voltage, temperature, and load per application requirements.
Is the DAP (Die Attach Pad) on the 74VCX86MTC package electrically connected?
No - the DAP (Die Attach Pad) on the bottom of the 74VCX86MTC's TSSOP package is electrically unconnected (NC), as explicitly stated in the Pin Descriptions section of the datasheet. It serves solely as a thermal and mechanical anchor; no soldering to ground or any other net is required or recommended unless specified in a custom thermal design.
How does the 74VCX86MTC behave during power-down sequences?
During power-down, the 74VCX86MTC enters a true high-impedance state on both inputs and outputs - confirmed by the "Power-off high impedance inputs and outputs" feature and IOFF specification (≤10 µA leakage at 0V VCC). This prevents back-driving, bus contention, or unintended current flow when VCC drops below 0.5V, making it suitable for systems with staggered power sequencing or hot-swap capability.
74VCX86MTC Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- 74VCX
- Package/Case:
- 14-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Logic Type:
- XOR (Exclusive OR)
- Number of Circuits:
- 4
- Number of Inputs:
- 2
- Features:
- -
- Voltage - Supply:
- 1.2V ~ 3.6V
- Current - Quiescent (Max):
- 20 µA
- Current - Output High, Low:
- 24mA, 24mA
- Input Logic Level - Low:
- 0.7V ~ 0.8V
- Input Logic Level - High:
- 1.6V ~ 2V
- Max Propagation Delay @ V, Max CL:
- 3ns @ 3.3V, 30pF
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-TSSOP
74VCX86MTC FAQ
1.How can I place an order for 74VCX86MTC through Aetrix?
Please submit a Request for Quotation (RFQ) for 74VCX86MTC on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74VCX86MTC reliable?
The price and inventory of 74VCX86MTC are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74VCX86MTC is usually 5 days.
3.What payment methods are accepted for 74VCX86MTC?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74VCX86MTC transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 74VCX86MTC?
74VCX86MTC orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74VCX86MTC order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74VCX86MTC?
For technical support, including 74VCX86MTC datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74VCX86MTC requirements.
6.How does Aetrix verify that 74VCX86MTC is sourced from the original manufacturer or authorized distributors?
All 74VCX86MTC products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74VCX86MTC meets industry standards.
7.What is the process for return or replacement of 74VCX86MTC?
All 74VCX86MTC units undergo pre-shipment inspection (PSI). If there is an issue with 74VCX86MTC, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74VCX86MTC part is unused and in its original packaging.
Return procedure for 74VCX86MTC:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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