Renesas 79RC32T355-150DHGI
- Part No.:
- 79RC32T355-150DHGI
- Manufacturer:
- Renesas
- Category:
- Microprocessors
- Package:
- 208-BFQFP
- Datasheet:
-
79RC32T355-150DHGI.pdf
- Description:
- IC MPU INTERPRISE 150MHZ 208QFP
- Quantity:
- Payment:

- Shipping:

Inventory:4,881
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Product details
Overview
79RC32T355-150DHGI from Integrated Device Technology (IDT) is a 32-bit integrated communications processor built around the RC32300 MIPS-II–enhanced CPU core, featuring on-chip SDRAM controller (2 banks, 512 MB total), dual 16550-compatible UARTs (up to 1.5 Mb/s), USB 1.1 device interface with integrated transceiver, and 10/100 Ethernet MAC with MII. It targets xDSL residential gateways and SOHO routers requiring voice-over-IP, ATM SAR, and TDM connectivity.
For engineers reviewing the 79RC32T355-150DHGI datasheet, 79RC32T355-150DHGI pinout, 79RC32T355-150DHGI application, or 79RC32T355-150DHGI equivalent, key selection criteria include its 180 MHz pipeline frequency, 2.5 V core / 3.3 V I/O supply, 208-pin PQFP package, integrated ATM SAR with UTOPIA L1/L2 support, and real-time debug via EJTAG with PC trace capability.
Technical Context
The 79RC32T355-150DHGI implements a hybrid ATM SAR architecture-hardware handles CRC-32/AAL5, HEC, cell buffering, and frame-mode transmit, while software manages higher-layer segmentation and reassembly. Its TDM interface supports up to 128 time slots at 8.192 Mb/s and is compatible with Lucent CHI, Mitel ST-bus, and K2 standards for CODEC interfacing.
Memory subsystem includes 8 KB 2-way instruction cache and 2 KB 2-way data cache with per-line locking, MMU with 16-entry TLB, and flexible peripheral controller supporting 8-/16-/32-bit bus widths, 26-bit addressing, and boot ROM access. The 16-channel DMA supports scatter/gather, unaligned, and burst transfers across memory, I/O, and on-chip peripherals.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | RC32300 32-bit MIPS-II–enhanced core with DSP instructions and prefetch capability for modem emulation in software. |
| Pipeline Frequency | 180 MHz - enables real-time processing of VoIP, routing, and ATM SAR without external accelerators. |
| Cache | 8 KB instruction + 2 KB data, 2-way set associative, with per-line locking for deterministic latency-critical code. |
| SDRAM Support | 2 banks, 32-bit data path, up to 512 MB; automatic refresh and page-mode operation reduce CPU overhead. |
| UARTs | Two 16550-compatible ports with baud rates up to 1.5 Mb/s - sufficient for console debug and serial control links. |
| USB Interface | USB 1.1 slave device controller with integrated transceiver and full-speed (12 Mb/s) operation - eliminates external PHY. |
| Ethernet MAC | IEEE 802.3u-compliant 10/100 Mbps MAC with MII, auto-negotiation, and 64-entry multicast hash filtering. |
| Package | 208-pin plastic quad flat pack (PQFP, DH suffix), 2.5 V core / 3.3 V I/O voltage domains. |
Pinout & Package
79RC32T355-150DHGI is housed in a 208-pin PQFP (Plastic Quad Flat Package) with 0.5 mm pitch, thermally rated for industrial temperature range (−40°C to +85°C). Pin functions are multiplexed across 36 GPIOs and dedicated interface buses including SDRAM, ATM, TDM, MII, and USB.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CLKP | System clock input | Master reference clock; RC32300 pipeline runs at integer multiple (×2/×3/×4) - determines maximum CPU throughput. |
| COLDRSTN | Cold reset input | Active-low signal that initializes all internal state, loads boot configuration, and locks PLL - required for power-on or recovery. |
| SYSCLKP | System clock output | Buffered/delayed version of CLKP; drives external SDRAM and feeds SDCLKINP - ensures synchronous timing for memory reads. |
| MADDR[25:0]/MDATA[31:0] | Memory address/data bus | 26-bit address + 32-bit data path supports SDRAM, Flash, SRAM, and peripherals - enables direct boot from 8-bit ROM. |
| TDMFP/TDMCLKP/TDMDOP/TDMDIP | TDM interface signals | Frame sync, clock, serial output/input - directly connect to telephone CODECs or audio A/D-D/A with no glue logic. |
| USBDP/USBDN | USB differential data pair | Integrated transceiver eliminates need for external USB PHY - simplifies board layout and reduces BOM cost. |
| MIIRXDP[3:0]/MIITXDP[3:0] | MII nibble data buses | 4-bit-wide receive/transmit paths compliant with IEEE 802.3u - interface to standard Ethernet PHYs like DP83840. |
| GPIOP[0]–GPIOP[35] | General-purpose I/O | 36 programmable pins; each configurable as input/output/alternate function (e.g., UART, I²C, ATM, DMA status). |
Key Features
| Feature | Design Value |
|---|---|
| Integrated ATM SAR | Hardware-accelerated CRC-32/AAL5, HEC, and 16-cell buffering - offloads CPU from cell-level processing in xDSL applications. |
| EJTAG Real-Time Mode | Dedicated PCST[2:0] trace pins enable cycle-accurate instruction execution visibility - critical for debugging real-time VoIP stacks. |
| Per-line cache locking | Allows locking of critical DSP or protocol code in instruction/data cache - guarantees bounded interrupt latency for telephony tasks. |
| Flexible peripheral controller | Supports Intel/Motorola wait-state protocols, write protection, and transceiver control - simplifies integration of legacy NOR Flash or FPGA peripherals. |
| TDM bus compatibility | Native support for Lucent CHI, Mitel ST-bus, and K2 framing - enables direct connection to SLIC and analog front-end chips in residential gateways. |
| DMA scatter/gather | Descriptor-based chaining allows non-contiguous memory buffers - essential for packetized ATM and Ethernet frame handling without CPU copy. |
Applications
| DSL Residential Gateway | SOHO Router with VoIP |
|---|---|
|
Use Scenario: Aggregates POTS voice, ADSL data, and Ethernet LAN in single-box home gateway. IC Role / Device Role / Timing Role: Central system-on-chip executing routing, firewall, ATM SAR, TDM-to-IP conversion, and USB/ethernet bridging. Use Value: Eliminates discrete CPU, ATM controller, TDM interface, and USB PHY - reduces component count by >12 and PCB area by 35%. |
Use Scenario: Small office/home office router supporting simultaneous VoIP calls, QoS-aware traffic shaping, and wired/wireless backhaul. IC Role / Device Role / Timing Role: Real-time packet forwarding engine with hardware-assisted ATM segmentation, Ethernet MAC, and low-latency TDM voice capture. Use Value: 180 MHz CPU + per-line cache locking ensures sub-100 µs jitter for G.711 voice packets - meets ITU-T G.114 one-way delay requirements. |
| xDSL Line Card | Cable Modem Termination System (CMTS) Edge Node |
|
Use Scenario: Modular line card in carrier-grade DSLAM supporting multiple ADSL2+ subscribers. IC Role / Device Role / Timing Role: ATM SAR termination point with UTOPIA Level 2 interface to xDSL PHY chipsets and MII to backplane switch fabric. Use Value: Hardware CRC-10/32 and virtual caching receive mechanism allow line-rate 25+ Mbps ATM processing per channel without CPU intervention. |
Use Scenario: Edge node aggregating DOCSIS upstream/downstream channels and bridging to IP core network. IC Role / Device Role / Timing Role: Protocol translation hub performing TDM-to-IP encapsulation, USB host-side management of service modules, and Ethernet MAC framing. Use Value: Dual UARTs and USB 1.1 interface enable local diagnostics and firmware updates via serial console or USB flash drive - avoids remote SSH dependency. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar integrated communications processor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 79RC32355-150DHGI | Same die, identical feature set and pinout - this is the base part number referenced in IDT documentation. | Industrial temperature grade (−40°C to +85°C), 208-pin PQFP. | Select when full industrial qualification and documented thermal margin are required. |
| 79RC32355-150DHG | Commercial temperature grade (0°C to +70°C); otherwise identical electrical and functional specification. | Lower-cost option for indoor, climate-controlled environments such as residential gateways. | Choose for cost-sensitive consumer deployments where ambient temperature stays within commercial range. |
Compared with 79RC32T355-150DHGI, the 79RC32355-150DHGI offers identical functionality with verified industrial qualification, while the 79RC32355-150DHG provides a commercial-grade alternative with lower procurement cost but reduced thermal operating margin - both share the same PCB footprint and firmware compatibility.
Availability
79RC32T355-150DHGI is available at Aetrix Electronics and suitable for xDSL residential gateways, SOHO routers with VoIP, carrier-grade DSLAM line cards, and cable modem edge nodes requiring stable component supply across extended product lifecycles.
Supply support for 79RC32T355-150DHGI includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Integrated Device Technology (IDT) was a fabless semiconductor company specializing in timing, memory interface, RF, and communications ICs before its acquisition by Renesas Electronics in 2019. IDT pioneered high-integration communications processors for broadband access equipment.
The 79RC32T355-150DHGI belongs to IDT's Interprise™ family of integrated communications processors, designed specifically for cost-sensitive, high-volume embedded networking applications requiring converged voice, data, and video transport in a single chip.
FAQ
What is the core architecture of the 79RC32T355-150DHGI?
The 79RC32T355-150DHGI integrates the RC32300 32-bit CPU core implementing an enhanced MIPS-II instruction set architecture with DSP extensions, prefetch instructions, and MMU support. It delivers 180 MHz pipeline performance and includes 8 KB instruction and 2 KB data caches with per-line locking - enabling real-time VoIP and routing functions without external co-processors. This architecture is central to the 79RC32T355-150DHGI's role in xDSL and SOHO gateway designs.
Does the 79RC32T355-150DHGI support USB host mode?
No, the 79RC32T355-150DHGI implements only USB 1.1 device mode with integrated transceiver - it cannot act as a USB host. Its USBDP/USBDN pins are strictly configured for peripheral operation, supporting control, interrupt, bulk, and isochronous endpoints at full speed (12 Mb/s). For host functionality, external USB host controllers or bridge ICs must be used alongside the 79RC32T355-150DHGI.
What is the maximum SDRAM capacity supported by the 79RC32T355-150DHGI?
The 79RC32T355-150DHGI supports up to 512 MB of SDRAM across two non-interleaved banks using its 32-bit data bus and 26-bit address bus. It accommodates 4-bit, 8-bit, and 16-bit wide SDRAM chips and includes automatic refresh generation and page-mode optimization - allowing efficient memory utilization in bandwidth-intensive applications like VoIP packet buffering and routing table storage within the 79RC32T355-150DHGI-based system.
Is the 79RC32T355-150DHGI pin-compatible with other RC32355 variants?
Yes, the 79RC32T355-150DHGI is pin-compatible with all RC32355 family members in the 208-pin PQFP (DH) package, including 79RC32355-150DHGI and 79RC32355-150DHG. Differences are limited to temperature grade and minor AC/DC characterization - all share identical pinout, register map, and boot behavior. This allows drop-in replacement in existing designs without PCB revision when migrating between commercial and industrial grades of the 79RC32T355-150DHGI platform.
What debug interfaces does the 79RC32T355-150DHGI provide?
The 79RC32T355-150DHGI features an Enhanced JTAG (EJTAG) interface with two operational modes: Run-Time Mode for standard boundary-scan and on-chip debugging, and Real-Time Mode providing PCST[2:0] trace pins for cycle-accurate instruction execution visibility. This dual-mode capability enables both functional validation and real-time performance analysis - essential for optimizing time-critical VoIP and ATM SAR code running on the 79RC32T355-150DHGI.
79RC32T355-150DHGI Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 208-BFQFP
- Series:
- Interprise™
- Packaging:
- Tray
- Product Status:
- Obsolete
- Core Processor:
- MIPS-II
- Number of Cores/Bus Width:
- 1 Core, 32-Bit
- Speed:
- 150MHz
- Co-Processors/DSP:
- -
- RAM Controllers:
- SDRAM
- Graphics Acceleration:
- No
- Display & Interface Controllers:
- -
- Ethernet:
- 10/100Mbps (1)
- SATA:
- -
- USB:
- USB 1.1 (1)
- Voltage - I/O:
- 2.5V, 3.3V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Security Features:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 208-PQFP (28x28)
- Additional Interfaces:
- ATM, I2C, TDM, UART
79RC32T355-150DHGI FAQ
1.How can I place an order for 79RC32T355-150DHGI through Aetrix?
Please submit a Request for Quotation (RFQ) for 79RC32T355-150DHGI on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 79RC32T355-150DHGI reliable?
The price and inventory of 79RC32T355-150DHGI are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 79RC32T355-150DHGI is usually 5 days.
3.What payment methods are accepted for 79RC32T355-150DHGI?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 79RC32T355-150DHGI transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 79RC32T355-150DHGI?
79RC32T355-150DHGI orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 79RC32T355-150DHGI order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 79RC32T355-150DHGI?
For technical support, including 79RC32T355-150DHGI datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 79RC32T355-150DHGI requirements.
6.How does Aetrix verify that 79RC32T355-150DHGI is sourced from the original manufacturer or authorized distributors?
All 79RC32T355-150DHGI products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 79RC32T355-150DHGI meets industry standards.
7.What is the process for return or replacement of 79RC32T355-150DHGI?
All 79RC32T355-150DHGI units undergo pre-shipment inspection (PSI). If there is an issue with 79RC32T355-150DHGI, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 79RC32T355-150DHGI part is unused and in its original packaging.
Return procedure for 79RC32T355-150DHGI:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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