Microchip Technology 93AA46AE48-I/SN
- Part No.:
- 93AA46AE48-I/SN
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
93AA46AE48-I/SN.pdf
- Description:
- IC EEPROM 1KBIT MICROWIRE 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:229
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Product details
Overview
93AA46AE48-I/SN from Microchip Technology Inc. is a 1 Kbit (128 × 8) low-voltage serial EEPROM with factory-programmed EUI-48™ node address, 1.8V–5.5V supply range, and industrial temperature rating (–40°C to +85°C). It uses Microwire-compatible 3-wire serial interface (CS/CLK/DI/DO), supports self-timed erase/write cycles, and delivers >200 years data retention for embedded network identity storage.
For engineers reviewing the 93AA46AE48-I/SN datasheet, 93AA46AE48-I/SN pinout, 93AA46AE48-I/SN application, or 93AA46AE48-I/SN equivalent, this device serves as a preprogrammed MAC address source for Ethernet controllers including LAN9210, LAN9211, LAN9215, LAN9217, LAN9218, LAN9220, and LAN9221 - requiring precise timing compliance, EUI-48 read sequencing, and robust write-protection logic during system boot.
Technical Context
The 93AA46AE48-I/SN implements a synchronous Microwire protocol with start-bit detection, opcode-driven instruction set (READ, WRITE, ERASE, ERAL, WRAL, EWEN/EWDS), and Ready/Busy status output via DO pin. Its internal architecture includes address decoder, mode decode logic, clock register, and output buffer - enabling sequential read, auto-erase-before-write, and automatic ERAL before WRAL.
It features dual-voltage operation: full-speed 2 MHz clock support at VCC ≥2.5V, reduced 1 MHz at 1.8V ≤ VCC < 2.5V, and guaranteed operation down to 1.8V with validated DC/AC characteristics across –40°C to +85°C. Power-on data protection and VCC voltage detect (~1.5V threshold) prevent corruption during brown-out conditions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 1 Kbit (128 words × 8 bits); sufficient for EUI-48™ address + EPI + user configuration in compact networked devices. |
| Supply Voltage | 1.8V–5.5V; enables direct interfacing with 1.8V, 2.5V, 3.3V, and 5V microcontrollers without level-shifting. |
| Interface Protocol | Microwire 3-wire serial (CS/CLK/DI/DO); compatible with legacy and low-pin-count MCU GPIO implementations. |
| Write Endurance | 1,000,000 erase/write cycles; supports frequent firmware update logging or runtime parameter storage. |
| Data Retention | >200 years at 25°C; ensures MAC address persistence over full product lifecycle without refresh. |
| Access Time | 200 ns max DO delay (TPD) at 4.5–5.5V; meets tight timing budgets in real-time Ethernet initialization sequences. |
| Operating Temp | –40°C to +85°C (Industrial grade); qualified for deployment in industrial gateways, PoE switches, and outdoor IoT nodes. |
Pinout & Package
93AA46AE48-I/SN is packaged in 8-lead SOIC (SN) with 3.90 mm body width. Pin 1 is CS; pins 6 and 7 are NC (no internal connection); VSS is pin 5; VCC is pin 8. The package complies with JEDEC MS-012 and RoHS standards.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CS | Chip Select | Active-high enable; must be held low ≥250 ns between instructions; controls Standby entry and Ready/Busy polling window. |
| CLK | Serial Clock | Synchronizes all data transfers on rising edge; stoppable mid-sequence; no clock required during self-timed write cycles. |
| DI | Data Input | Accepts Start bit, opcodes, addresses, and write data; shares signal path with DO in bus-shared configurations (requires series resistor). |
| DO | Data Output / Status | Outputs read data or Ready/Busy status (low = busy); enters High-Z when CS is low or during non-read operations. |
| VSS | Ground | Reference return for all I/O and internal circuitry; requires low-impedance connection to minimize noise coupling into EUI-48 read path. |
| VCC | Power Supply | Supplies core logic and memory array; voltage detect circuit disables writes below ~1.5V to prevent partial programming. |
| NC (pins 6,7) | No Internal Connection | Unbonded die pads; must remain unconnected per design - floating or tied to VSS/VCC may cause latch-up or ESD vulnerability. |
Key Features
| Feature | Design Value |
|---|---|
| Preprogrammed EUI-48™ Node Address | Factory-written 6-byte globally unique MAC address stored at 0x01–0x06 with EPI (0xA5 at 0x00); enables plug-and-play Ethernet controller initialization. |
| EUI-64™ Compatibility | Application-level encapsulation supported by inserting 0xFFFE between OUI and extension bytes; satisfies IPv6 link-local addressing requirements. |
| Self-Timed Erase/Write | No external timing control needed; falling edge of CS initiates auto-erase + program cycle (6 ms typical); eliminates MCU wait-state overhead. |
| Write Protection Logic | Power-up default = EWDS (Erase/Write Disable); requires explicit EWEN command before any programming - prevents accidental overwrite during power transients. |
| Ready/Busy Status Signal | DO pin doubles as status indicator during erase/write; allows polling instead of fixed delays - critical for deterministic boot-time MAC address loading. |
Applications
| Network Interface Initialization | Industrial Ethernet Device Identity |
|---|---|
|
Use Scenario: Ethernet PHY/controller (e.g., LAN9221) powers up and reads MAC address during boot sequence. IC Role / Device Role / Timing Role: Nonvolatile EUI-48™ source providing deterministic, single-cycle read access to 6-byte address at known offset (0x01–0x06). Use Value: Eliminates need for external MAC programming step; reduces BOM count and firmware complexity in production test. |
Use Scenario: Programmable logic controller (PLC) with integrated 10/100BASE-TX port requires unique node identity for Modbus TCP or EtherNet/IP. IC Role / Device Role / Timing Role: Industrial-grade persistent identity store with guaranteed –40°C to +85°C operation and >200-year retention. Use Value: Ensures long-term traceability and network uniqueness across 15+ year field deployments without recalibration or reprogramming. |
| Embedded System Configuration Storage | IoT Edge Node Provisioning |
|
Use Scenario: Smart sensor hub stores calibration coefficients, sensor IDs, and network credentials in EEPROM during manufacturing. IC Role / Device Role / Timing Role: General-purpose 1Kbit serial EEPROM supporting sequential read, page write, and ERAL/WRAL for bulk updates. Use Value: Leverages same footprint and interface as identity function - enables dual-use memory without adding discrete components. |
Use Scenario: Cellular-to-Ethernet gateway performs secure onboarding using factory-assigned EUI-48™ as cryptographic binding anchor. IC Role / Device Role / Timing Role: Root-of-trust identity source verified at boot; preprogrammed value used to derive device-specific keys in TLS handshake. Use Value: Provides cryptographically sound, tamper-resistant hardware identity - essential for zero-touch provisioning in large-scale deployments. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM with preprogrammed node identity applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 93AA46A-I/SN | No factory EUI-48™ preprogramming; blank memory array; identical electrical specs and pinout. | Requires external MAC address programming during production; unsuitable for plug-and-play Ethernet controllers. | Select only if custom identity management is implemented in host firmware and EUI-48™ compatibility is not required. |
| AT24MAC402-MAHM-T | 2-Kbit I²C EEPROM with factory-programmed EUI-48™; different interface (I²C vs Microwire); 1.7–5.5V supply. | Requires I²C-capable MCU; incompatible with Microwire-only hosts like legacy LAN92xx controllers. | Choose when I²C infrastructure exists and higher density (2 Kbit) or AEC-Q200 qualification is needed. |
Compared with 93AA46AE48-I/SN, 93AA46A-I/SN lacks factory node identity but offers identical form-factor and timing - making it a drop-in replacement only for non-MAC applications. AT24MAC402-MAHM-T provides EUI-48™ but mandates I²C interface redesign and does not support the LAN92xx auto-detection sequence.
Availability
93AA46AE48-I/SN is available at Aetrix Electronics and suitable for industrial Ethernet gateways, embedded network controllers, and IoT edge nodes requiring stable component supply with guaranteed long-term availability and traceable sourcing.
Supply support for 93AA46AE48-I/SN includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology Inc. is a leading provider of microcontroller, analog, FPGA, and memory solutions, headquartered in Chandler, Arizona, with global design and manufacturing operations.
The 93AA46AE48 belongs to Microchip's serial EEPROM product line, designed specifically for reliable, low-power nonvolatile storage of network identity and configuration data in resource-constrained embedded systems.
FAQ
What is the factory-programmed content of the 93AA46AE48-I/SN?
The 93AA46AE48-I/SN contains a globally unique 48-bit EUI-48™ node address prewritten to memory locations 0x01–0x06, preceded by an EEPROM Programmed Indicator (EPI) value of 0xA5 at location 0x00. This enables immediate MAC address retrieval by compatible Ethernet controllers such as LAN9210 through LAN9221 without host-side programming.
Does the 93AA46AE48-I/SN support I²C or SPI interfaces?
No, the 93AA46AE48-I/SN uses a Microwire-compatible 3-wire serial interface (CS, CLK, DI, DO) and is not electrically or logically compatible with I²C or SPI protocols. It requires a master capable of generating Microwire timing - such as dedicated Ethernet controllers or MCUs with configurable GPIO-based bit-banging.
Can the preprogrammed EUI-48™ address in the 93AA46AE48-I/SN be overwritten?
Yes, the EUI-48™ address and EPI at locations 0x00–0x06 are fully writable by the host system using standard WRITE and ERASE instructions. However, doing so invalidates the factory-assigned globally unique identity and requires careful handling to avoid accidental corruption during system updates.
What is the minimum VCC voltage required for reliable operation of the 93AA46AE48-I/SN?
The 93AA46AE48-I/SN operates reliably from 1.8V to 5.5V. Below ~1.5V, the internal voltage detect circuit disables all write operations to prevent data corruption; read functionality may become unstable. For guaranteed specification compliance across temperature, VCC must be maintained within the 1.8V–5.5V range.
How does the Ready/Busy status work on the DO pin of the 93AA46AE48-I/SN?
During erase or write cycles, the DO pin outputs Ready/Busy status: logic low indicates ongoing programming, logic high indicates completion. To sample status, CS must be brought high for ≥250 ns after TCSL, then read on the next CLK rising edge. DO returns to High-Z when CS is low or during non-status phases.
93AA46AE48-I/SN Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 1Kbit
- Memory Organization:
- 128 x 8
- Memory Interface:
- Microwire
- Clock Frequency:
- 2 MHz
- Write Cycle Time - Word, Page:
- 6ms
- Access Time:
- -
- Voltage - Supply:
- 1.8V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
93AA46AE48-I/SN FAQ
1.How can I place an order for 93AA46AE48-I/SN through Aetrix?
Please submit a Request for Quotation (RFQ) for 93AA46AE48-I/SN on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 93AA46AE48-I/SN reliable?
The price and inventory of 93AA46AE48-I/SN are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 93AA46AE48-I/SN is usually 5 days.
3.What payment methods are accepted for 93AA46AE48-I/SN?
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93AA46AE48-I/SN orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 93AA46AE48-I/SN order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 93AA46AE48-I/SN?
For technical support, including 93AA46AE48-I/SN datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 93AA46AE48-I/SN requirements.
6.How does Aetrix verify that 93AA46AE48-I/SN is sourced from the original manufacturer or authorized distributors?
All 93AA46AE48-I/SN products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 93AA46AE48-I/SN meets industry standards.
7.What is the process for return or replacement of 93AA46AE48-I/SN?
All 93AA46AE48-I/SN units undergo pre-shipment inspection (PSI). If there is an issue with 93AA46AE48-I/SN, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 93AA46AE48-I/SN part is unused and in its original packaging.
Return procedure for 93AA46AE48-I/SN:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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