Microchip Technology 93AA46AE48T-I/SN
- Part No.:
- 93AA46AE48T-I/SN
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
93AA46AE48T-I/SN.pdf
- Description:
- IC EEPROM 1KBIT MICROWIRE 8SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
93AA46AE48T-I/SN from Microchip Technology is a 1 Kbit (128 × 8) low-voltage serial EEPROM with factory-programmed EUI-48™ node address, 1.8V–5.5V supply range, and industrial temperature rating (−40°C to +85°C). It implements Microwire-compatible 3-wire serial interface (CS/CLK/DI/DO), supports self-timed erase/write cycles, and delivers >200 years data retention for embedded network identity storage.
For engineers reviewing the 93AA46AE48T-I/SN datasheet, 93AA46AE48T-I/SN pinout, 93AA46AE48T-I/SN application, or 93AA46AE48T-I/SN equivalent, key selection criteria include preprogrammed MAC address compatibility with LAN92xx Ethernet controllers, 1 million erase/write endurance, Ready/Busy status signaling via DO, and dual-package availability in SOIC-8 (SN) and SOT-23-6 (OT).
Technical Context
This device operates as a Microwire-compatible serial EEPROM with synchronous 3-wire interface (CS, CLK, DI, DO), where instructions are clocked on rising CLK edges and DO provides both read data and Ready/Busy status. It features automatic erase-before-write, ERAL/WRAL bulk operations, and EWEN/EWDS write-protection logic.
The 48-bit EUI-48 node address is factory-programmed at memory addresses 0x01–0x06, preceded by EEPROM Programmed Indicator (EPI = 0xA5) at 0x00. It is explicitly validated for use with SMSC LAN9210, LAN9211, LAN9215, LAN9217, LAN9218, LAN9220, and LAN9221 Ethernet controllers during boot-time MAC loading.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory size | 1 Kbit (128 × 8-bit organization); sufficient for MAC address + configuration metadata in compact networked devices. |
| Interface | Microwire-compatible 3-wire serial (CS/CLK/DI/DO); requires no additional protocol translation for legacy SMSC LAN92xx host controllers. |
| VCC range | 1.8 V to 5.5 V; enables direct integration into 1.8 V, 2.5 V, 3.3 V, and 5 V systems without level-shifting. |
| Endurance | 1,000,000 erase/write cycles; supports frequent firmware update logging or runtime parameter storage in industrial gateways. |
| Data retention | >200 years at +25°C; ensures MAC identity persistence across product lifetime without refresh. |
| Temperature range | Industrial: −40°C to +85°C; qualified for deployment in outdoor networking equipment and factory automation nodes. |
| Node address | Factory-programmed EUI-48™ (OUI + extension) at 0x01–0x06; eliminates need for external MAC provisioning in Ethernet-enabled designs. |
Pinout & Package
93AA46AE48T-I/SN is packaged in 8-lead SOIC (SN) per Microchip drawing C04-057-SN. Pin functions are electrically identical across SOIC and SOT-23 variants, with NC pins present only in SOIC.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CS | Chip Select | Active-high enable; must be held low ≥250 ns between instructions; controls Standby entry and Ready/Busy polling window. |
| CLK | Serial Clock | Synchronizes all data transfers on rising edge; supports variable clock rate (1–2 MHz) depending on VCC; may be paused mid-transfer. |
| DI | Data Input | Accepts Start bit, opcodes, addresses, and write data; shares signal path with DO in bus-shared configurations (requires current-limiting resistor). |
| DO | Data Output / Status | Outputs read data or Ready/Busy status (low = busy); enters High-Z when CS is low or during non-read operations. |
| VSS | Ground | Reference for all I/O and internal logic; must be connected before VCC during power-up to ensure POR behavior. |
| VCC | Power Supply | 1.8–5.5 V operation; internal voltage detect (VPOR = 1.5 V typical) prevents spurious writes during brown-out. |
| NC (SOIC pins 6,7) | No Internal Connection | Unbonded pads; must remain unconnected; not usable as GPIO or test points. |
Key Features
| Feature | Design Value |
|---|---|
| EUI-48™ node address | Globally unique 48-bit MAC preprogrammed at 0x01–0x06 with EPI (0xA5) at 0x00; directly loadable by LAN92xx Ethernet controllers at boot. |
| Self-timed erase/write | No external timing control needed; falling edge of CS initiates auto-erase + programming; TWC = 6 ms max (VCC ≥4.5 V). |
| Write protection | Power-on default is EWDS (erase/write disabled); explicit EWEN required before any program command; EWDS recommended post-write. |
| Ready/Busy signaling | DO pin doubles as status indicator during erase/write; avoids need for timeout-based polling in host firmware. |
| Low-power operation | Standby current ≤1 µA; read current ≤100 µA at 2.5 V/2 MHz; suitable for battery-backed or energy-harvested edge nodes. |
Applications
| Industrial Ethernet Node Identity | Embedded Controller Configuration Storage |
|---|---|
|
Use Scenario: Assigning persistent, globally unique MAC addresses to industrial gateways, PLCs, and field I/O modules with LAN92xx Ethernet PHYs. IC Role / Device Role / Timing Role: Factory-programmed EUI-48™ source for boot-time MAC initialization; accessed once per power cycle via Microwire READ. Use Value: Eliminates manual MAC assignment and reduces BOM count by replacing discrete MAC PROM + glue logic with single-pin-compatible component. |
Use Scenario: Storing calibration coefficients, device serial numbers, and network settings in medical sensors and portable diagnostic instruments. IC Role / Device Role / Timing Role: Nonvolatile configuration register bank; accessed infrequently but requiring guaranteed retention over 10+ year service life. Use Value: >200-year data retention and 1M endurance ensure reliability across repeated field updates without wear leveling overhead. |
| Legacy System MAC Upgrade | Low-Power IoT Edge Node Identity |
|
Use Scenario: Retrofitting older Ethernet-enabled equipment (e.g., building HVAC controllers) with IEEE-compliant MAC addressing without PCB redesign. IC Role / Device Role / Timing Role: Drop-in replacement for obsolete 93LC46 or similar Microwire EEPROMs; retains same pinout and instruction set. Use Value: Direct compatibility with existing Microwire host drivers and identical SOIC-8 footprint enables zero-layout-change upgrade path. |
Use Scenario: Providing secure, tamper-resistant node identity in battery-powered wireless sensor nodes using Sub-GHz or BLE connectivity. IC Role / Device Role / Timing Role: Low-quiescent-current identity store; powered only during boot or OTA update; supports 1.8 V operation for extended battery life. Use Value: 1.8 V minimum VCC and ≤1 µA standby current extend coin-cell or energy-harvesting runtime while preserving EUI-48™ uniqueness. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM with MAC identity applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 93AA46C-E/MS | Same 128×8 organization and EUI-48™ preprogramming, but in 8-lead MSOP package; lacks SOT-23 option; identical electrical specs. | Preferred where board space is constrained but MSOP footprint is acceptable; not suitable for SOT-23-restricted layouts. | Select 93AA46C-E/MS if MSOP thermal performance or reflow profile is preferred over SOIC/SOT-23. |
| AT24MAC402-MAHM-T | 1-Kbit I²C EEPROM with factory-programmed EUI-48™; different interface (2-wire I²C vs. 3-wire Microwire); 1.7–5.5 V VCC; same endurance and retention. | Requires I²C host support instead of Microwire; incompatible with LAN92xx boot ROM; needs pull-up resistors and ACK handling. | Choose AT24MAC402-MAHM-T only when migrating to I²C-based platforms or when Microwire peripherals are unavailable. |
Compared with 93AA46AE48T-I/SN, 93AA46C-E/MS offers identical functionality in a smaller MSOP package but no SOT-23 variant, while AT24MAC402-MAHM-T shifts interface architecture to I²C-requiring firmware and schematic changes but enabling multi-drop bus topology.
Availability
93AA46AE48T-I/SN is available at Aetrix Electronics and suitable for industrial Ethernet node identity, embedded controller configuration storage, legacy system MAC upgrades, and low-power IoT edge node identity requiring stable component supply and long-term lifecycle assurance.
Supply support for 93AA46AE48T-I/SN includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology Inc. is a leading provider of microcontrollers, analog components, and memory solutions, headquartered in Chandler, Arizona, with global design and manufacturing operations.
The 93AA46AE48 series belongs to Microchip's Microwire EEPROM product line, designed specifically for reliable, low-power nonvolatile storage of network identity data and configuration parameters in resource-constrained embedded systems.
FAQ
What is the factory-programmed EUI-48™ address format used in 93AA46AE48T-I/SN?
The 93AA46AE48T-I/SN contains a globally unique 48-bit EUI-48™ node address stored at memory locations 0x01 through 0x06. It begins with a 24-bit Organizationally Unique Identifier (OUI) assigned by IEEE to Microchip, followed by a 24-bit Extension Identifier generated to ensure uniqueness. The EEPROM Programmed Indicator (EPI = 0xA5) resides at address 0x00 to validate factory programming. This structure is directly recognized by LAN92xx Ethernet controllers during boot.
Does 93AA46AE48T-I/SN support both SOIC and SOT-23 packages, and how do their pinouts differ?
Yes - 93AA46AE48T-I/SN is offered in both 8-lead SOIC (SN) and 6-lead SOT-23 (OT) packages. The SOIC version has NC pins at positions 6 and 7; the SOT-23 version omits them entirely. Pin mapping is functionally identical: CS (SOIC-1 / SOT-23-5), CLK (SOIC-2 / SOT-23-4), DI (SOIC-3 / SOT-23-3), DO (SOIC-4 / SOT-23-1), VSS (SOIC-5 / SOT-23-2), and VCC (SOIC-8 / SOT-23-6). No re-design is needed when switching between packages beyond footprint adaptation.
How does the Ready/Busy status signaling work on 93AA46AE48T-I/SN?
The DO pin of 93AA46AE48T-I/SN serves dual purpose: it outputs read data during READ operations and indicates Ready/Busy status during erase/write cycles. After initiating ERASE, WRITE, ERAL, or WRAL, the host must bring CS high for ≥250 ns (TCSL), then sample DO - low indicates ongoing operation, high confirms completion. DO returns to High-Z when CS is low or after status is cleared via Start-bit + CS low sequence.
What write protection mechanisms are implemented in 93AA46AE48T-I/SN?
93AA46AE48T-I/SN powers up in Erase/Write Disable (EWDS) mode, blocking all program commands until an explicit Erase/Write Enable (EWEN) instruction is issued. Once enabled, programming remains active until EWDS is executed or VCC is removed. This prevents accidental overwrites during power transitions or noise events. Microchip recommends issuing EWDS immediately after each successful write operation as a robust safeguard.
Is 93AA46AE48T-I/SN compatible with LAN9221 Ethernet controllers, and what interface requirements must be met?
Yes - 93AA46AE48T-I/SN is explicitly validated for use with LAN9221 (and LAN9210/9211/9215/9217/9218/9220) Ethernet controllers. Compatibility requires Microwire 3-wire interface connection (CS/CLK/DI/DO), proper VCC supply (1.8–5.5 V), and correct memory map access: LAN92xx controllers automatically read the EUI-48™ address from 0x01–0x06 upon reset, relying on the EPI (0xA5 at 0x00) to confirm valid programming.
93AA46AE48T-I/SN Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 1Kbit
- Memory Organization:
- 128 x 8
- Memory Interface:
- Microwire
- Clock Frequency:
- 2 MHz
- Write Cycle Time - Word, Page:
- 6ms
- Access Time:
- -
- Voltage - Supply:
- 1.8V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
93AA46AE48T-I/SN FAQ
1.How can I place an order for 93AA46AE48T-I/SN through Aetrix?
Please submit a Request for Quotation (RFQ) for 93AA46AE48T-I/SN on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 93AA46AE48T-I/SN reliable?
The price and inventory of 93AA46AE48T-I/SN are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 93AA46AE48T-I/SN is usually 5 days.
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Once your 93AA46AE48T-I/SN order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 93AA46AE48T-I/SN?
For technical support, including 93AA46AE48T-I/SN datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 93AA46AE48T-I/SN requirements.
6.How does Aetrix verify that 93AA46AE48T-I/SN is sourced from the original manufacturer or authorized distributors?
All 93AA46AE48T-I/SN products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 93AA46AE48T-I/SN meets industry standards.
7.What is the process for return or replacement of 93AA46AE48T-I/SN?
All 93AA46AE48T-I/SN units undergo pre-shipment inspection (PSI). If there is an issue with 93AA46AE48T-I/SN, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 93AA46AE48T-I/SN part is unused and in its original packaging.
Return procedure for 93AA46AE48T-I/SN:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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