Microchip Technology 93AA46AT-I/SN
- Part No.:
- 93AA46AT-I/SN
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
93AA46AT-I/SN.pdf
- Description:
- IC EEPROM 1KBIT MICROWIRE 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:3,454
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
93AA46AT-I/SN from Microchip Technology Inc. is a 1K-bit (128 × 8) low-voltage serial EEPROM with Microwire-compatible 3-wire interface, 1.8–5.5 V supply range, and industrial temperature rating (–40°C to +85°C). It features self-timed erase/write cycles, automatic erase-all-before-write-all (ERAL/WRAL), and Ready/Busy status signaling via DO pin. Used for configuration storage in embedded controllers, sensor calibration data retention, and boot code parameter backup.
For engineers reviewing the 93AA46AT-I/SN datasheet, 93AA46AT-I/SN pinout, 93AA46AT-I/SN application, or 93AA46AT-I/SN equivalent, key selection criteria include its dedicated 8-bit organization (no ORG pin required), 1 million erase/write endurance, >200-year data retention, and SOIC-8 package compatibility with legacy PCB footprints.
Technical Context
This device implements a synchronous serial Microwire protocol with CS/CLK/DI/DO signals and no internal address counter reset on CS deassertion-enabling true sequential read across all 128 bytes. Its internal logic enforces power-on write protection below 1.5 V and requires explicit EWEN command before any erase or write operation.
The 93AA46AT-I/SN uses CMOS floating-gate technology with auto-erase prior to write, eliminating need for separate erase commands in most applications. All timing-including TWC (6 ms max write cycle), TPD (400 ns max output delay at 1.8 V), and TCSL (250 ns min CS low time)-is fully specified across the full 1.8–5.5 V VCC range and industrial temperature grade.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory size | 1 Kbit (128 words × 8 bits); fixed x8 organization eliminates external ORG pin routing and simplifies firmware interface. |
| VCC range | 1.8 V to 5.5 V; supports direct connection to 1.8 V, 2.5 V, 3.3 V, and 5 V rails without level shifters. |
| Endurance | 1,000,000 erase/write cycles; enables reliable logging in field-upgradeable devices with frequent parameter updates. |
| Data retention | Greater than 200 years at +85°C; suitable for long-lifecycle industrial equipment where data must survive decades of storage. |
| Write cycle time | 6 ms maximum (TWC); deterministic timing allows precise host CPU scheduling without polling overhead. |
| Interface | Microwire-compatible 3-wire serial (CS, CLK, DI, DO); interoperable with legacy microcontrollers lacking SPI hardware but supporting bit-banged protocols. |
| Temperature grade | Industrial (–40°C to +85°C); qualified for use in motor drives, HVAC controls, and factory automation systems. |
Pinout & Package
8-pin SOIC (SN) package with standard 150-mil body width and 1.27 mm pitch; RoHS-compliant matte tin finish; pin 1 marked by laser dot or notch.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 CS | Chip Select | Active-high enable; must be held low ≥250 ns between instructions; initiates self-timed write on falling edge for 93AA versions. |
| 2 CLK | Serial Clock | Synchronizes all data transfers; rising edge clocks in opcode/address/data; stoppable at any point without corruption. |
| 3 DI | Data Input | Accepts Start bit, opcodes (e.g., 01 for WRITE), 7-bit address, and 8-bit data; high-impedance when not selected. |
| 4 DO | Data Output / Status | Outputs read data or Ready/Busy status (low = busy); enters High-Z on CS falling edge; requires external pull-up for status polling. |
| 5 VSS | Ground | Reference return path for all I/O and internal circuitry; must be low-inductance connection for noise immunity. |
| 6 NC | No Connect | Internally unconnected; must be left floating or tied to VSS per layout best practice-no functional role. |
| 7 NC | No Connect | Same as pin 6; dual NC pins accommodate family pinout compatibility across A/B/C variants. |
| 8 VCC | Power Supply | Supplies core logic and memory array; includes internal POR detection at 1.5 V threshold to block writes during brownout. |
Key Features
| Feature | Design Value |
|---|---|
| Self-timed erase/write | Eliminates need for external timing control or timeout loops-host only waits for DO high or polls status after TWC delay. |
| Automatic ERAL before WRAL | Ensures full-array write success without separate erase command; reduces firmware complexity and flash wear management overhead. |
| Power-on/off data protection | Hardware lockout below 1.5 V VCC prevents partial writes during power ramp-up/down-critical for battery-backed systems. |
| Ready/Busy status on DO | Enables non-blocking host operation: CPU can perform other tasks while checking DO level instead of fixed delays. |
| 128 × 8 fixed organization | Removes ORG pin dependency and associated PCB routing; simplifies schematic capture and eliminates configuration errors. |
Applications
| Industrial Sensor Calibration | Embedded Controller Configuration |
|---|---|
|
Use Scenario: Storing factory-trimmed ADC offset/gain coefficients and temperature compensation tables in pressure transmitters. IC Role / Device Role / Timing Role: Nonvolatile parameter store accessed at power-up; read-only during normal operation; write-enabled only during calibration mode. Use Value: Enables single-pass calibration with permanent storage-eliminates need for external programming fixtures or rework after soldering. |
Use Scenario: Holding user-configurable settings (baud rate, I/O mapping, alarm thresholds) in programmable logic controllers (PLCs). IC Role / Device Role / Timing Role: System configuration register bank; updated via HMI or serial command; retains values across power cycles. Use Value: Supports field customization without firmware reflashing-reduces service downtime and version control complexity. |
| Motor Drive Boot Parameters | Medical Device Safety Logs |
|
Use Scenario: Saving startup torque profiles and current limit presets in brushless DC motor drivers used in HVAC blowers. IC Role / Device Role / Timing Role: Critical boot-time memory; read during initialization sequence before PWM generation begins. Use Value: Guarantees consistent motor behavior across power cycles-even after firmware updates that do not alter stored parameters. |
Use Scenario: Recording last-known fault codes and operational hours in portable infusion pumps for regulatory audit trails. IC Role / Device Role / Timing Role: Tamper-resistant event logger; written only during fault detection or shutdown sequences. Use Value: Meets IEC 62304 traceability requirements with >200-year retention-no battery backup needed for long-term log integrity. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 93LC46A-I/SN | Same 128 × 8 organization and SOIC-8 package, but 2.5–5.5 V VCC range (no 1.8 V support). | Not suitable for 1.8 V systems; otherwise identical instruction set and timing. | Select if system VCC ≥2.5 V and cost sensitivity outweighs ultra-low-voltage capability. |
| AT25010B-SSHL-T | SPI interface (4-wire), 1.8–5.5 V, same 1 Kbit density, but lacks ERAL/WRAL and has 5 ms write cycle. | Requires SPI-capable MCU; no Microwire compatibility; no automatic erase-all-before-write-all function. | Choose when migrating to SPI-based platforms or when leveraging Atmel's enhanced write-protection features. |
Compared with 93LC46A-I/SN, the 93AA46AT-I/SN extends low-voltage operation to 1.8 V while retaining identical pinout and firmware compatibility; versus AT25010B-SSHL-T, it preserves Microwire legacy support and adds deterministic ERAL/WRAL functionality critical for robust parameter initialization.
Availability
93AA46AT-I/SN is available at Aetrix Electronics and suitable for industrial sensor calibration, embedded controller configuration, and motor drive boot parameter storage requiring stable component supply across multi-year production cycles.
Supply support for 93AA46AT-I/SN includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology Inc. is a leading provider of microcontroller, analog, and Flash-IP solutions, headquartered in Chandler, Arizona, with global design and manufacturing operations.
The 93XX46 series was designed specifically for cost-sensitive, low-power nonvolatile memory applications in industrial and automotive systems-emphasizing reliability, wide VCC tolerance, and Microwire interoperability.
FAQ
What is the memory organization of the 93AA46AT-I/SN?
The 93AA46AT-I/SN is a fixed 128 × 8-bit (1 Kbit) EEPROM with no ORG pin-unlike C-variants, it does not support x16 mode. This eliminates external configuration logic and ensures deterministic 8-bit data framing in all applications. Its architecture delivers consistent 8-bit reads/writes without software mode switching.
Does the 93AA46AT-I/SN require an external pull-up resistor on the DO pin?
Yes, the 93AA46AT-I/SN DO pin is open-drain and requires an external pull-up resistor (typically 4.7 kΩ to VCC) to assert logic high during Ready/Busy status polling or data output. Without it, DO remains indeterminate during status checks, risking incorrect busy-state interpretation and premature command execution.
How does the 93AA46AT-I/SN handle power loss during a write cycle?
The 93AA46AT-I/SN incorporates hardware power-loss protection: its internal POR circuit blocks write operations when VCC drops below 1.5 V, preventing partial writes or memory corruption. Combined with auto-erase-before-write, this ensures data integrity even during abrupt brownouts common in industrial power environments.
Can the 93AA46AT-I/SN be used with a microcontroller that only supports SPI?
No-the 93AA46AT-I/SN uses a Microwire-compatible 3-wire interface (CS/CLK/DI/DO), not SPI. While both are synchronous serial protocols, Microwire lacks MOSI/MISO separation and uses bidirectional DO. Direct SPI hardware cannot drive it without bit-banged GPIO emulation matching Microwire timing (e.g., TCKH ≥200 ns at 1.8 V).
What is the minimum CS low time required between commands on the 93AA46AT-I/SN?
The 93AA46AT-I/SN requires a minimum Chip Select low time (TCSL) of 250 ns between consecutive instructions, regardless of VCC voltage. This ensures internal state machine reset and prevents command overlap or misinterpretation-critical for reliable operation in noisy industrial environments with fast clock edges.
93AA46AT-I/SN Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 1Kbit
- Memory Organization:
- 128 x 8
- Memory Interface:
- Microwire
- Clock Frequency:
- 2 MHz
- Write Cycle Time - Word, Page:
- 6ms
- Access Time:
- -
- Voltage - Supply:
- 1.8V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
93AA46AT-I/SN FAQ
1.How can I place an order for 93AA46AT-I/SN through Aetrix?
Please submit a Request for Quotation (RFQ) for 93AA46AT-I/SN on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 93AA46AT-I/SN reliable?
The price and inventory of 93AA46AT-I/SN are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 93AA46AT-I/SN is usually 5 days.
3.What payment methods are accepted for 93AA46AT-I/SN?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 93AA46AT-I/SN transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 93AA46AT-I/SN?
93AA46AT-I/SN orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 93AA46AT-I/SN order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 93AA46AT-I/SN?
For technical support, including 93AA46AT-I/SN datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 93AA46AT-I/SN requirements.
6.How does Aetrix verify that 93AA46AT-I/SN is sourced from the original manufacturer or authorized distributors?
All 93AA46AT-I/SN products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 93AA46AT-I/SN meets industry standards.
7.What is the process for return or replacement of 93AA46AT-I/SN?
All 93AA46AT-I/SN units undergo pre-shipment inspection (PSI). If there is an issue with 93AA46AT-I/SN, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 93AA46AT-I/SN part is unused and in its original packaging.
Return procedure for 93AA46AT-I/SN:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
93AA46AT-I/SN Tags

-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology

-
AT21CS01-STUM10-T
Microchip Technology

-
AT24C02C-SSHM-T
Microchip Technology

-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics

-
AT24CS02-SSHM-T
Microchip Technology

-
93LC46BT-I/OT
Microchip Technology

-
AT24C04C-SSHM-T
Microchip Technology

-
24LC01BT-I/SN
Microchip Technology

-
24AA02UIDT-I/OT
Microchip Technology

-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
