Microchip Technology 93AA66AT-I/OT
- Part No.:
- 93AA66AT-I/OT
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- SOT-23-6
- Datasheet:
-
93AA66AT-I/OT.pdf
- Description:
- IC EEPROM 4KBIT MIC WIRE SOT23-6
- Quantity:
- Payment:

- Shipping:

Inventory:16,798
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Product details
Overview
93AA66AT-I/OT from Microchip Technology Inc. is a 4 Kbit low-voltage serial EEPROM with 512 × 8-bit organization, designed for nonvolatile data storage in space-constrained embedded systems. It operates across 1.8–5.5 V, supports Microwire-compatible 3-wire serial interface (CS/CLK/DI/DO), and delivers 1 million erase/write cycles with >200-year data retention. Used in industrial sensor calibration, power supply configuration, and microcontroller boot parameter storage.
For engineers reviewing the 93AA66AT-I/OT datasheet, 93AA66AT-I/OT pinout, 93AA66AT-I/OT application, or 93AA66AT-I/OT equivalent, key selection criteria include its SOT-23-6 package, industrial temperature range (−40°C to +85°C), self-timed write/erase, Ready/Busy status signaling, and ORG pin absence - confirming fixed 8-bit word width and compatibility with legacy Microwire controllers requiring no configuration logic.
Technical Context
The 93AA66AT-I/OT implements a synchronous serial interface with start-bit detection, opcode-driven command set (READ/WRITE/ERASE/ERAL/WRAL/EWEN/EWDS), and hardware-based power-on data protection. Its internal architecture includes an address decoder, mode decode logic, and output buffer, with DO serving dual roles: serial data output during READ and Ready/Busy status indicator during programming.
It uses CMOS EEPROM cell technology with auto-erase-before-write and automatic ERAL before WRAL. The device powers up in EWDS mode, requiring explicit EWEN before any erase/write, and features voltage-detect circuitry that inhibits all operations below 1.5 V - ensuring robustness against brown-out conditions in battery-powered or low-voltage systems.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory size | 4 Kbit (512 × 8-bit) - fixed x8 organization; no ORG pin; eliminates external configuration logic. |
| VCC range | 1.8 V to 5.5 V - supports single-supply operation across 1.8 V microcontrollers and 5 V legacy systems. |
| Interface | Microwire-compatible 3-wire serial (CS/CLK/DI/DO) - interoperable with standard Microwire masters without protocol translation. |
| Write endurance | 1,000,000 cycles - enables frequent parameter updates in field-upgradable firmware or runtime calibration tables. |
| Data retention | >200 years at 25°C - ensures long-term reliability in unattended industrial equipment and infrastructure nodes. |
| Operating temp | −40°C to +85°C (Industrial grade) - qualified for deployment in factory automation, motor drives, and outdoor metering. |
| Max clock frequency | 3 MHz at VCC ≥ 4.5 V - enables fast bulk reads/writes while maintaining timing margins in noisy environments. |
| Standby current | 1 µA typical - minimizes quiescent power in battery-backed or energy-harvesting applications. |
Pinout & Package
Package: SOT-23-6 (lead-free, matte tin finish), footprint-optimized for high-density PCB layouts and automated assembly. Dimensions: 2.9 mm × 1.6 mm × 1.1 mm (JEDEC MO-178).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1: DO | Data Output / Ready-Busy Status | Tri-state output delivering read data or active-low busy signal; requires pull-up for proper status polling. |
| 2: VSS | Ground Reference | Primary return path for all I/O and core logic; must be low-impedance to minimize noise coupling into serial interface. |
| 3: DI | Data Input | Serial input for opcodes, addresses, and write data; sampled on rising CLK edge; tolerant of bus-sharing with DO via series resistor. |
| 4: VCC | Power Supply | Single supply input (1.8–5.5 V); internal POR circuit disables writes below 1.5 V to prevent corruption during power ramp. |
| 5: CS | Chip Select | Active-high enable; minimum 250 ns low time required between commands; falling edge initiates self-timed write/erase on AA/LC devices. |
| 6: CLK | Serial Clock | Synchronizes all data transfers; rising edge clocks in DI and clocks out DO; stoppable mid-sequence for master flexibility. |
Key Features
| Feature | Design Value |
|---|---|
| Self-timed erase/write cycles | Eliminates need for external timing control or software delays - TWC = 6 ms max (AA/LC), enabling deterministic firmware execution. |
| Automatic ERAL before WRAL | Guarantees full-array readiness prior to bulk write, preventing partial writes and simplifying host firmware logic. |
| Power-on/off data protection | Hardware lockout below 1.5 V prevents inadvertent writes during power transitions - critical for fail-safe system initialization. |
| Ready/Busy status on DO | Enables efficient polling instead of fixed delays; DO = low = busy, DO = high = ready - reduces CPU overhead and improves real-time responsiveness. |
| Industry-standard 3-wire interface | Direct drop-in replacement for legacy Microwire EEPROMs (e.g., 93C46, 93LC46) without driver layer changes or pin remapping. |
| 1 µA standby current | Supports ultra-low-power sleep modes in portable instrumentation and wireless sensor nodes without sacrificing nonvolatile storage. |
Applications
| Industrial Sensor Calibration | Microcontroller Boot Configuration |
|---|---|
Use Scenario: Storing factory-trimmed offset/gain coefficients and linearization tables for analog sensor front-ends in PLC I/O modules. IC Role / Device Role / Timing Role: Nonvolatile parameter store accessed during power-up; 8-bit word width matches ADC register alignment and MCU byte-oriented fetch. Use Value: Enables plug-and-play sensor replacement without reprogramming; 1M endurance supports recalibration over product lifetime. | Use Scenario: Holding bootloader configuration flags (e.g., UART baud rate, flash update mode, watchdog timeout) in resource-constrained 8-bit MCUs. IC Role / Device Role / Timing Role: Early-boot configuration source; accessed before main firmware initializes peripherals - requires guaranteed read timing and voltage immunity. Use Value: Decouples hardware revision from firmware build; allows field updates to boot behavior without reflashing main program memory. |
| Power Supply Trim Storage | Smart Meter Parameter Retention |
Use Scenario: Saving digitally trimmed DAC codes for precision voltage/current regulation in AC-DC and DC-DC converters. IC Role / Device Role / Timing Role: Write-once-at-factory or infrequent-field-adjustment storage; accessed only during power-up or service mode. Use Value: Replaces mechanical potentiometers and laser trimming; supports remote recalibration via service interface with verified write protection (EWEN/EWDS). | Use Scenario: Retaining tariff schedules, billing counters, and tamper-event logs in ANSI C12.22-compliant electricity meters operating 20+ years unattended. IC Role / Device Role / Timing Role: Long-term data archive with guaranteed integrity; accessed asynchronously by metrology ASIC and host processor. Use Value: >200-year data retention and 1M endurance meet ANSI/IEEE longevity requirements; SOT-23-6 footprint fits tight meter PCB constraints. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 93LC66AT-I/OT | VCC range 2.5–5.5 V; same 512×8 organization and SOT-23-6 package; lacks 1.8 V support. | Not suitable for 1.8 V systems; otherwise functionally identical in timing, instruction set, and pinout. | Select when system VCC ≥ 2.5 V and lower-quiescent-current variants are not required. |
| AT25040B-MAU-T | 4 Kbit SPI interface (4-wire), 1.8–5.5 V, 20 MHz max clock; different command set and no Ready/Busy pin. | Requires SPI master instead of Microwire; no hardware status polling - relies on fixed delays or software timeouts. | Choose for higher-speed access or SPI-native designs; avoid if Microwire compatibility or DO-based polling is mandatory. |
Compared with 93LC66AT-I/OT, the 93AA66AT-I/OT extends low-voltage operation to 1.8 V while retaining identical packaging and instruction compatibility; versus AT25040B-MAU-T, it offers deterministic status feedback and legacy Microwire support but at lower maximum throughput.
Availability
93AA66AT-I/OT is available at Aetrix Electronics and suitable for industrial sensor calibration, microcontroller boot configuration, and power supply trim storage requiring stable component supply, long-lifecycle assurance, and RoHS-compliant packaging.
Supply support for 93AA66AT-I/OT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology Inc. is a leading provider of microcontrollers, analog components, and memory solutions, headquartered in Chandler, Arizona, with global design and manufacturing operations.
The 93AA66A/B/C family was engineered for cost-sensitive, low-power embedded systems needing reliable serial EEPROM in miniature packages - emphasizing voltage flexibility, data integrity, and seamless integration with 8-bit microcontrollers.
FAQ
What is the memory organization of the 93AA66AT-I/OT?
The 93AA66AT-I/OT has a fixed 512 × 8-bit (4 Kbit) organization. Unlike 'C' variants, it lacks an ORG pin and is therefore dedicated to 8-bit word access - eliminating external configuration logic and ensuring compatibility with legacy Microwire controllers expecting x8 data width.
Does the 93AA66AT-I/OT support 1.8 V operation?
Yes, the 93AA66AT-I/OT supports a VCC range of 1.8 V to 5.5 V. This makes it suitable for modern ultra-low-power systems powered by single-cell Li-ion or coin-cell batteries, where 93LC66AT-I/OT (2.5–5.5 V) would be incompatible.
How does the Ready/Busy status work on the 93AA66AT-I/OT?
The DO pin serves dual functions: data output during READ and Ready/Busy status during programming. When CS is brought high after ≥250 ns low time, DO = low indicates ongoing erase/write; DO = high signals completion. Issuing a Start bit then lowering CS clears the status flag.
What is the purpose of the EWEN and EWDS instructions in the 93AA66AT-I/OT?
The 93AA66AT-I/OT powers up in EWDS (Erase/Write Disable) mode. EWEN must be issued before any ERASE or WRITE; EWDS re-enables write protection afterward. This two-step mechanism prevents accidental overwrites during noise events or power glitches - a critical safeguard in industrial environments.
Is the 93AA66AT-I/OT pin-compatible with other 93XX66 series devices in SOT-23-6?
Yes - the 93AA66AT-I/OT shares identical SOT-23-6 pinout (DO/VSS/DI/VCC/CS/CLK) with 93LC66AT-I/OT and 93C66AT-I/OT. However, voltage ranges and endurance profiles differ: 93AA supports 1.8 V, 93LC starts at 2.5 V, and 93C requires ≥4.5 V for ERAL/WRAL - verify VCC compliance before substitution.
93AA66AT-I/OT Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- SOT-23-6
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 4Kbit
- Memory Organization:
- 512 x 8
- Memory Interface:
- Microwire
- Clock Frequency:
- 2 MHz
- Write Cycle Time - Word, Page:
- 6ms
- Access Time:
- -
- Voltage - Supply:
- 1.8V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOT-23-6
93AA66AT-I/OT FAQ
1.How can I place an order for 93AA66AT-I/OT through Aetrix?
Please submit a Request for Quotation (RFQ) for 93AA66AT-I/OT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 93AA66AT-I/OT reliable?
The price and inventory of 93AA66AT-I/OT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 93AA66AT-I/OT is usually 5 days.
3.What payment methods are accepted for 93AA66AT-I/OT?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 93AA66AT-I/OT transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 93AA66AT-I/OT?
93AA66AT-I/OT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 93AA66AT-I/OT order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 93AA66AT-I/OT?
For technical support, including 93AA66AT-I/OT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 93AA66AT-I/OT requirements.
6.How does Aetrix verify that 93AA66AT-I/OT is sourced from the original manufacturer or authorized distributors?
All 93AA66AT-I/OT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 93AA66AT-I/OT meets industry standards.
7.What is the process for return or replacement of 93AA66AT-I/OT?
All 93AA66AT-I/OT units undergo pre-shipment inspection (PSI). If there is an issue with 93AA66AT-I/OT, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 93AA66AT-I/OT part is unused and in its original packaging.
Return procedure for 93AA66AT-I/OT:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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