Microchip Technology 93C46A-I/ST
- Part No.:
- 93C46A-I/ST
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
93C46A-I/ST.pdf
- Description:
- IC EEPROM 1KBIT MICROWIRE 8TSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
93C46A-I/ST from Microchip Technology Inc. is a 1Kbit (128 × 8-bit) low-voltage serial EEPROM with Microwire-compatible 3-wire interface, 4.5–5.5 V supply range, and industrial temperature rating (–40°C to +85°C). It features self-timed erase/write cycles, automatic ERAL before WRAL, power-on/off data protection, and Ready/Busy status signaling via DO pin. Used for configuration storage in embedded controllers and power management systems.
For engineers reviewing the 93C46A-I/ST datasheet, 93C46A-I/ST pinout, 93C46A-I/ST application, or 93C46A-I/ST equivalent, this page delivers verified electrical specs, package mapping to SOIC-8 (ST), functional timing behavior, real-world use scenarios, and two validated alternative parts with documented technical and application differences.
Technical Context
The 93C46A-I/ST implements a synchronous serial Microwire interface with CS, CLK, DI, and DO pins - no ORG pin (dedicated x8 organization). Its internal architecture includes an address decoder, data register, mode decode logic, and output buffer, enabling instruction-based operations including READ (18 CLK cycles), WRITE (18 CLK cycles), ERASE (10 CLK cycles), ERAL (10 CLK cycles), and WRAL (18 CLK cycles).
It operates exclusively in 8-bit mode with fixed 7-bit addressing (A6–A0), supports sequential read, and uses rising-edge clocking for all data transfers. Programming is initiated by CLK rising edge on last data bit (93C-series behavior), with TWC = 2 ms typical erase/write cycle time at VCC ≥ 4.5 V.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory size | 1 Kbit (128 words × 8 bits); sufficient for small configuration tables or calibration data in space-constrained designs. |
| VCC range | 4.5 V to 5.5 V; compatible with standard 5 V logic rails and excludes low-voltage operation below 4.5 V. |
| Interface | Microwire-compatible 3-wire serial (CS/CLK/DI/DO); requires no external address lines or parallel bus routing. |
| Write endurance | 1,000,000 erase/write cycles; supports frequent field updates in firmware parameter storage applications. |
| Data retention | Greater than 200 years at +25°C; ensures long-term reliability in unpowered storage without refresh. |
| Operating temp | –40°C to +85°C (Industrial grade); qualified for use in industrial control, metering, and automotive body electronics. |
| Max clock frequency | 3 MHz at VCC ≥ 4.5 V; enables fast read/write throughput (~167 kbps effective) without high-speed PCB layout constraints. |
Pinout & Package
93C46A-I/ST is packaged in an 8-pin SOIC (Small Outline Integrated Circuit) with standard JEDEC MS-012AC footprint (ST suffix per Microchip marking table). Pin 1 is marked by laser dot; device has no ORG pin - NC on Pin 6 confirms fixed 8-bit organization.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CS (Pin 1) | Chip Select | Active-high enable; must be held low ≥250 ns between instructions; initiates standby when low during active programming. |
| CLK (Pin 2) | Serial Clock | Rising-edge synchronized I/O; controls timing of opcode/address/data transfer; stopped clocks are tolerated pre-start condition. |
| DI (Pin 3) | Data Input | Receives Start bit, opcodes (e.g., 01 for WRITE), 7-bit address, and 8-bit data; no pull-up required if driven actively. |
| DO (Pin 4) | Data Output / Status | Outputs read data or Ready/Busy signal (low = busy); enters High-Z when CS low or after status polling completes. |
| VSS (Pin 5) | Ground | Reference return path for all I/O and internal logic; must be low-impedance connection to system GND plane. |
| NC (Pin 6) | No Connection | Internally unconnected; must be left floating or tied to GND/VCC per board layout convenience - no functional impact. |
| NC (Pin 7) | No Connection | Unused terminal; no internal bond wire; may be used as thermal pad anchor or left unconnected. |
| VCC (Pin 8) | Power Supply | 4.5–5.5 V supply input; requires local 100 nF ceramic decoupling within 5 mm of pin for stable write timing. |
Key Features
| Feature | Design Value |
|---|---|
| Self-timed erase/write | Eliminates need for external timing control or watchdog timeout logic; internal state machine manages full 2 ms cycle autonomously. |
| Automatic ERAL before WRAL | Guarantees clean memory array prior to bulk write; prevents partial-write corruption without software intervention. |
| Power-on/off data protection | Hardware-level inhibition below VCC = 3.8 V; prevents inadvertent writes during brown-out or power ramp conditions. |
| Ready/Busy status on DO | Enables polling-based firmware flow control instead of fixed delays; reduces worst-case latency by up to 40% vs. timeout waits. |
| 1M endurance & 200-yr retention | Validated at 25°C/5.0 V; supports >10 years of daily reconfiguration in industrial logging or calibration update use cases. |
Applications
| Industrial Sensor Calibration | Embedded Controller Configuration |
|---|---|
Use Scenario: Storing factory-trimmed sensor offset/gain coefficients in HVAC or process control transmitters. IC Role / Device Role / Timing Role: Nonvolatile configuration storage accessed at boot; single-byte reads dominate usage. Use Value: Eliminates need for external trim pots or OTP fuses; enables field recalibration via serial interface without hardware change. |
Use Scenario: Holding user-defined I/O mapping, baud rate, or alarm thresholds in programmable logic controllers (PLCs). IC Role / Device Role / Timing Role: Parameter store updated infrequently (<10×/day); accessed via microcontroller SPI-to-Microwire bridge. Use Value: Preserves settings across power cycles and firmware upgrades; supports remote configuration via Modbus RTU over RS-485. |
| Power Supply Sequencing | Automotive Body Control Module |
Use Scenario: Storing startup voltage thresholds and delay timers for multi-rail DC/DC converters in telecom equipment. IC Role / Device Role / Timing Role: Boot-time configuration source for PMIC sequencer; read once per power-on reset. Use Value: Enables flexible, software-defined power sequencing without redesigning analog timing networks or mask ROM. |
Use Scenario: Retaining seat position memory, mirror fold/unfold preferences, and lighting profiles in entry-level BCMs. IC Role / Device Role / Timing Role: Low-frequency nonvolatile storage interfaced directly to 8-bit MCU GPIOs with bit-banged Microwire. Use Value: Meets AEC-Q100 Grade 2 temp requirement (–40°C to +105°C derated); supports >100,000 seat adjustment cycles. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 93LC46A-I/SN | Wider VCC range (2.5–5.5 V); same 128 × 8-bit organization, SOIC-8 package, and Microwire interface. | Supports battery-powered or mixed-voltage systems where 5 V rail may dip below 4.5 V; not rated for automotive temp. | Select when operating below 4.5 V is required; verify system VCC stability during write cycles to avoid data corruption. |
| AT25010B-SSHL-T | SPI interface (4-wire), 1 Kbit (128 × 8), 1.8–5.5 V, SOIC-8; lacks ERAL/WRAL but offers faster 20 MHz clock and WIP flag. | Requires SPI master instead of Microwire; better suited for high-throughput logging but incompatible instruction set. | Choose for new designs with SPI infrastructure; not drop-in replaceable due to protocol and command structure mismatch. |
Compared with 93C46A-I/ST, 93LC46A-I/SN extends voltage flexibility at the cost of reduced high-temp margin, while AT25010B-SSHL-T trades Microwire compatibility for higher speed and broader VCC range - both require firmware and layout changes.
Availability
93C46A-I/ST is available at Aetrix Electronics and suitable for industrial sensor calibration, embedded controller configuration, and power supply sequencing requiring stable component supply, long-lifecycle support, and RoHS-compliant packaging.
Supply support for 93C46A-I/ST includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology Inc. is a leading provider of microcontrollers, analog devices, and memory solutions, headquartered in Chandler, Arizona, with global design and manufacturing operations.
The 93Cxx series was designed specifically for cost-sensitive, low-power serial EEPROM applications in industrial and automotive systems where Microwire compatibility, robust data retention, and simple 3-wire control are prioritized over high speed or multi-voltage flexibility.
FAQ
What is the memory organization of the 93C46A-I/ST?
The 93C46A-I/ST has a fixed 128 × 8-bit (1 Kbit) organization with no ORG pin - confirmed by its 'A' suffix and NC on Pin 6. It does not support 16-bit mode or word-size selection. All read/write operations use 7-bit addressing (A6–A0) and transfer 8-bit data units, making it ideal for byte-oriented configuration storage where simplicity and pin count are critical.
Does the 93C46A-I/ST support the ERAL (Erase All) command?
Yes, the 93C46A-I/ST supports ERAL with opcode 0010xxxx. The ERAL cycle is self-timed and takes 6 ms maximum at VCC ≥ 4.5 V. It erases the entire 128-byte array to 0xFF before subsequent WRAL execution. VCC must remain ≥4.5 V throughout the cycle - operation is inhibited below this threshold per VPOR specification.
What is the function of the NC pins on the 93C46A-I/ST SOIC package?
Pins 6 and 7 of the 93C46A-I/ST (SOIC-8, ST package) are No Connect (NC). Pin 6 replaces the ORG pin found on 'C' variants; Pin 7 has no internal bond. Neither pin may be used for signaling or power. They may be left floating, tied to GND for mechanical stability, or used as thermal relief anchors - no electrical effect on device operation.
How does the Ready/Busy status work on the 93C46A-I/ST DO pin?
During erase or write operations, the DO pin outputs Ready/Busy status: logic low indicates ongoing programming; logic high signals completion. To poll, bring CS high for ≥250 ns after TCSL, then sample DO. After completion, issuing a Start bit followed by CS low clears the status. DO returns to High-Z when CS is low or after status is cleared.
Is the 93C46A-I/ST RoHS compliant and Pb-free?
Yes, the 93C46A-I/ST is RoHS compliant and features a Pb-free Matte Tin (Sn) finish per Microchip's packaging specification. This applies to all standard packages including SOIC-8 (ST), and is confirmed in the device selection table and package marking notes. No lead content is present in the termination plating or die attach materials.
93C46A-I/ST Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 1Kbit
- Memory Organization:
- 128 x 8
- Memory Interface:
- Microwire
- Clock Frequency:
- 2 MHz
- Write Cycle Time - Word, Page:
- 2ms
- Access Time:
- -
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-TSSOP
93C46A-I/ST FAQ
1.How can I place an order for 93C46A-I/ST through Aetrix?
Please submit a Request for Quotation (RFQ) for 93C46A-I/ST on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 93C46A-I/ST reliable?
The price and inventory of 93C46A-I/ST are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 93C46A-I/ST is usually 5 days.
3.What payment methods are accepted for 93C46A-I/ST?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 93C46A-I/ST transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 93C46A-I/ST?
93C46A-I/ST orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 93C46A-I/ST order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 93C46A-I/ST?
For technical support, including 93C46A-I/ST datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 93C46A-I/ST requirements.
6.How does Aetrix verify that 93C46A-I/ST is sourced from the original manufacturer or authorized distributors?
All 93C46A-I/ST products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 93C46A-I/ST meets industry standards.
7.What is the process for return or replacement of 93C46A-I/ST?
All 93C46A-I/ST units undergo pre-shipment inspection (PSI). If there is an issue with 93C46A-I/ST, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 93C46A-I/ST part is unused and in its original packaging.
Return procedure for 93C46A-I/ST:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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