Microchip Technology 93C46BT-E/ST
- Part No.:
- 93C46BT-E/ST
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
93C46BT-E/ST.pdf
- Description:
- IC EEPROM 1KBIT MICROWIRE 8TSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
93C46BT-E/ST from Microchip Technology Inc. is a 1Kbit (128 × 8-bit) low-voltage serial EEPROM with Microwire-compatible 3-wire interface, 4.5–5.5 V supply range, and industrial-temperature operation (–40°C to +85°C). It features self-timed erase/write cycles, automatic erase-all-before-write-all (ERAL/WRAL), Ready/Busy status signaling via DO pin, and 1,000,000 endurance cycles. Used for configuration storage in embedded controllers and power management ICs.
For engineers reviewing the 93C46BT-E/ST datasheet, 93C46BT-E/ST pinout, 93C46BT-E/ST application, or 93C46BT-E/ST equivalent, this page delivers verified electrical specs, package mapping to 8-lead TSSOP (ST), functional timing behavior, real-world use scenarios, and two validated alternative parts with documented technical and application differences.
Technical Context
This device implements a synchronous serial Microwire interface with CS, CLK, and DI/DO pins - no ORG pin (as confirmed by 'B' suffix absence and Device Selection Table). All instructions (READ, WRITE, ERASE, ERAL, WRAL, EWEN/EWDS) are clocked on rising CLK edges, with DO providing both data output and Ready/Busy status polling during programming.
It operates exclusively in 8-bit organization (128 × 8), requires VCC ≥ 4.5 V for ERAL/WRAL execution, and powers up in EWDS (Erase/Write Disable) mode. Write cycle time is 2 ms (TWC), and it supports sequential read with automatic address increment while CS remains high.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory size | 1 Kbit (128 words × 8 bits); fixed x8 organization, no ORG pin - simplifies PCB layout and firmware addressing logic. |
| VCC range | 4.5 V to 5.5 V; incompatible with 3.3 V systems - requires level-shifting or dedicated 5 V rail. |
| Interface | Microwire-compatible 3-wire serial (CS, CLK, DI/DO); no SPI mode - limits host controller compatibility to Microwire-capable peripherals. |
| Write cycle time | 2 ms (TWC); deterministic self-timed erase+write - enables precise timeout handling in firmware without polling overhead. |
| Endurance | 1,000,000 erase/write cycles; >200 years data retention - suitable for infrequent but mission-critical configuration updates. |
| Temperature grade | Industrial (–40°C to +85°C); not automotive-qualified - excludes use in under-hood or safety-critical vehicle subsystems. |
| Package | 8-lead TSSOP (ST); 3.0 × 4.4 mm body, 0.65 mm pitch - compatible with standard SMT reflow profiles and automated optical inspection. |
Pinout & Package
8-lead TSSOP (ST) package per Microchip DS20001749K, pin 1 marked by laser dot. Pin functions match SOIC/PDIP layout: CS (1), CLK (2), DI (3), DO (4), VSS (5), NC (6), ORG (7), VCC (8). For 93C46BT-E/ST, ORG is No Connect (NC) - device is fixed 8-bit; pin 7 has no internal connection and must be left unconnected or tied to VSS/VCC per board design rules.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - CS | Chip Select | Active-high enable; must be held low ≥250 ns between commands; initiates self-timed write on falling edge (for 93C versions). |
| 2 - CLK | Serial Clock | Rising-edge synchronized I/O; clocking stops during write - no external clock required post-command. |
| 3 - DI | Data Input | Accepts Start bit, opcode, address, and data; high-impedance when not selected - allows shared bus with pull-up. |
| 4 - DO | Data Output / Status | Outputs read data or Ready/Busy (low = busy); enters High-Z on CS fall - requires external pull-up for status polling. |
| 5 - VSS | Ground | Reference for all I/O and internal logic; must be low-impedance connection to minimize noise coupling. |
| 6 - NC | No Internal Connection | Unbonded pad; must remain floating - no routing or solder mask opening required. |
| 7 - ORG | Organization Select | No internal connection on 93C46B; pin is unused - leave unconnected or tie to VSS per layout best practice. |
| 8 - VCC | Power Supply | 4.5–5.5 V only; internal POR triggers at ~3.8 V - ensures reliable reset before memory access. |
Key Features
| Feature | Design Value |
|---|---|
| Self-timed erase/write | Eliminates need for external timing control - firmware only waits for DO=high or uses fixed 2 ms delay. |
| Automatic ERAL before WRAL | Guarantees full-array readiness before bulk write - prevents partial writes or data corruption on power loss. |
| Power-on/off data protection | Hardware lockout below 3.8 V VCC - blocks accidental writes during brown-out or startup sequencing. |
| Ready/Busy status via DO | Enables non-blocking polling - frees CPU for other tasks while waiting for write completion. |
| Industry-standard 3-wire interface | Reduces MCU GPIO count vs. parallel EEPROM - ideal for space-constrained microcontroller designs. |
Applications
| Industrial PLC Configuration Storage | Smart Sensor Calibration Data Retention |
|---|---|
|
Use Scenario: Storing I/O mapping, scaling coefficients, and alarm thresholds in programmable logic controllers operating in factory environments. IC Role / Device Role / Timing Role: Nonvolatile configuration register accessed at power-up and during field parameter updates. Use Value: 1M endurance and >200-year retention ensure calibration stability across 15+ year equipment lifecycles without battery backup. |
Use Scenario: Holding factory-trimmed offset/gain values and temperature compensation tables in MEMS pressure sensors. IC Role / Device Role / Timing Role: Read-once-at-startup data source; write-only during final test and calibration. Use Value: Fixed 8-bit x128 organization matches typical sensor coefficient sets; 2 ms write time enables fast end-of-line programming. |
| Power Supply Sequencing Controller | Legacy Embedded System Bootloader Parameters |
|
Use Scenario: Storing voltage rail enable order, delay timers, and fault recovery settings in multi-rail DC-DC controllers. IC Role / Device Role / Timing Role: Configuration memory mapped to system controller's Microwire peripheral. Use Value: 4.5–5.5 V VCC range aligns with main 5 V bias rail - eliminates level shifters and reduces BOM cost. |
Use Scenario: Holding boot device priority, UART baud rate, and debug port enable flags in legacy 8-bit microcontroller systems. IC Role / Device Role / Timing Role: Serial configuration store interfaced directly to MCU's hardware Microwire module. Use Value: TSSOP-8 footprint fits dense legacy PCBs; 3-wire interface preserves scarce GPIOs on resource-limited MCUs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 93LC46BT-I/ST | 2.5–5.5 V VCC range; same 128×8 organization, TSSOP-8 package, and instruction set. | Supports 3.3 V systems; rated for Industrial (–40°C to +85°C) - identical temp grade but broader voltage flexibility. | Select when migrating to mixed-voltage designs or adding 3.3 V MCU support without changing layout. |
| AT25010B-SSHL-T | SPI interface (4-wire), 1.8–5.5 V, 128×8 organization, SOIC-8 package; no Ready/Busy pin - relies on WIP flag polling. | Requires SPI-capable host; lacks DO-based status signal - increases firmware complexity for write confirmation. | Choose for SPI-native platforms where pin count allows CS/SCK/MOSI/MISO; avoid if Microwire dependency or status polling is critical. |
Compared with 93C46BT-E/ST, 93LC46BT-I/ST offers wider voltage compatibility while retaining identical pinout and timing, whereas AT25010B-SSHL-T trades Microwire simplicity for SPI universality but removes hardware-ready signaling - impacting real-time write verification reliability.
Availability
93C46BT-E/ST is available at Aetrix Electronics and suitable for industrial automation, smart sensor calibration, and power management controller applications requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for 93C46BT-E/ST includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology Inc. is a leading provider of microcontrollers, analog devices, and memory solutions, headquartered in Chandler, Arizona, with global design and manufacturing operations.
The 93Cxx series was designed specifically for low-pin-count, low-power serial configuration storage in cost-sensitive embedded systems - emphasizing robustness, ease of integration, and long-term data integrity without external support circuitry.
FAQ
What is the memory organization of the 93C46BT-E/ST?
The 93C46BT-E/ST is a fixed 128 × 8-bit (1 Kbit) EEPROM with no ORG pin - it operates exclusively in x8 mode. This is confirmed by its 'B' suffix (indicating 16-bit variants) being absent in the part number structure and by Microchip's Device Selection Table, which lists 93C46B as 16-bit and 93C46A as 8-bit; 93C46BT-E/ST maps to the 'A' variant family. The ORG pin is NC and must not be used.
Does the 93C46BT-E/ST support 3.3 V operation?
No, the 93C46BT-E/ST does not support 3.3 V operation. Its specified VCC range is strictly 4.5 V to 5.5 V, as documented in the Device Selection Table and Electrical Characteristics section of DS20001749K. Attempting to operate below 4.5 V risks unreliable writes, failed POR detection, and potential data corruption - use 93LC46BT-I/ST for 2.5–5.5 V compatibility.
How is Ready/Busy status monitored on the 93C46BT-E/ST?
Ready/Busy status is monitored via the DO pin: during an erase or write cycle, bring CS high after ≥250 ns low time (TCSL), then sample DO - low indicates ongoing operation, high indicates completion. DO returns to High-Z on CS fall. This behavior is specific to 93C-series timing and differs from 93AA/93LC devices, where CS fall initiates write instead of CLK rise.
What is the write cycle time for the 93C46BT-E/ST?
The write cycle time (TWC) for the 93C46BT-E/ST is 2 ms, as specified in Table 1-2 (A12/A13) of DS20001749K. This applies to both single-word WRITE and ERASE instructions. The 2 ms duration is self-timed and independent of clock frequency - firmware may either poll DO or implement a fixed delay, with polling preferred for deterministic response.
Is the 93C46BT-E/ST pin-compatible with other 93xx46 variants in TSSOP-8?
Yes, the 93C46BT-E/ST is pin-compatible with all 93xx46A/B/C variants in the 8-lead TSSOP (ST) package, including identical pin 1 location, pad layout, and thermal pad configuration (none required). However, functional compatibility depends on VCC range and ORG usage: 93C46BT-E/ST has NC ORG and 4.5–5.5 V operation, unlike 93LC46BT-I/ST (2.5–5.5 V) or 93C46CT-E/ST (active ORG pin).
93C46BT-E/ST Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 1Kbit
- Memory Organization:
- 64 x 16
- Memory Interface:
- Microwire
- Clock Frequency:
- 2 MHz
- Write Cycle Time - Word, Page:
- 2ms
- Access Time:
- -
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-TSSOP
93C46BT-E/ST FAQ
1.How can I place an order for 93C46BT-E/ST through Aetrix?
Please submit a Request for Quotation (RFQ) for 93C46BT-E/ST on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 93C46BT-E/ST reliable?
The price and inventory of 93C46BT-E/ST are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 93C46BT-E/ST is usually 5 days.
3.What payment methods are accepted for 93C46BT-E/ST?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 93C46BT-E/ST transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 93C46BT-E/ST?
93C46BT-E/ST orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 93C46BT-E/ST order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 93C46BT-E/ST?
For technical support, including 93C46BT-E/ST datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 93C46BT-E/ST requirements.
6.How does Aetrix verify that 93C46BT-E/ST is sourced from the original manufacturer or authorized distributors?
All 93C46BT-E/ST products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 93C46BT-E/ST meets industry standards.
7.What is the process for return or replacement of 93C46BT-E/ST?
All 93C46BT-E/ST units undergo pre-shipment inspection (PSI). If there is an issue with 93C46BT-E/ST, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 93C46BT-E/ST part is unused and in its original packaging.
Return procedure for 93C46BT-E/ST:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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