Microchip Technology 93LC46A-E/MS
- Part No.:
- 93LC46A-E/MS
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
- Datasheet:
-
93LC46A-E/MS.pdf
- Description:
- IC EEPROM 1KBIT MICROWIRE 8MSOP
- Quantity:
- Payment:

- Shipping:

Inventory:4,397
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
93LC46A-E/MS from Microchip Technology Inc. is a 1Kbit (128 × 8-bit) low-voltage serial EEPROM with Microwire-compatible 3-wire interface, operating from 2.5V to 5.5V, rated for automotive temperature range (−40°C to +125°C), and housed in an 8-lead MSOP package. It features self-timed erase/write cycles, automatic ERAL before WRAL, power-on/off data protection, and Ready/Busy status signaling via DO pin - used for configuration storage in engine control units, infotainment boot loaders, and sensor calibration tables.
For engineers reviewing the 93LC46A-E/MS datasheet, 93LC46A-E/MS pinout, 93LC46A-E/MS application, or 93LC46A-E/MS equivalent, key selection criteria include its automotive-grade temperature support, 8-bit fixed organization (no ORG pin), 1M endurance cycles, 200-year data retention, and compatibility with legacy Microwire host controllers requiring minimal firmware changes.
Technical Context
The 93LC46A-E/MS implements a synchronous serial interface with CS, CLK, and DI/DO pins, using rising-edge clocking for instruction/address/data transfer. Its internal architecture includes an address decoder, mode decode logic, and output buffer, with no internal ORG pin - confirming fixed 128 × 8-bit memory mapping and eliminating external configuration logic.
All operations begin with a Start condition (CS high + DI high on CLK rising edge), followed by opcode, address, and optional data. Erase, write, and WRAL cycles are fully self-timed (6 ms typical), and Ready/Busy status is polled via DO while CS is high after ≥250 ns low time - enabling non-blocking host firmware integration without dedicated interrupt lines.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory size | 1 Kbit (128 × 8-bit); supports compact configuration storage without external address multiplexing |
| VCC range | 2.5V to 5.5V; compatible with 3.3V and 5V automotive subsystems without level-shifting |
| Endurance | 1,000,000 erase/write cycles; sufficient for frequent calibration updates over 15+ years of vehicle service life |
| Data retention | 200 years at +85°C; ensures EEPROM contents survive full vehicle lifecycle including hot under-hood environments |
| Interface | Microwire-compatible 3-wire serial (CS/CLK/DI/DO); interoperable with legacy microcontrollers lacking SPI hardware |
| Temp grade | Automotive (E): −40°C to +125°C; qualified per AEC-Q100 for engine control, body electronics, and ADAS modules |
| Write cycle time | 6 ms max (TWC); enables deterministic timing budgeting in real-time safety-critical firmware |
Pinout & Package
8-lead MSOP (Micro Small Outline Package), 3.0 mm × 3.0 mm body, 0.65 mm pitch, exposed pad optional (VSS or floating), Pb-free Matte Tin finish.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (CS) | Chip Select | Active-high enable; must be held low ≥250 ns between instructions; deselects device into standby (ICCS ≤ 5 µA) |
| 2 (CLK) | Serial Clock | Rising-edge synchronized I/O; clock can pause mid-transfer; no clocks required during self-timed write |
| 3 (DI) | Data Input | Accepts Start bit, opcode, address, and write data; tied high at power-up to detect Start condition |
| 4 (DO) | Data Output / Status | Outputs read data or Ready/Busy (low = busy); enters High-Z when CS low or during non-read states |
| 5 (VSS) | Ground | Reference for all I/O and internal logic; exposed pad may be connected to VSS for thermal relief |
| 6 (NC) | No Connection | Internally unconnected; must be left floating or tied to VSS per layout best practice |
| 7 (ORG) | Organization | No internal connection on 'A' devices; not present in functional logic - confirms fixed 8-bit word size |
| 8 (VCC) | Power Supply | 2.5–5.5V operation; internal POR triggers at ~1.5V; inhibits all writes below threshold |
Key Features
| Feature | Design Value |
|---|---|
| Self-timed erase/write | Eliminates need for external timing control or polling delays beyond TWC (6 ms), simplifying host driver code |
| Automatic ERAL before WRAL | Guarantees full-array erase prior to bulk write, preventing partial-data corruption during firmware update sequences |
| Power-on/off data protection | Hardware-level VCC monitoring blocks all writes when supply drops below 1.5V, preventing inadvertent corruption during brown-out |
| Ready/Busy status on DO | Enables efficient polling-based operation without interrupts or additional GPIO lines - critical for resource-constrained MCUs |
| 128 × 8-bit fixed organization | Removes dependency on external ORG pin routing and logic, reducing PCB complexity and BOM count |
Applications
| Engine Control Unit (ECU) | Infotainment System Boot Loader |
|---|---|
Use Scenario: Storing adaptive fuel trim values, knock sensor learning offsets, and emission calibration maps that update during vehicle operation. IC Role / Device Role / Timing Role: Nonvolatile configuration register providing persistent parameter storage accessible via MCU's Microwire peripheral during runtime. Use Value: Enables closed-loop engine optimization across temperature and aging conditions without requiring external FRAM or battery-backed SRAM. | Use Scenario: Holding secure boot keys, firmware signature hashes, and display initialization parameters loaded before main OS execution. IC Role / Device Role / Timing Role: Trusted configuration store accessed early in boot sequence to validate firmware integrity before execution. Use Value: Supports AEC-Q100-compliant secure boot architecture with guaranteed 200-year data retention under under-hood thermal stress. |
| Sensor Module Calibration | Body Control Module (BCM) |
Use Scenario: Retaining factory-calibrated offset/gain coefficients for pressure, temperature, and IMU sensors in ADAS cameras and radar units. IC Role / Device Role / Timing Role: Factory-programmed reference memory mapped to MCU's serial interface during production test and field recalibration. Use Value: Eliminates need for laser-trimmed resistors or external DACs; allows post-manufacture calibration updates via diagnostic port. | Use Scenario: Storing user preferences (window positions, mirror angles, lighting profiles) and door lock configuration across ignition cycles. IC Role / Device Role / Timing Role: Persistent settings register interfaced to 8-bit MCU with limited GPIO, using minimal 3-wire footprint. Use Value: Delivers cost-optimized, AEC-Q100-qualified storage with <5 µA standby current - extending battery life in always-on BCM sleep modes. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 93LC46B-E/MS | 16-bit organization (64 × 16), same voltage/temp range and package; requires host software rework for 16-bit addressing | Used where wider data path reduces transaction count (e.g., storing 16-bit ADC calibration slopes) | Select only if system firmware supports 16-bit word access and memory map alignment matches 64-word boundary |
| AT25DF041A-MAHN-T | SPI interface (4-wire), 4 Mbit density, 2.7–3.6V only, no Ready/Busy pin; requires different driver stack and higher pin count | Preferred for high-throughput firmware updates where sequential read speed and density outweigh interface simplicity | Choose when migrating to SPI-based platforms and >1 Kbit capacity is needed - not drop-in compatible |
Compared with 93LC46B-E/MS and AT25DF041A-MAHN-T, the 93LC46A-E/MS offers optimal balance of automotive qualification, minimal 3-wire footprint, fixed 8-bit compatibility, and proven Microwire ecosystem support - making it the preferred choice for cost-sensitive, legacy-compatible ECU and BCM designs.
Availability
93LC46A-E/MS is available at Aetrix Electronics and suitable for automotive control units, infotainment boot loaders, and sensor calibration modules requiring stable component supply across extended production lifecycles.
Supply support for 93LC46A-E/MS includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology Inc. is a leading provider of microcontroller, analog, and Flash-IP solutions, headquartered in Chandler, Arizona, with global design, manufacturing, and sales operations.
The 93LC46A-E/MS belongs to Microchip's legacy 93XX serial EEPROM family, designed specifically for automotive and industrial systems requiring robust, low-pin-count nonvolatile memory with guaranteed data integrity under harsh electrical and thermal conditions.
FAQ
What is the maximum clock frequency supported by the 93LC46A-E/MS?
The 93LC46A-E/MS supports up to 3 MHz clock frequency when VCC is 4.5V–5.5V, 2 MHz at 2.5V–4.5V, and 1 MHz at 1.8V–2.5V. These limits are defined in Table 1-2 (A1) of the DS20001749K datasheet and ensure reliable setup/hold timing across its specified automotive temperature range. The 93LC46A-E/MS does not require continuous clocking during write cycles.
Does the 93LC46A-E/MS have an ORG pin, and how does it affect memory organization?
No, the 93LC46A-E/MS does not have a functional ORG pin - it is marked NC (No Connection) in the pin function table and confirmed in Note 2 of the datasheet. As an 'A'-suffix device, it provides fixed 128 × 8-bit organization only. This eliminates external ORG routing and simplifies layout versus 'C'-suffix variants that require external logic to select 8-bit or 16-bit mode.
How is data protection implemented during power transitions in the 93LC46A-E/MS?
The 93LC46A-E/MS incorporates hardware-level power detection: all write/erase operations are inhibited when VCC falls below ~1.5V (VPOR parameter D11), preventing corruption during brown-out or power-down. Additionally, it powers up in EWDS (Erase/Write Disable) mode, requiring an explicit EWEN command before any programming - ensuring accidental writes cannot occur at startup or reset.
What is the purpose of the Ready/Busy signal on the DO pin of the 93LC46A-E/MS?
The DO pin of the 93LC46A-E/MS serves dual function: during READ, it outputs data bits; during ERASE/WRITE/WRAL, it signals Ready/Busy status (low = busy, high = ready) when CS is brought high after ≥250 ns low time. This enables polling-based firmware control without interrupts or additional status lines - a key design feature for resource-constrained automotive MCUs interfacing to the 93LC46A-E/MS.
Is the 93LC46A-E/MS qualified for automotive applications, and what standards does it meet?
Yes, the 93LC46A-E/MS carries the 'E' temperature grade suffix, specifying operation from −40°C to +125°C and qualifying it for automotive under-hood and cabin applications. While the datasheet does not list AEC-Q100 certification explicitly, Microchip documents this part as automotive-grade in packaging and reliability testing per internal qualification standards aligned with AEC-Q100 stress test conditions for EEPROMs.
93LC46A-E/MS Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 1Kbit
- Memory Organization:
- 128 x 8
- Memory Interface:
- Microwire
- Clock Frequency:
- 2 MHz
- Write Cycle Time - Word, Page:
- 6ms
- Access Time:
- -
- Voltage - Supply:
- 2.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-MSOP
93LC46A-E/MS FAQ
1.How can I place an order for 93LC46A-E/MS through Aetrix?
Please submit a Request for Quotation (RFQ) for 93LC46A-E/MS on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 93LC46A-E/MS reliable?
The price and inventory of 93LC46A-E/MS are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 93LC46A-E/MS is usually 5 days.
3.What payment methods are accepted for 93LC46A-E/MS?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 93LC46A-E/MS transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 93LC46A-E/MS?
93LC46A-E/MS orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 93LC46A-E/MS order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 93LC46A-E/MS?
For technical support, including 93LC46A-E/MS datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 93LC46A-E/MS requirements.
6.How does Aetrix verify that 93LC46A-E/MS is sourced from the original manufacturer or authorized distributors?
All 93LC46A-E/MS products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 93LC46A-E/MS meets industry standards.
7.What is the process for return or replacement of 93LC46A-E/MS?
All 93LC46A-E/MS units undergo pre-shipment inspection (PSI). If there is an issue with 93LC46A-E/MS, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 93LC46A-E/MS part is unused and in its original packaging.
Return procedure for 93LC46A-E/MS:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
93LC46A-E/MS Tags

-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology

-
AT21CS01-STUM10-T
Microchip Technology

-
AT24C02C-SSHM-T
Microchip Technology

-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics

-
AT24CS02-SSHM-T
Microchip Technology

-
93LC46BT-I/OT
Microchip Technology

-
AT24C04C-SSHM-T
Microchip Technology

-
24LC01BT-I/SN
Microchip Technology

-
24AA02UIDT-I/OT
Microchip Technology

-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

