My Inquiry
My Account
Microchip Technology 93LC46AT-E/SN
- Part No.:
- 93LC46AT-E/SN
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
93LC46AT-E/SN.pdf
- Description:
- IC EEPROM 1KBIT MICROWIRE 8SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:2,421
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
93LC46AT-E/SN from Microchip Technology is a 1 Kbit (128 × 8-bit) low-voltage serial EEPROM with Microwire-compatible 3-wire interface, 2.5–5.5 V supply range, and automotive-grade temperature support (−40°C to +125°C). It features self-timed erase/write cycles, automatic erase-all-before-write-all, power-on/off data protection, and Ready/Busy status signaling via DO pin - deployed in engine control units, ABS modules, and automotive sensor calibration storage.
For engineers reviewing the 93LC46AT-E/SN datasheet, 93LC46AT-E/SN pinout, 93LC46AT-E/SN application, or 93LC46AT-E/SN equivalent, key selection criteria include its A-version fixed 8-bit organization (no ORG pin), automotive qualification (E-temp), SOIC-8 package (SN), 1 million erase/write endurance, and 200-year data retention - critical for safety-critical nonvolatile memory in harsh environments.
Technical Context
The 93LC46AT-E/SN implements a synchronous serial Microwire interface with CS, CLK, and DI/DO pins. It operates exclusively in x8 mode (no ORG pin function), requiring 18 clock cycles for READ and WRITE instructions. Its internal logic enforces EWEN/EWDS write protection, and Ready/Busy polling is performed by sampling DO after CS high pulse following TCSL ≥250 ns.
Timing is voltage-dependent: max clock frequency is 2 MHz at VCC = 2.5 V and 3 MHz at VCC ≥ 4.5 V; program cycle time is fixed at 6 ms for erase/write operations. Power-on reset detection triggers at VPOR = 1.5 V, ensuring reliable initialization across automotive battery transients.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size & Organization | 1 Kbit (128 × 8-bit); fixed x8 configuration - no ORG pin required, simplifying PCB layout and firmware addressing. |
| Supply Voltage Range | 2.5 V to 5.5 V - supports direct connection to 3.3 V or 5 V automotive microcontroller I/O rails without level shifting. |
| Endurance & Retention | 1,000,000 erase/write cycles and >200 years data retention - validated for lifetime operation in automotive ECUs with infrequent but mission-critical parameter updates. |
| Interface Protocol | Microwire-compatible 3-wire serial (CS/CLK/DI/DO); no SPI mode - requires dedicated Microwire host or bit-banged GPIO control. |
| Temperature Range | −40°C to +125°C (Automotive E-grade) - qualified per AEC-Q100 stress test requirements for under-hood deployment. |
| Write Cycle Time | 6 ms typical erase/write time - enables deterministic firmware timeout handling during calibration writes without blocking main control loop. |
| Standby Current | 1 µA maximum at I-temp, 5 µA at E-temp - minimizes quiescent drain on vehicle battery during ignition-off states. |
Pinout & Package
93LC46AT-E/SN is supplied in an 8-lead SOIC package (package code SN), with gull-wing leads, 1.27 mm pitch, and Pb-free Matte Tin finish. Pin 1 is marked by laser indentation; device orientation follows standard SOIC pin 1 indicator (notch or dot).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CS | Chip Select | Active-high enable; must be held low ≥250 ns between commands; deselects device into standby but allows ongoing write completion. |
| CLK | Serial Clock | Synchronizes all data transfers on rising edge; clock can pause mid-transfer; no clock required during self-timed 6 ms write cycle. |
| DI | Data Input | Accepts Start bit, opcodes (e.g., 01 for WRITE), 7-bit address, and 8-bit data; tied to VSS or VCC during standby per EWDS/EWEN state. |
| DO | Data Output / Status | Outputs read data or Ready/Busy signal (low = busy); enters High-Z when CS goes low; status valid only after CS re-assertion post-TCSL. |
| VSS | Ground | Reference for all digital and analog circuitry; must be low-impedance connection to minimize noise coupling into EEPROM core. |
| NC | No Internal Connection | Pin 7 is unconnected internally - must be left floating or tied to VSS; not usable as GPIO or strap pin. |
| VCC | Power Supply | 2.5–5.5 V supply; includes on-chip POR circuit triggering at 1.5 V - ensures memory remains locked until stable rail is established. |
| ORG | Organization Select | Not present on 93LC46A devices; pin 6 is NC - eliminates external resistor network and firmware configuration overhead for x8-only use. |
Key Features
| Feature | Design Value |
|---|---|
| Self-timed Erase/Write Cycles | 6 ms fixed duration eliminates need for external timing control or firmware delay loops - improves system predictability and reduces CPU load. |
| Automatic ERAL before WRAL | Full-array erase precedes write-all; prevents partial-write corruption - essential for storing complete calibration tables atomically. |
| Power-On/Off Data Protection | Hardware lockout below 1.5 V VCC prevents spurious writes during brown-out or cold-cranking - meets ISO 16750-2 automotive electrical transient immunity. |
| Ready/Busy Status via DO | Single-pin status reporting enables real-time polling without additional GPIO or interrupt lines - simplifies integration with resource-constrained MCUs. |
| RoHS Compliant & Pb-Free | Matte Tin (Sn) finish on SOIC leads - satisfies automotive ELV directive and solder compatibility with lead-free reflow profiles. |
Applications
| Engine Control Unit (ECU) | Anti-lock Braking System (ABS) |
|---|---|
Use Scenario: Storing adaptive fuel trim values, knock sensor learning offsets, and cold-start enrichment maps that persist across ignition cycles. IC Role / Device Role: Nonvolatile parameter storage with guaranteed write integrity during vehicle cranking and battery voltage sag. Use Value: Enables closed-loop engine optimization over vehicle lifetime without requiring external backup power or supercapacitors. | Use Scenario: Retaining wheel speed sensor calibration coefficients and brake pressure threshold adjustments after system power-down. IC Role / Device Role: Safety-critical configuration memory with AEC-Q100 Grade 0 qualification margin (E-temp rating exceeds requirement). Use Value: Eliminates recalibration events during service intervals, reducing warranty claims and diagnostic labor time. |
| Body Control Module (BCM) | Advanced Driver Assistance Systems (ADAS) |
Use Scenario: Saving user preferences for seat position, mirror angle, and lighting settings across vehicle power cycles. IC Role / Device Role: Low-power configuration storage interfaced directly to 3.3 V CAN/LIN microcontrollers. Use Value: Achieves <5 µA standby current - extends battery life in parked vehicle scenarios exceeding 30 days. | Use Scenario: Storing camera lens distortion correction parameters and radar object classification thresholds updated during factory calibration. IC Role / Device Role: Secure, tamper-resistant memory for safety-related calibration data with hardware write-protection (EWDS default). Use Value: Meets ASIL-B functional safety requirements for data integrity via built-in erase/write disable on power-up. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 93LC46BT-E/SN | 128 × 16-bit organization; same voltage/temp/package - requires 16-bit firmware interface and double-address space mapping. | Used where MCU has native 16-bit data bus or legacy systems require word-aligned storage. | Select only if existing firmware or hardware design mandates 16-bit word access; otherwise 93LC46AT-E/SN offers simpler byte-level addressing. |
| AT25DF041A-SHN-T | 4 Mbit SPI NOR Flash; quad I/O capable; no built-in erase/write disable; 2.7–3.6 V only; different command set and timing. | Targeted at code storage or larger configuration blocks; lacks microwire compatibility and automotive temp grade. | Not a drop-in replacement; requires full driver rewrite, voltage regulation, and qualification retesting - avoid unless capacity or speed demands exceed EEPROM limits. |
Compared with 93LC46BT-E/SN, the 93LC46AT-E/SN provides direct byte-addressable access without address doubling, reducing firmware complexity; versus AT25DF041A-SHN-T, it delivers guaranteed 1M-cycle endurance, true byte-write capability, and seamless integration into Microwire-based automotive platforms without protocol translation.
Availability
93LC46AT-E/SN is available at Aetrix Electronics and suitable for automotive control units, sensor calibration systems, and body electronics requiring stable component supply with long-term lifecycle assurance and AEC-Q100-compliant traceability.
Supply support for 93LC46AT-E/SN includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology Inc. is a leading provider of microcontrollers, analog components, and memory solutions, headquartered in Chandler, Arizona, with global manufacturing and support infrastructure.
The 93LC46A/B/C series was designed specifically for cost-sensitive, low-power automotive and industrial applications requiring robust serial EEPROM functionality in compact packages with extended temperature operation.
FAQ
What is the memory organization of the 93LC46AT-E/SN?
The 93LC46AT-E/SN is a fixed 128 × 8-bit (1 Kbit) organization device - designated by the "A" suffix - meaning it operates exclusively in x8 mode with no ORG pin functionality. This eliminates external configuration resistors and simplifies firmware development compared to C-version parts that require ORG pin strapping for x8/x16 selection.
Does the 93LC46AT-E/SN support SPI communication?
No, the 93LC46AT-E/SN implements a Microwire-compatible 3-wire interface (CS/CLK/DI/DO), not SPI. It lacks an independent MISO/MOSI pair and uses bidirectional DO for both data output and Ready/Busy status. SPI hosts require bit-banged software emulation or dedicated Microwire peripheral support.
What is the purpose of the NC pin on the 93LC46AT-E/SN?
Pin 7 on the 93LC46AT-E/SN is labeled NC (No Connection) and is not bonded internally. It must be left floating or tied to VSS - it cannot be used for strapping, debugging, or any functional role. This differs from 93LC46C variants where pin 6 serves as ORG, but the A-version replaces ORG with NC.
How does the 93LC46AT-E/SN ensure data integrity during power loss?
The 93LC46AT-E/SN incorporates hardware power-on/power-off protection that disables all write operations when VCC falls below 1.5 V. Combined with default EWDS (Erase/Write Disable) on power-up, this prevents accidental writes during brown-out conditions - a critical feature verified for automotive battery transients per ISO 16750-2.
Is the 93LC46AT-E/SN pin-compatible with other 93LC46x variants in SOIC-8?
Yes, the 93LC46AT-E/SN shares identical SOIC-8 (SN) pinout and footprint with all 93LC46x variants including 93LC46BT-E/SN and 93LC46CT-E/SN. However, functional compatibility requires matching organization (A vs B vs C) and temperature grade - substituting a B-version would require firmware changes to handle 16-bit words.
93LC46AT-E/SN Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 1Kbit
- Memory Organization:
- 128 x 8
- Memory Interface:
- Microwire
- Clock Frequency:
- 2 MHz
- Write Cycle Time - Word, Page:
- 6ms
- Access Time:
- -
- Voltage - Supply:
- 2.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
93LC46AT-E/SN FAQ
1.How can I place an order for 93LC46AT-E/SN through Aetrix?
Please submit a Request for Quotation (RFQ) for 93LC46AT-E/SN on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 93LC46AT-E/SN reliable?
The price and inventory of 93LC46AT-E/SN are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 93LC46AT-E/SN is usually 5 days.
3.What payment methods are accepted for 93LC46AT-E/SN?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 93LC46AT-E/SN transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 93LC46AT-E/SN?
93LC46AT-E/SN orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 93LC46AT-E/SN order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 93LC46AT-E/SN?
For technical support, including 93LC46AT-E/SN datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 93LC46AT-E/SN requirements.
6.How does Aetrix verify that 93LC46AT-E/SN is sourced from the original manufacturer or authorized distributors?
All 93LC46AT-E/SN products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 93LC46AT-E/SN meets industry standards.
7.What is the process for return or replacement of 93LC46AT-E/SN?
All 93LC46AT-E/SN units undergo pre-shipment inspection (PSI). If there is an issue with 93LC46AT-E/SN, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 93LC46AT-E/SN part is unused and in its original packaging.
Return procedure for 93LC46AT-E/SN:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
93LC46AT-E/SN Tags
-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology
-
AT21CS01-STUM10-T
Microchip Technology
-
AT24C02C-SSHM-T
Microchip Technology
-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics
-
AT24CS02-SSHM-T
Microchip Technology
-
93LC46BT-I/OT
Microchip Technology
-
AT24C04C-SSHM-T
Microchip Technology
-
24LC01BT-I/SN
Microchip Technology
-
24AA02UIDT-I/OT
Microchip Technology
-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
