Microchip Technology 93LC46AT-I/ST
- Part No.:
- 93LC46AT-I/ST
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
93LC46AT-I/ST.pdf
- Description:
- IC EEPROM 1KBIT MICROWIRE 8TSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
93LC46AT-I/ST from Microchip Technology Inc. is a 1 Kbit (128 × 8-bit) low-voltage serial EEPROM with Microwire-compatible 3-wire interface, operating from 2.5 V to 5.5 V, rated for industrial temperature range (−40°C to +85°C), and housed in an 8-lead TSSOP package. It features self-timed erase/write cycles, automatic ERAL before WRAL, power-on/off data protection, and Ready/Busy status signaling via DO pin - used for configuration storage in microcontroller-based embedded systems.
For engineers reviewing the 93LC46AT-I/ST datasheet, 93LC46AT-I/ST pinout, 93LC46AT-I/ST application, or 93LC46AT-I/ST equivalent, key selection criteria include voltage compatibility (2.5–5.5 V), 8-bit fixed organization (no ORG pin), TSSOP-8 footprint, 1 million endurance cycles, and support for sequential read and status polling during write operations.
Technical Context
The 93LC46AT-I/ST implements a synchronous serial Microwire interface with CS, CLK, and DI/DO pins - no ORG pin (dedicated 8-bit x128 organization). It uses internal auto-erase-before-write logic and supports full-array ERAL and WRAL commands, both requiring VCC ≥ 4.5 V for execution.
Its timing is defined by strict AC parameters: max clock frequency of 3 MHz at VCC ≥ 4.5 V, TPD ≤ 200 ns (CL = 100 pF), and TWC = 6 ms for erase/write cycles. Power management includes standby current ≤ 1 µA (I-temp) and built-in VCC voltage detect (VPOR = 1.5 V typical) for data protection during brown-out.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory size | 1 Kbit (128 × 8-bit) - fixed x8 organization; no ORG pin; no word-size reconfiguration. |
| VCC range | 2.5 V to 5.5 V - supports wide supply rails; VPOR threshold at 1.5 V prevents corruption during power ramp. |
| Endurance | 1,000,000 erase/write cycles - ensures long-term reliability in frequent configuration updates. |
| Data retention | 200 years - enables permanent storage without refresh in battery-free or low-power applications. |
| Interface | Microwire-compatible 3-wire serial (CS, CLK, DI/DO) - minimal GPIO usage; no SPI mode or dual I/O. |
| Temp range | −40°C to +85°C (Industrial grade) - validated for operation across extended ambient conditions. |
| Package | 8-lead TSSOP (ST) - 4.4 mm × 3.0 mm footprint; RoHS-compliant matte tin finish; Pb-free. |
Pinout & Package
8-lead TSSOP (ST) package with exposed pad option (not electrically connected per datasheet); pin 1 marked by laser dot; JEDEC-standard dimensions (4.4 mm × 3.0 mm × 1.2 mm height).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (CS) | Chip Select | Active-high enable; must be held low ≥250 ns between instructions; initiates self-timed cycle on falling edge (93LC versions). |
| 2 (CLK) | Serial Clock | Synchronizes all data transfers; rising-edge sampling for DI/DO; stoppable mid-sequence without state loss. |
| 3 (DI) | Data Input | Accepts Start bit, opcode, address, and write data; shares net with DO only if external series resistor used. |
| 4 (DO) | Data Output / Status | Outputs read data or Ready/Busy status (low = busy); enters High-Z on CS falling edge. |
| 5 (VSS) | Ground | Reference return path; must be low-impedance; exposed pad (if present) may be tied to VSS. |
| 6 (NC) | No Connection | Internally unconnected; must be left floating or tied to VSS per layout best practice. |
| 7 (ORG) | Organization select | Not present on 93LC46A/B devices - pin is NC; unused and must not be driven. |
| 8 (VCC) | Power Supply | Core supply input; powers internal logic and memory array; decoupling capacitor required near pin. |
Key Features
| Feature | Design Value |
|---|---|
| Self-timed erase/write | Eliminates need for external timing control; 6 ms typical cycle time ensures predictable latency. |
| Automatic ERAL before WRAL | Guarantees clean memory state prior to full-array write - prevents partial-data corruption. |
| Power-on/off data protection | Hardware-level lockout below VPOR (1.5 V) prevents inadvertent writes during power transitions. |
| Ready/Busy status via DO | Enables non-blocking firmware polling instead of fixed delays - improves system responsiveness. |
| Sequential read mode | Allows continuous address incrementing while CS remains high - reduces instruction overhead for bulk reads. |
Applications
| Microcontroller Configuration Storage | Industrial Sensor Calibration Data |
|---|---|
Use Scenario: Storing boot-time configuration (baud rate, I²C address, sensor gain) for an ARM Cortex-M0+ MCU in a programmable logic controller. IC Role / Device Role / Timing Role: Nonvolatile parameter register accessed during startup and runtime; supports single-byte or burst reads via Microwire. Use Value: Enables field-upgradable settings without firmware reflashing; 200-year retention ensures calibration stability over product lifetime. | Use Scenario: Holding factory-trimmed offset/gain coefficients for a 4–20 mA analog sensor transmitter operating in harsh environments. IC Role / Device Role / Timing Role: Calibration memory mapped into host MCU's peripheral space via bit-banged Microwire; accessed only during sensor initialization. Use Value: Eliminates need for external trimming components; 1M endurance supports recalibration during maintenance cycles. |
| Consumer Appliance Settings Backup | Medical Device Usage Logs |
Use Scenario: Preserving user preferences (temperature setpoint, timer duration, display brightness) in a smart HVAC thermostat. IC Role / Device Role / Timing Role: Low-power backup memory updated infrequently; operates at 3.3 V with <1 µA standby current. Use Value: Maintains settings through power loss; 2.5 V minimum VCC allows direct connection to Li-ion battery-backed rail. | Use Scenario: Recording timestamped operational events (power-on count, error codes, self-test results) in a portable ECG monitor. IC Role / Device Role / Timing Role: Event logger with wear-leveling handled in firmware; uses WRAL for periodic log reset. Use Value: Provides traceable device history compliant with IEC 62304; 200-year retention satisfies regulatory archival requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 93LC46B-I/ST | 128 × 16-bit (x16) organization; same VCC range, package, and temp grade. | Requires 16-bit data bus alignment; incompatible with existing 8-bit firmware read/write routines. | Select only when system architecture mandates 16-bit word access and software can be modified accordingly. |
| AT25010B-MAHL-T | SPI interface (4-wire), 1 Kbit (128 × 8), 1.8–5.5 V, SOIC-8 package; no Ready/Busy pin. | Lacks DO-based status polling - requires fixed 5 ms delay after write; different command set and timing model. | Choose when migrating to SPI-based platforms or when board layout already accommodates SOIC-8 and fixed-delay timing is acceptable. |
Compared with 93LC46B-I/ST, the 93LC46AT-I/ST provides native 8-bit compatibility without address remapping; versus AT25010B-MAHL-T, it offers hardware status feedback and Microwire simplicity but requires dedicated CS/CLK/DI/DO routing.
Availability
93LC46AT-I/ST is available at Aetrix Electronics and suitable for industrial control systems, medical instrumentation, consumer appliance design, and automotive body electronics requiring stable component supply and long-lifecycle support.
Supply support for 93LC46AT-I/ST includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology Inc. is a leading provider of microcontrollers, analog components, and memory solutions, headquartered in Chandler, Arizona.
The 93LC46A/B/C family was designed specifically for cost-sensitive, low-power embedded systems needing reliable, small-footprint serial EEPROM with robust data integrity features.
FAQ
What is the memory organization of the 93LC46AT-I/ST?
The 93LC46AT-I/ST has a fixed 128 × 8-bit (x8) organization. It belongs to the 'A' variant of the 93LC46 series and does not include an ORG pin - meaning word size cannot be changed. This differs from 'C' variants (e.g., 93LC46C) which use the ORG pin to switch between x8 and x16 modes. The 93LC46AT-I/ST is optimized for byte-oriented data storage and retrieval.
Does the 93LC46AT-I/ST support SPI communication?
No, the 93LC46AT-I/ST does not support SPI. It implements a Microwire-compatible 3-wire serial interface (CS, CLK, DI/DO) with distinct command opcodes and timing. While functionally similar to SPI in using clocked serial data, it lacks MOSI/MISO separation and uses a shared bidirectional data line with specific start-bit detection and status reporting via DO. Firmware must follow Microwire protocol, not SPI frame formats.
What is the maximum clock frequency supported by the 93LC46AT-I/ST?
The 93LC46AT-I/ST supports a maximum clock frequency of 3 MHz when VCC is between 4.5 V and 5.5 V. At lower voltages (2.5 V ≤ VCC < 4.5 V), the maximum clock frequency drops to 2 MHz. These limits are specified in Table 1-2 of the datasheet and apply across the full industrial temperature range (−40°C to +85°C). Exceeding these frequencies may result in unreliable command execution or data corruption.
Can the 93LC46AT-I/ST be used in automotive applications?
The 93LC46AT-I/ST is rated for Industrial temperature range (−40°C to +85°C), not Automotive (−40°C to +125°C). While it may function thermally in some under-hood or cabin environments, it is not qualified to AEC-Q100 or automotive reliability standards. For automotive use, Microchip specifies the 'E' grade variants (e.g., 93LC46AT-E/ST), which undergo additional stress testing and screening. Using the 93LC46AT-I/ST in automotive designs may compromise long-term reliability and warranty compliance.
How is data protection implemented in the 93LC46AT-I/ST?
Data protection in the 93LC46AT-I/ST is implemented through multiple hardware mechanisms: (1) Power-on/off detection with VPOR ≈ 1.5 V - disabling all write operations below this threshold; (2) Erase/Write Disable (EWDS) mode at power-up, requiring explicit EWEN command before programming; (3) Automatic ERAL before WRAL to prevent partial writes; and (4) CS-controlled standby mode that halts operations during inactive periods. These features collectively prevent accidental or corrupted writes during power transitions or noise events.
93LC46AT-I/ST Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 1Kbit
- Memory Organization:
- 128 x 8
- Memory Interface:
- Microwire
- Clock Frequency:
- 2 MHz
- Write Cycle Time - Word, Page:
- 6ms
- Access Time:
- -
- Voltage - Supply:
- 2.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-TSSOP
93LC46AT-I/ST FAQ
1.How can I place an order for 93LC46AT-I/ST through Aetrix?
Please submit a Request for Quotation (RFQ) for 93LC46AT-I/ST on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 93LC46AT-I/ST reliable?
The price and inventory of 93LC46AT-I/ST are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 93LC46AT-I/ST is usually 5 days.
3.What payment methods are accepted for 93LC46AT-I/ST?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 93LC46AT-I/ST transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 93LC46AT-I/ST?
93LC46AT-I/ST orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 93LC46AT-I/ST order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 93LC46AT-I/ST?
For technical support, including 93LC46AT-I/ST datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 93LC46AT-I/ST requirements.
6.How does Aetrix verify that 93LC46AT-I/ST is sourced from the original manufacturer or authorized distributors?
All 93LC46AT-I/ST products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 93LC46AT-I/ST meets industry standards.
7.What is the process for return or replacement of 93LC46AT-I/ST?
All 93LC46AT-I/ST units undergo pre-shipment inspection (PSI). If there is an issue with 93LC46AT-I/ST, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 93LC46AT-I/ST part is unused and in its original packaging.
Return procedure for 93LC46AT-I/ST:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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