Microchip Technology 93LC46B-E/MS
- Part No.:
- 93LC46B-E/MS
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
- Datasheet:
-
93LC46B-E/MS.pdf
- Description:
- IC EEPROM 1KBIT MICROWIRE 8MSOP
- Quantity:
- Payment:

- Shipping:

Inventory:4,803
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
93LC46B-E/MS from Microchip Technology Inc. is a 1Kbit (64 × 16-bit) low-voltage serial EEPROM with Microwire-compatible 3-wire interface, operating from 2.5V to 5.5V, rated for automotive temperature range (−40°C to +125°C), and packaged in an 8-lead MSOP. It features self-timed erase/write cycles, automatic ERAL before WRAL, and Ready/Busy status signaling via DO pin - used in automotive body control modules for storing calibration data and configuration settings.
For engineers reviewing the 93LC46B-E/MS datasheet, 93LC46B-E/MS pinout, 93LC46B-E/MS application, or 93LC46B-E/MS equivalent, key selection considerations include its 16-bit organization (fixed, no ORG pin), automotive-grade reliability, 6 ms program cycle time, 1M endurance cycles, and compatibility with microcontroller SPI-like Microwire masters in space-constrained automotive PCBs.
Technical Context
The 93LC46B-E/MS implements a synchronous serial Microwire interface with CS, CLK, DI, and DO pins - no ORG pin (dedicated x16 mode). Communication uses 9- or 18-clock-cycle instructions (e.g., READ requires 18 clocks for 16-bit output plus dummy zero), with DO providing both data output and Ready/Busy status polling during erase/write operations.
It employs CMOS EEPROM technology with on-chip charge pump for write/erase, power-on/off protection circuitry that inhibits operation below 2.5V, and EWEN/EWDS command-based write protection. All programming requires prior EWEN; after each write, best practice recommends issuing EWDS to prevent accidental overwrites.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 1 Kbit (64 words × 16 bits) - fixed x16 organization; no ORG pin; supports 16-bit data transfers per READ/WRITE. |
| VCC Range | 2.5V to 5.5V - compatible with 3.3V and 5V systems; enables direct interfacing with automotive MCUs without level-shifting. |
| Temperature Grade | Automotive (E): −40°C to +125°C - qualified for under-hood and body control unit deployment. |
| Write Cycle Time | 6 ms typical - self-timed; eliminates need for external timing control; allows host MCU to poll DO for completion. |
| Endurance | 1,000,000 erase/write cycles - ensures long-term reliability in firmware update or parameter logging applications. |
| Data Retention | 200 years at +25°C - guarantees nonvolatile storage integrity across vehicle lifetime without refresh. |
| Interface | Microwire-compatible 3-wire serial (CS, CLK, DI/DO) - minimal GPIO usage; supports daisy-chaining only via external logic (no built-in daisy-chain mode). |
Pinout & Package
8-lead MSOP (Micro Small Outline Package), 3.0 mm × 3.0 mm body, 0.65 mm pitch, exposed pad optional (not electrically connected per datasheet Note 1). Pin 1 marked by laser dot; pin 1 ID corner matches standard MSOP orientation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | CS | Chip Select - active-high enable; must be held low ≥250 ns between instructions; initiates self-timed write on falling edge (93LC series). |
| 2 | CLK | Serial Clock - rising-edge synchronized I/O; clocking may pause mid-transfer; not required during auto-erase/write. |
| 3 | DI | Data Input - receives Start bit, opcodes, addresses, and write data; tied high with CS and CLK rising edge to initiate instruction. |
| 4 | DO | Data Output / Status - outputs read data or Ready/Busy (low = busy); enters High-Z when CS goes low; status valid only if CS reasserted after TCSL. |
| 5 | VSS | Ground - reference for all signals; exposed pad (if used) must connect to VSS or float per datasheet. |
| 6 | NC | No Internal Connection - unconnected silicon; must remain floating; not usable as strap or debug pin. |
| 7 | VCC | Power Supply - supplies core and charge pump; voltage detect threshold is 2.5V min for operation; POR circuit blocks writes below this. |
| 8 | ORG | No Internal Connection - absent on 'B' variants; pin 6 is NC, not ORG; confirmed by Device Selection Table and Pin Function Table. |
Key Features
| Feature | Design Value |
|---|---|
| Self-timed Erase/Write | Eliminates external timing circuitry; host MCU polls DO pin instead of managing fixed delays - simplifies firmware and improves robustness. |
| Automatic ERAL before WRAL | Ensures full array erase prior to Write All; prevents partial-write corruption without requiring separate ERAL command in software flow. |
| Power-On/Off Data Protection | Hardware-level inhibition below 2.5V prevents spurious writes during brown-out or power ramp - critical for automotive ECU reliability. |
| Ready/Busy Status via DO | Enables efficient polling-based operation without dedicated status lines; reduces pin count and PCB routing complexity. |
| 1,000,000 Endurance Cycles | Supports frequent field updates (e.g., odometer, diagnostic logs) over full vehicle service life without wear-out concerns. |
Applications
| Instrument Cluster Calibration Storage | Body Control Module Configuration |
|---|---|
Use Scenario: Storing factory-set analog trim values, display brightness offsets, and gear position sensor calibration coefficients in automotive instrument clusters. IC Role / Device Role / Timing Role: Nonvolatile parameter storage accessed infrequently during startup or service mode; interfaces via Microwire to cluster MCU. Use Value: Enables precise analog compensation without external DAC trimming; retains values across battery disconnects and 15+ year vehicle lifespan. | Use Scenario: Holding door lock timeout settings, window auto-up/down thresholds, and mirror fold/unfold positions in BCM firmware. IC Role / Device Role / Timing Role: Configuration EEPROM accessed during BCM boot and user preference changes; operates within automotive E-temp range. Use Value: Allows OEM customization without firmware reflash; supports dealer-level personalization and regional variant configuration. |
| Engine Control Unit Diagnostic Log | Infotainment System Language Pack |
Use Scenario: Recording last 10 engine fault codes, freeze-frame data, and MIL activation timestamps for OBD-II compliance. IC Role / Device Role / Timing Role: Cyclic write buffer with wear leveling handled in MCU firmware; erased only during service reset. Use Value: Meets SAE J1979 requirements for persistent DTC storage; survives 1M+ ignition cycles with guaranteed 200-year retention. | Use Scenario: Storing localized UI strings, voice prompt audio metadata, and font glyph mapping for multi-language infotainment head units. IC Role / Device Role / Timing Role: Read-mostly storage updated only during OTA language pack installation; accessed sequentially during UI initialization. Use Value: Reduces main Flash memory wear; enables fast language switching without full system reboot or Flash erase latency. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 93LC46B-I/MS | Industrial temp range (−40°C to +85°C); identical electrical specs, pinout, and package. | Not qualified for under-hood or transmission-control environments requiring E-grade thermal performance. | Select only for cabin-mounted modules where ambient max is ≤85°C. |
| AT25010B-MAHL-T | SPI interface (4-wire), 1 MHz max clock, 5 ms write time, SOIC-8 package; no Ready/Busy pin - uses WIP flag in status register. | Requires SPI master support and additional GPIO for chip select; lacks direct DO-status polling - increases firmware complexity. | Choose when existing design uses SPI peripherals and board layout already accommodates SOIC-8 footprint. |
Compared with 93LC46B-I/MS, the 93LC46B-E/MS adds automotive qualification without trade-offs in speed or endurance; versus AT25010B-MAHL-T, it offers simpler status monitoring and lower pin count but requires Microwire-compatible controller logic instead of standard SPI.
Availability
93LC46B-E/MS is available at Aetrix Electronics and suitable for automotive body control modules, instrument cluster calibration storage, and engine diagnostic log retention requiring stable component supply across extended production lifecycles.
Supply support for 93LC46B-E/MS includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology Inc. is a leading provider of microcontrollers, analog devices, and memory solutions, headquartered in Chandler, Arizona, with global manufacturing and support infrastructure.
The 93LC46B-E/MS belongs to Microchip's legacy 93XX serial EEPROM product line, designed specifically for cost-sensitive, space-constrained automotive and industrial applications requiring reliable nonvolatile storage with minimal interface overhead.
FAQ
What is the memory organization of the 93LC46B-E/MS?
The 93LC46B-E/MS has a fixed 64 × 16-bit (1Kbit) organization - it is a 'B' variant, so the ORG pin is not functional and the device always operates in 16-bit mode. This is confirmed in the Device Selection Table and Pin Function Table, where ORG is listed as NC for 93LC46B parts. No external configuration is needed to select word size.
Does the 93LC46B-E/MS require an external pull-up resistor on the DO pin?
No, the 93LC46B-E/MS does not require an external pull-up on DO. The DO pin actively drives high/low during READ and Ready/Busy status reporting, and enters High-Z when CS is low or during non-read states. A pull-up is unnecessary and could interfere with status polling accuracy.
Can the 93LC46B-E/MS be used with a standard SPI master?
The 93LC46B-E/MS uses a Microwire-compatible 3-wire interface (CS, CLK, DI/DO), not standard SPI. While functionally similar, it lacks an independent MISO/MOSI pair and uses DO for bidirectional data/status. Direct connection to SPI hardware requires firmware adaptation - e.g., bit-banging or configuring MOSI/MISO as open-drain with direction control - because true SPI mode is not supported.
What is the minimum VCC required for write operations on the 93LC46B-E/MS?
The 93LC46B-E/MS requires VCC ≥ 2.5V to enable write operations, as specified in the Power-On Reset (VPOR) parameter (D11) and Electrical Characteristics table. Below 2.5V, the internal protection circuitry inhibits all erase/write functions - ensuring data integrity during brown-out conditions in automotive power systems.
Is the exposed pad on the MSOP package of the 93LC46B-E/MS electrically connected?
No, the exposed pad on the 8-lead MSOP package of the 93LC46B-E/MS is not electrically connected to any internal node. Per DS20001749K-page 12 Note 1, it may be connected to VSS for thermal enhancement or left floating - no electrical functionality is assigned to it, and soldering it to ground does not affect device operation.
93LC46B-E/MS Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 1Kbit
- Memory Organization:
- 64 x 16
- Memory Interface:
- Microwire
- Clock Frequency:
- 2 MHz
- Write Cycle Time - Word, Page:
- 6ms
- Access Time:
- -
- Voltage - Supply:
- 2.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-MSOP
93LC46B-E/MS FAQ
1.How can I place an order for 93LC46B-E/MS through Aetrix?
Please submit a Request for Quotation (RFQ) for 93LC46B-E/MS on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 93LC46B-E/MS reliable?
The price and inventory of 93LC46B-E/MS are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 93LC46B-E/MS is usually 5 days.
3.What payment methods are accepted for 93LC46B-E/MS?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 93LC46B-E/MS transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 93LC46B-E/MS?
93LC46B-E/MS orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 93LC46B-E/MS order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 93LC46B-E/MS?
For technical support, including 93LC46B-E/MS datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 93LC46B-E/MS requirements.
6.How does Aetrix verify that 93LC46B-E/MS is sourced from the original manufacturer or authorized distributors?
All 93LC46B-E/MS products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 93LC46B-E/MS meets industry standards.
7.What is the process for return or replacement of 93LC46B-E/MS?
All 93LC46B-E/MS units undergo pre-shipment inspection (PSI). If there is an issue with 93LC46B-E/MS, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 93LC46B-E/MS part is unused and in its original packaging.
Return procedure for 93LC46B-E/MS:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
93LC46B-E/MS Tags

-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology

-
AT21CS01-STUM10-T
Microchip Technology

-
AT24C02C-SSHM-T
Microchip Technology

-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics

-
AT24CS02-SSHM-T
Microchip Technology

-
93LC46BT-I/OT
Microchip Technology

-
AT24C04C-SSHM-T
Microchip Technology

-
24LC01BT-I/SN
Microchip Technology

-
24AA02UIDT-I/OT
Microchip Technology

-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

