Microchip Technology 93LC46BT-E/SN
- Part No.:
- 93LC46BT-E/SN
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
93LC46BT-E/SN.pdf
- Description:
- IC EEPROM 1KBIT MICROWIRE 8SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
93LC46BT-E/SN from Microchip Technology Inc. is a 1Kbit (128 × 8-bit) low-voltage serial EEPROM with Microwire-compatible 3-wire interface, operating from 2.5V to 5.5V, rated for automotive temperature range (−40°C to +125°C), and housed in an 8-lead SOIC package (SN). It delivers self-timed erase/write cycles, automatic ERAL/WRAL support, and 1 million endurance cycles - used for configuration storage in engine control units, infotainment boot loaders, and sensor calibration data retention.
For engineers reviewing the 93LC46BT-E/SN datasheet, 93LC46BT-E/SN pinout, 93LC46BT-E/SN application, or 93LC46BT-E/SN equivalent, key selection criteria include its automotive-grade temperature rating, dedicated 8-bit organization (no ORG pin), 3-wire serial protocol compatibility, standby current ≤5 µA, and RoHS-compliant Pb-free Matte Tin finish.
Technical Context
The 93LC46BT-E/SN implements a synchronous Microwire-compatible serial interface with CS, CLK, and DI/DO pins - no ORG pin (fixed 8-bit x128 organization). It uses CMOS EEPROM technology with on-chip charge pump for write/erase, requiring no external high-voltage supply. All operations are initiated via clocked instruction sequences beginning with a Start bit (CS high + DI high on CLK rising edge).
It features hardware-based power-on/off data protection, automatic ERAL (Erase All) before WRAL (Write All), and Ready/Busy status polling via DO pin during programming. Write cycle time is 6 ms (typical), with VCC detect threshold at 1.5 V for POR, and supports sequential read without reissuing address.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 1 Kbit (128 × 8-bit); fixed x8 organization - no ORG pin required, simplifies PCB layout and firmware addressing. |
| VCC Range | 2.5 V to 5.5 V; supports wide input rail - compatible with 3.3 V and 5 V systems without level shifting. |
| Endurance | 1,000,000 erase/write cycles; ensures long-term reliability in field-updatable automotive subsystems. |
| Data Retention | 200 years at +85°C; guarantees nonvolatile storage integrity over full vehicle lifecycle. |
| Interface | Microwire-compatible 3-wire serial (CS/CLK/DI/DO); minimal GPIO usage, interoperable with legacy MCU peripherals. |
| Temp Range | −40°C to +125°C (Automotive E grade); qualified for under-hood and infotainment module deployment. |
| Standby Current | ≤5 µA at I-temp, ≤5 µA at E-temp (VCC = 2.5–5.5 V); enables ultra-low-power battery-backed operation. |
Pinout & Package
8-lead SOIC package (SN suffix), Pb-free Matte Tin finish, 150-mil body width, standard pinout with no internal connection on Pin 7 (NC). Pin 6 is NC (not ORG) - consistent with 'B' and 'A' variants lacking memory configuration pin.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (CS) | Chip Select | Active-high enable; must be held ≥250 ns low between instructions; initiates self-timed write on falling edge (93LC series). |
| 2 (CLK) | Serial Clock | Synchronizes all data transfers; rising-edge sampled for opcode/address/data; stoppable mid-sequence. |
| 3 (DI) | Data Input | Accepts Start bit, opcodes (e.g., 01 for WRITE), addresses (A6–A0), and data (D7–D0); no bus conflict risk when isolated from DO. |
| 4 (DO) | Data Output / Status | Outputs read data (D7–D0) or Ready/Busy (low = busy); enters High-Z when CS low or after status polling. |
| 5 (VSS) | Ground | Reference return path; must be low-impedance; ties to system GND plane. |
| 6 (NC) | No Internal Connection | Unbonded pad - left floating or tied to GND per layout best practice; not ORG (unlike 'C' variants). |
| 7 (NC) | No Internal Connection | Unbonded pad - no electrical function; avoid routing signals or vias beneath. |
| 8 (VCC) | Power Supply | 2.5–5.5 V supply; includes internal POR circuit triggering at ~1.5 V; requires local 0.1 µF decoupling. |
Key Features
| Feature | Design Value |
|---|---|
| Self-timed Erase/Write | 6 ms typical cycle time with auto-erase - eliminates need for external timing control or polling delays beyond DO status check. |
| Automatic ERAL before WRAL | Ensures full-array readiness prior to bulk write - prevents partial writes and data corruption without firmware intervention. |
| Power-On/Off Data Protection | Hardware lockout below 1.5 V VCC - prevents inadvertent writes during brown-out or hot-plug events. |
| Erase/Write Enable/Disable (EWEN/EWDS) | Explicit command gating - forces intentional enable before any programming, reducing risk of accidental overwrites in runtime code. |
| Sequential Read Mode | Continuous address increment on DO while CS remains high - reduces instruction overhead for block reads (e.g., config tables). |
Applications
| Engine Control Unit (ECU) | Infotainment Boot Loader |
|---|---|
Use Scenario: Storing trim values for fuel injection timing, knock sensor thresholds, and OBD-II fault codes across ignition cycles. IC Role / Device Role / Timing Role: Nonvolatile configuration register holding calibrated parameters updated only during dealer reprogramming or adaptive learning. Use Value: 200-year data retention and −40°C to +125°C operation ensure parameter persistence across 15+ year vehicle service life without backup power. |
Use Scenario: Holding secure boot keys, firmware hash signatures, and UI language/locale settings in head-unit main processor. IC Role / Device Role / Timing Role: Secure, tamper-resistant storage for immutable boot assets accessed early in power-on reset sequence. Use Value: Microwire interface allows direct connection to ARM Cortex-M boot ROM peripherals; 1M endurance supports frequent OTA update metadata logging. |
| ADAS Camera Module | Body Control Module (BCM) |
Use Scenario: Saving lens focus offsets, white balance coefficients, and ISP pipeline configuration per camera unit during factory calibration. IC Role / Device Role / Timing Role: Factory-programmed calibration data store accessed once per power cycle during sensor initialization. Use Value: Fixed 8-bit x128 organization matches typical calibration data packet size; SOIC package enables automated optical inspection and reflow compatibility. |
Use Scenario: Retaining user preferences (window position, mirror angle, lighting profiles) and diagnostic trouble codes in door modules and junction boxes. IC Role / Device Role / Timing Role: Low-power persistent memory accessed intermittently via LIN or CAN gateway microcontroller. Use Value: ≤5 µA standby current extends battery life in sleep mode; RoHS-compliant Matte Tin finish meets automotive ELV directive requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 93LC46AT-E/SN | Same 1Kbit x8 EEPROM, but Industrial temp range (−40°C to +85°C); identical pinout and timing. | Not qualified for under-hood or high-ambient zones; suitable for cabin-mounted modules only. | Select if cost-sensitive and operating environment stays below +85°C ambient - avoids automotive qualification overhead. |
| AT25010B-MAHL-T | SPI interface (4-wire), 1 Kbit x8, 1.8–5.5 V, −40°C to +125°C, same SOIC-8 package. | Requires SPI peripheral instead of Microwire; lacks ERAL/WRAL atomic commands; different instruction set. | Choose when migrating to SPI-based platforms or consolidating with other Atmel SPI EEPROMs - verify firmware driver compatibility. |
Compared with 93LC46AT-E/SN, the 93LC46BT-E/SN provides guaranteed automotive temperature operation and tighter VCC POR threshold (1.5 V vs. same), while AT25010B-MAHL-T offers SPI flexibility at the cost of losing Microwire-native atomic erase-all functionality.
Availability
93LC46BT-E/SN is available at Aetrix Electronics and suitable for automotive control units, infotainment systems, and ADAS modules requiring stable component supply with full AEC-Q200-aligned traceability and extended lifecycle support.
Supply support for 93LC46BT-E/SN includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology Inc. is a leading provider of microcontrollers, analog devices, and memory solutions, headquartered in Chandler, Arizona, with global design and manufacturing operations.
The 93LC46B series belongs to Microchip's legacy Microwire EEPROM product line, designed specifically for cost-sensitive, low-pin-count nonvolatile storage in automotive and industrial systems where simplicity, reliability, and qualification rigor are critical.
FAQ
What is the memory organization of the 93LC46BT-E/SN?
The 93LC46BT-E/SN is a fixed 128 × 8-bit (1 Kbit) EEPROM with no ORG pin - it operates exclusively in x8 mode. Unlike 'C' variants, it does not support x16 configuration. This simplifies firmware development and eliminates external logic for word-size selection. The 93LC46BT-E/SN datasheet confirms dedicated 8-bit communication and absence of ORG functionality.
Does the 93LC46BT-E/SN support automatic erase before write?
Yes, the 93LC46BT-E/SN performs self-timed auto-erase prior to each WRITE or WRAL operation - no separate ERASE command is needed. This is intrinsic to its architecture and documented in DS20001749K, Section 2.8. The 93LC46BT-E/SN completes the full cycle in 6 ms (typical), with DO indicating Ready/Busy status during execution.
What is the maximum clock frequency supported by the 93LC46BT-E/SN?
The 93LC46BT-E/SN supports up to 3 MHz clock frequency when VCC is 4.5 V to 5.5 V, and 2 MHz at 2.5 V to 4.5 V (per Table 1-2, Param A1). Its AC timing is fully characterized across the automotive temperature range, ensuring reliable operation in real-world ECU environments where clock jitter and voltage droop occur.
Is the 93LC46BT-E/SN pin-compatible with the 93LC46AT-E/SN?
Yes, the 93LC46BT-E/SN and 93LC46AT-E/SN share identical 8-lead SOIC (SN) packaging, pinout, and electrical interface - including CS, CLK, DI, DO, VSS, NC, NC, VCC. The only functional difference is temperature grade: 'T-E' denotes Automotive (−40°C to +125°C), while 'T-I' denotes Industrial (−40°C to +85°C). No PCB changes are required for substitution within thermal limits.
How is data protection implemented in the 93LC46BT-E/SN during power transitions?
The 93LC46BT-E/SN incorporates hardware-level power-on/power-off protection: internal circuitry inhibits all write operations when VCC falls below ~1.5 V (VPOR parameter, D11). Additionally, it powers up in EWDS (Erase/Write Disable) state, requiring explicit EWEN command before programming - preventing corruption during brown-out or reset sequences. These mechanisms are defined in Sections 2.3 and 2.6 of the 93LC46BT-E/SN datasheet.
93LC46BT-E/SN Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 1Kbit
- Memory Organization:
- 64 x 16
- Memory Interface:
- Microwire
- Clock Frequency:
- 2 MHz
- Write Cycle Time - Word, Page:
- 6ms
- Access Time:
- -
- Voltage - Supply:
- 2.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
93LC46BT-E/SN FAQ
1.How can I place an order for 93LC46BT-E/SN through Aetrix?
Please submit a Request for Quotation (RFQ) for 93LC46BT-E/SN on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 93LC46BT-E/SN reliable?
The price and inventory of 93LC46BT-E/SN are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 93LC46BT-E/SN is usually 5 days.
3.What payment methods are accepted for 93LC46BT-E/SN?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 93LC46BT-E/SN transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 93LC46BT-E/SN?
93LC46BT-E/SN orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 93LC46BT-E/SN order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 93LC46BT-E/SN?
For technical support, including 93LC46BT-E/SN datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 93LC46BT-E/SN requirements.
6.How does Aetrix verify that 93LC46BT-E/SN is sourced from the original manufacturer or authorized distributors?
All 93LC46BT-E/SN products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 93LC46BT-E/SN meets industry standards.
7.What is the process for return or replacement of 93LC46BT-E/SN?
All 93LC46BT-E/SN units undergo pre-shipment inspection (PSI). If there is an issue with 93LC46BT-E/SN, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 93LC46BT-E/SN part is unused and in its original packaging.
Return procedure for 93LC46BT-E/SN:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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