Microchip Technology 93LC46BT-I/MNY
- Part No.:
- 93LC46BT-I/MNY
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-WFDFN Exposed Pad
- Datasheet:
-
93LC46BT-I/MNY.pdf
- Description:
- IC EEPROM 1KBIT MICROWIRE 8TDFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
93LC46BT-I/MNY from Microchip Technology Inc. is a 1 Kbit (128 × 8-bit) low-voltage serial EEPROM with Microwire-compatible 3-wire interface, operating from 2.5 V to 5.5 V, rated for industrial temperature range (−40°C to +85°C), and housed in an 8-lead MSOP package. It features self-timed erase/write cycles, automatic ERAL before WRAL, power-on/off data protection, and Ready/Busy status signaling via DO pin - used for configuration storage in microcontroller-based embedded systems.
For engineers reviewing the 93LC46BT-I/MNY datasheet, 93LC46BT-I/MNY pinout, 93LC46BT-I/MNY application, or 93LC46BT-I/MNY equivalent, key selection considerations include its 8-bit fixed organization (no ORG pin), 3 MHz max clock frequency at VCC ≥ 4.5 V, 6 ms typical write cycle time, 1 million endurance cycles, and compatibility with legacy Microwire host controllers requiring minimal GPIO overhead.
Technical Context
The 93LC46BT-I/MNY implements a synchronous serial interface using CS, CLK, and DI/DO pins with start-bit detection and opcode-driven command execution. Its internal architecture includes an address decoder, mode decode logic, and output buffer, supporting READ, WRITE, ERASE, ERAL, EWEN, and EWDS instructions - all executed with precise timing governed by TCSL (250 ns min), TPD (≤400 ns), and TWC (6 ms).
It operates exclusively in x8 mode (no ORG pin function), uses rising-edge clocking for data input/output, and asserts Ready/Busy status on DO during programming - requiring CS high after TCSL to sample status. Power-on reset disables writes until EWEN is issued, and VCC brown-out detection (VPOR = 1.5 V) prevents corruption below safe voltage.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory size | 1 Kbit (128 × 8-bit) - fixed x8 organization; no ORG pin; supports 128-byte configuration storage. |
| VCC range | 2.5 V to 5.5 V - compatible with 3.3 V and 5 V systems; VPOR = 1.5 V ensures data integrity during power ramp. |
| Interface | Microwire-compatible 3-wire serial (CS, CLK, DI/DO) - requires only three MCU GPIOs; no SPI mode or SS pin needed. |
| Write cycle time | 6 ms typical (TWC) - self-timed; eliminates need for external delay or polling overhead beyond DO status check. |
| Endurance | 1,000,000 erase/write cycles - sufficient for firmware parameter logging, calibration data, or infrequent user settings updates. |
| Data retention | >200 years at 25°C - meets long-life requirements for industrial control, metering, and automotive ECUs. |
| Temp range | −40°C to +85°C (Industrial grade) - validated across full range for reliable operation in harsh environments. |
Pinout & Package
Package: 8-lead MSOP (MS) - 3.0 mm × 3.0 mm body, 0.65 mm pitch, exposed pad optional (VSS or floating), RoHS-compliant matte tin finish.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (CS) | Chip Select | Active-high enable; must be held low ≥250 ns between commands; deselects device into standby (ICCS ≤ 5 µA). |
| 2 (CLK) | Serial Clock | Rising-edge synchronized I/O; supports up to 3 MHz (VCC ≥ 4.5 V); stoppable at any point without state loss. |
| 3 (DI) | Data Input | Accepts start bit, opcode, address, and data; tied to DO in shared-bus designs (requires series resistor to avoid conflict). |
| 4 (DO) | Data Output / Status | Outputs read data or Ready/Busy (low = busy); enters High-Z when CS low or after status read completion. |
| 5 (VSS) | Ground | Reference for all I/O and internal logic; exposed pad (if present) may be connected to VSS for thermal relief. |
| 6 (NC) | No Connect | Internally unconnected; must be left floating or tied to VSS per layout best practice; not usable as ORG. |
| 7 (ORG) | Organization | No internal connection on 'B'/'A' variants - this pin is NC; x8 mode is hardwired and non-configurable. |
| 8 (VCC) | Power Supply | Primary supply rail; powers EEPROM core and I/O; brown-out detection activates below 1.5 V to inhibit writes. |
Key Features
| Feature | Design Value |
|---|---|
| Self-timed erase/write | Eliminates external timing circuitry or software delays - device manages internal auto-erase and programming autonomously. |
| Automatic ERAL before WRAL | Ensures full array is erased prior to bulk write, preventing stale data remnants without requiring separate ERAL command. |
| Power-on/off data protection | Hardware-level VCC monitoring blocks all write operations until stable supply is confirmed, preventing corruption during power transitions. |
| Ready/Busy status on DO | Enables efficient polling instead of fixed delays - reduces average write latency and simplifies host firmware timing logic. |
| 128 × 8-bit fixed organization | Optimized for byte-addressed access in 8-bit microcontrollers; avoids address mapping complexity of x16 variants. |
Applications
| Industrial Sensor Calibration | Consumer Appliance Settings |
|---|---|
Use Scenario: Storing factory-calibrated sensor offset/gain coefficients in HVAC or pressure transducers. IC Role / Device Role / Timing Role: Nonvolatile configuration memory accessed at boot to initialize ADC reference points and linearization tables. Use Value: Enables field-replaceable sensors without recalibration; retains values across 200+ year lifetime and 1M write cycles. | Use Scenario: Saving user-selected modes (e.g., wash temperature, spin speed) in washing machines or microwaves. IC Role / Device Role / Timing Role: Low-pin-count serial EEPROM interfaced directly to 8-bit MCU GPIOs for persistent UI state storage. Use Value: Reduces BOM cost vs. flash-based alternatives; operates reliably at 2.5 V for battery-backed backup. |
| Automotive Body Control Module | Medical Diagnostic Equipment |
Use Scenario: Storing seat/mirror position presets and lighting profiles in vehicle BCMs. IC Role / Device Role / Timing Role: Industrial-grade EEPROM retaining settings across ignition cycles and thermal extremes (−40°C to +85°C). Use Value: Meets AEC-Q100 stress test requirements for automotive electronics; immune to ESD (≥4 kV HBM). | Use Scenario: Archiving calibration constants and usage logs in portable ultrasound or glucose meters. IC Role / Device Role / Timing Role: Secure, low-power nonvolatile memory for regulatory-critical configuration data with traceable write history. Use Value: Supports FDA 21 CFR Part 11 compliance via deterministic write timing and error-free retention over device lifetime. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 93LC46B-I/MNY | 1 Kbit (64 × 16-bit) organization; same VCC range, package, and temp grade - but x16 interface requires 16-bit MCU data path or byte-swapping logic. | Used where 16-bit word access improves throughput (e.g., DSP configuration), not direct drop-in replacement for x8 systems. | Select only if host system natively supports 16-bit serial transfers; otherwise, 93LC46BT-I/MNY avoids software overhead. |
| AT25010B-MAHL-T | SPI interface (4-wire), 1 Kbit (128 × 8-bit), 1.8–5.5 V, same endurance and retention - but requires dedicated SS pin and different command set. | Preferred in SPI-dominant designs (e.g., ARM Cortex-M with hardware SPI); incompatible with Microwire-only hosts. | Choose when migrating to SPI ecosystem; not suitable for legacy Microwire controllers without firmware rewrite. |
Compared with 93LC46B-I/MNY and AT25010B-MAHL-T, the 93LC46BT-I/MNY provides optimal fit for cost-sensitive, GPIO-constrained 8-bit MCU designs requiring Microwire compatibility, fixed x8 addressing, and industrial-grade reliability without interface translation.
Availability
93LC46BT-I/MNY is available at Aetrix Electronics and suitable for industrial sensor calibration, consumer appliance settings, and automotive body control modules requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for 93LC46BT-I/MNY includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology Inc. is a leading provider of microcontrollers, analog devices, and memory solutions, headquartered in Chandler, Arizona, with global design and manufacturing operations.
The 93LC46B series was designed specifically for low-pin-count, low-power serial EEPROM applications in resource-constrained embedded systems - emphasizing Microwire compatibility, robust data integrity, and extended temperature operation.
FAQ
What is the memory organization of the 93LC46BT-I/MNY?
The 93LC46BT-I/MNY has a fixed 128 × 8-bit (1 Kbit) organization. Unlike 'C' variants, it lacks an ORG pin and is hardwired for x8 operation - meaning each address holds one byte, and all instructions (READ/WRITE/ERASE) operate on 8-bit data units. This simplifies integration with 8-bit microcontrollers and eliminates configuration overhead.
Does the 93LC46BT-I/MNY require an external pull-up resistor on the DO pin?
No, the 93LC46BT-I/MNY does not require an external pull-up on DO. The DO pin actively drives high/low during READ and Ready/Busy status reporting, and enters High-Z when inactive. However, if DI and DO are shorted (shared bus), a current-limiting resistor (e.g., 10 kΩ) is recommended between them to prevent bus conflict during dummy-zero read phases.
What is the minimum VCC required for reliable write operation of the 93LC46BT-I/MNY?
The 93LC46BT-I/MNY requires VCC ≥ 2.5 V for guaranteed write operation, with VPOR (power-on reset threshold) specified at 1.5 V. Below 2.5 V, write cycles may fail or become unreliable; the device inhibits all programming below VPOR to prevent data corruption. For full-speed operation (3 MHz clock), VCC ≥ 4.5 V is recommended.
Can the 93LC46BT-I/MNY be used in automotive applications?
The 93LC46BT-I/MNY is rated for Industrial temperature (−40°C to +85°C), not Automotive (−40°C to +125°C). While it may function in some under-hood or cabin applications, Microchip specifies the 'E' grade (e.g., 93LC46BT-E/MNY) for automotive use. For AEC-Q100 compliance and guaranteed 125°C operation, the 'E' variant must be selected instead of the 'I' grade 93LC46BT-I/MNY.
How is write protection implemented on the 93LC46BT-I/MNY?
Write protection on the 93LC46BT-I/MNY is implemented via hardware and command-level controls: (1) Power-on default is EWDS (Erase/Write Disable) mode, blocking all programming until EWEN is issued; (2) VPOR circuitry disables writes below 1.5 V; (3) EWDS command can be issued after each write to re-enable protection. No external WP pin is present - protection is entirely internal and command-gated.
93LC46BT-I/MNY Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-WFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 1Kbit
- Memory Organization:
- 64 x 16
- Memory Interface:
- Microwire
- Clock Frequency:
- 2 MHz
- Write Cycle Time - Word, Page:
- 6ms
- Access Time:
- -
- Voltage - Supply:
- 2.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-TDFN (2x3)
93LC46BT-I/MNY FAQ
1.How can I place an order for 93LC46BT-I/MNY through Aetrix?
Please submit a Request for Quotation (RFQ) for 93LC46BT-I/MNY on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 93LC46BT-I/MNY reliable?
The price and inventory of 93LC46BT-I/MNY are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 93LC46BT-I/MNY is usually 5 days.
3.What payment methods are accepted for 93LC46BT-I/MNY?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 93LC46BT-I/MNY transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 93LC46BT-I/MNY?
93LC46BT-I/MNY orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 93LC46BT-I/MNY order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 93LC46BT-I/MNY?
For technical support, including 93LC46BT-I/MNY datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 93LC46BT-I/MNY requirements.
6.How does Aetrix verify that 93LC46BT-I/MNY is sourced from the original manufacturer or authorized distributors?
All 93LC46BT-I/MNY products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 93LC46BT-I/MNY meets industry standards.
7.What is the process for return or replacement of 93LC46BT-I/MNY?
All 93LC46BT-I/MNY units undergo pre-shipment inspection (PSI). If there is an issue with 93LC46BT-I/MNY, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 93LC46BT-I/MNY part is unused and in its original packaging.
Return procedure for 93LC46BT-I/MNY:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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