Microchip Technology 93LC46BXT-I/SNG
- Part No.:
- 93LC46BXT-I/SNG
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
93LC46BXT-I/SNG.pdf
- Description:
- IC EEPROM 1KBIT MICROWIRE 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:2,998
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Product details
Overview
93LC46BXT-I/SNG from Microchip Technology Inc. is a 1K-bit (64 × 16) low-voltage serial EEPROM with Microwire-compatible 3-wire interface, 2.5–5.5 V supply range, and industrial temperature grade (–40°C to +85°C). It features self-timed erase/write cycles, automatic ERAL before WRAL, Ready/Busy status via DO pin, and 1 million erase/write endurance. Used for configuration storage in microcontroller-based embedded systems requiring nonvolatile parameter retention.
For engineers reviewing the 93LC46BXT-I/SNG datasheet, 93LC46BXT-I/SNG pinout, 93LC46BXT-I/SNG application, or 93LC46BXT-I/SNG equivalent, key selection criteria include its fixed 16-bit organization (no ORG pin), SOIC-8 package with Pb-free matte tin finish, 3 MHz max clock frequency at VCC ≥ 4.5 V, and support for sequential read and WRAL/ERAL commands under ≥4.5 V operation.
Technical Context
This device implements a synchronous serial Microwire interface with CS, CLK, DI, and DO pins - no ORG pin present (confirmed for 'B' variant), enforcing dedicated 16-bit word access. Internal logic includes auto-erase-before-write, EWEN/EWDS protection state machine, and power-on data protection triggered at VCC ≥ 2.5 V (typical 1.5 V POR threshold).
Timing is governed by strict AC parameters: TCSL ≥ 250 ns between instructions, TPD ≤ 400 ns (at 1.8 V), and TWC = 6 ms for erase/write cycles. The DO pin serves dual role - data output during READ and active-low Ready/Busy indicator during programming - requiring CS high ≥250 ns after TCSL to sample status.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory size & organization | 1 Kbit / 64 × 16-bit - fixed word width; no ORG pin; requires 16-bit data framing per address. |
| VCC operating range | 2.5 V to 5.5 V - supports wide supply rails; POR activates below ~1.5 V to inhibit writes. |
| Interface standard | Microwire-compatible 3-wire serial - CS/CLK/DI/DO; no SPI mode or 4-wire requirement. |
| Max clock frequency | 3 MHz (VCC ≥ 4.5 V); 2 MHz (2.5 V ≤ VCC < 4.5 V) - defines maximum instruction throughput. |
| Erase/write cycle time | 6 ms (TWC) - self-timed; includes auto-erase; no external timing control needed. |
| Data retention & endurance | 200 years retention; 1,000,000 erase/write cycles - validated at 25°C, VCC = 5.0 V. |
| Temperature grade | Industrial (I): –40°C to +85°C - qualified across full range; no automotive (E) rating for this variant. |
Pinout & Package
93LC46BXT-I/SNG is supplied in an 8-lead SOIC package (SNG = SOIC narrow, 150 mil body width) with Pb-free matte tin finish. Pin 1 is marked by laser dot; pin 1 ID corner is bottom-left when notch faces up.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (CS) | Chip Select | Active-high enable; must be held low ≥250 ns (TCSL) between instructions; deselects device into standby. |
| 2 (CLK) | Serial Clock | Positive-edge synchronized I/O; stops/resumes freely; not required during self-timed write. |
| 3 (DI) | Data Input | Accepts Start bit, opcode, address, and 16-bit data; high-impedance when CS low. |
| 4 (DO) | Data Output / Status | Outputs 16-bit data on READ; drives low during erase/write to signal Busy; high = Ready. |
| 5 (VSS) | Ground | Reference return path; must be connected directly to system ground plane. |
| 6 (NC) | No internal connection | Not bonded; must be left floating or tied to VSS - no functional role. |
| 7 (NC) | No internal connection | Not bonded; identical to Pin 6 - no routing or loading required. |
| 8 (VCC) | Power Supply | 2.5–5.5 V input; internal POR circuit blocks writes below ~1.5 V; decoupling capacitor required. |
Key Features
| Feature | Design Value |
|---|---|
| Self-timed erase/write | Eliminates need for external timing control - 6 ms cycle completes autonomously after CS fall. |
| Ready/Busy status on DO | Enables polling-based firmware flow control without interrupts or additional GPIO lines. |
| Automatic ERAL before WRAL | Guarantees clean memory array prior to bulk write - prevents partial-data corruption. |
| EWEN/EWDS security lock | Prevents accidental writes: device powers up in EWDS; explicit EWEN required before any program command. |
| Sequential read mode | Reduces host overhead - holding CS high auto-increments address and streams consecutive 16-bit words. |
Applications
| Industrial Sensor Calibration | Consumer Remote Control Memory |
|---|---|
|
Use Scenario: Storing factory-trimmed sensor offset/gain coefficients and user calibration values in HVAC or pressure transmitters. IC Role / Device Role / Timing Role: Nonvolatile configuration register accessed at power-up and during field recalibration; 16-bit word matches typical ADC coefficient width. Use Value: Eliminates need for external MCU flash partitioning; retains data across 10+ year product lifetime with >200-year retention spec. |
Use Scenario: Saving remote ID pairing codes, button mapping, and battery-level history in IR/RF remotes. IC Role / Device Role / Timing Role: Low-power serial NV memory interfaced directly to 8-bit microcontroller GPIO; operates down to 2.5 V during battery brownout. Use Value: Enables 1 µA standby current (ICCS) and 1M endurance - supports 10+ years of daily button presses without wear-out. |
| Medical Device Configuration | Automotive Body Control Module |
|
Use Scenario: Holding regulatory-compliant device settings (e.g., alarm thresholds, language, audit log flags) in portable diagnostic tools. IC Role / Device Role / Timing Role: Secure configuration store with EWEN/EWDS lock; accessed only during setup or service mode - not runtime-critical. Use Value: Prevents unintended writes during ESD events or power transients; RoHS-compliant packaging meets medical material requirements. |
Use Scenario: Storing seat/mirror position presets, lighting profiles, and door lock behavior in entry-level BCMs. IC Role / Device Role / Timing Role: Secondary NV memory supplementing MCU flash; 16-bit organization aligns with CAN message payload alignment. Use Value: Supports 85°C ambient operation and withstands automotive load-dump transients via built-in power-on protection. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 93LC46A-I/SN | 64 × 8-bit organization; same VCC range, package, and timing; no ORG pin. | Requires 8-bit host interface; unsuitable where 16-bit data alignment is mandatory (e.g., 16-bit ADC registers). | Select if host MCU uses byte-oriented peripherals or legacy 8-bit firmware stack. |
| AT25010B-SSHL-T | SPI interface (4-wire), 1 Kbit × 8; 1.8–5.5 V; 20 MHz clock; different command set and status reporting. | Requires SPI peripheral and driver rewrite; no Ready/Busy pin - relies on WIP polling via STATUS register. | Choose for higher-speed communication or existing SPI infrastructure; not drop-in compatible. |
Compared with 93LC46A-I/SN, the 93LC46BXT-I/SNG provides native 16-bit word access critical for efficient storage of two-byte parameters; versus AT25010B-SSHL-T, it offers simpler 3-wire timing and integrated Ready/Busy signaling but lower bandwidth and Microwire-only compatibility.
Availability
93LC46BXT-I/SNG is available at Aetrix Electronics and suitable for industrial sensor calibration, consumer remote control memory, medical device configuration, and automotive body control module applications requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for 93LC46BXT-I/SNG includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology Inc. is a leading provider of microcontrollers, analog devices, and memory solutions, headquartered in Chandler, Arizona, with global design and manufacturing operations.
The 93LC46 series belongs to Microchip's legacy serial EEPROM product line, designed specifically for cost-sensitive, low-power embedded systems needing reliable nonvolatile storage with minimal pin count and simple firmware integration.
FAQ
What is the memory organization of the 93LC46BXT-I/SNG?
The 93LC46BXT-I/SNG has a fixed 64 × 16-bit organization - 1,024 total bits arranged as 64 words of 16 bits each. Unlike 'C' variants, it lacks an ORG pin and does not support 8-bit mode. This makes it ideal for systems storing two-byte parameters like ADC calibration values or CAN message IDs without software bit-packing.
Does the 93LC46BXT-I/SNG support automatic erase before write?
Yes, the 93LC46BXT-I/SNG performs automatic erase before every WRITE or WRAL operation - no separate ERASE command is needed. This self-timed process is completed within the 6 ms TWC specification and ensures data integrity without host timing intervention.
How is Ready/Busy status monitored on the 93LC46BXT-I/SNG?
Ready/Busy status is signaled on the DO pin: logic low indicates ongoing erase/write; logic high means operation complete. To read status, CS must be brought high for ≥250 ns after TCSL - DO then reflects status until next instruction begins. No status register is required.
What is the function of the NC pins on the 93LC46BXT-I/SNG SOIC package?
Pins 6 and 7 on the 93LC46BXT-I/SNG are No Connect (NC) terminals - internally unbonded and electrically isolated. They must be left floating or tied to VSS; neither pin may be used for signal routing, grounding, or decoupling. Their presence maintains SOIC-8 mechanical compatibility across the 93XX46 family.
Is the 93LC46BXT-I/SNG compatible with 3.3 V microcontrollers?
Yes, the 93LC46BXT-I/SNG operates fully across 2.5–5.5 V, making it directly compatible with 3.3 V systems. Its VIH1 threshold is 2.0 V (min) at VCC ≥ 2.7 V, ensuring reliable logic high detection from standard 3.3 V GPIO outputs without level shifting.
93LC46BXT-I/SNG Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 1Kbit
- Memory Organization:
- 64 x 16
- Memory Interface:
- Microwire
- Clock Frequency:
- 2 MHz
- Write Cycle Time - Word, Page:
- 6ms
- Access Time:
- -
- Voltage - Supply:
- 2.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
93LC46BXT-I/SNG FAQ
1.How can I place an order for 93LC46BXT-I/SNG through Aetrix?
Please submit a Request for Quotation (RFQ) for 93LC46BXT-I/SNG on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 93LC46BXT-I/SNG reliable?
The price and inventory of 93LC46BXT-I/SNG are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 93LC46BXT-I/SNG is usually 5 days.
3.What payment methods are accepted for 93LC46BXT-I/SNG?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 93LC46BXT-I/SNG transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 93LC46BXT-I/SNG?
93LC46BXT-I/SNG orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 93LC46BXT-I/SNG order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 93LC46BXT-I/SNG?
For technical support, including 93LC46BXT-I/SNG datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 93LC46BXT-I/SNG requirements.
6.How does Aetrix verify that 93LC46BXT-I/SNG is sourced from the original manufacturer or authorized distributors?
All 93LC46BXT-I/SNG products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 93LC46BXT-I/SNG meets industry standards.
7.What is the process for return or replacement of 93LC46BXT-I/SNG?
All 93LC46BXT-I/SNG units undergo pre-shipment inspection (PSI). If there is an issue with 93LC46BXT-I/SNG, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 93LC46BXT-I/SNG part is unused and in its original packaging.
Return procedure for 93LC46BXT-I/SNG:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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