Microchip Technology 93LC46CXT-I/SN
- Part No.:
- 93LC46CXT-I/SN
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
93LC46CXT-I/SN.pdf
- Description:
- IC EEPROM 1KBIT MICROWIRE 8SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
93LC46CXT-I/SN from Microchip Technology Inc. is a 1 Kbit (128 × 8 or 64 × 16) low-voltage serial EEPROM with Microwire-compatible 3-wire interface, ORG pin for dynamic word-size selection, and industrial temperature range (−40°C to +85°C). It supports self-timed erase/write cycles, automatic ERAL/WRAL, and Ready/Busy status via DO pin. Used in microcontroller configuration storage, calibration data retention, and power-fail-safe parameter backup.
For engineers reviewing the 93LC46CXT-I/SN datasheet, 93LC46CXT-I/SN pinout, 93LC46CXT-I/SN application, or 93LC46CXT-I/SN equivalent, key selection criteria include VCC range (2.5–5.5 V), ORG-configurable memory organization, 1M endurance cycles, >200-year data retention, and SOIC-8 (SN) package compatibility with legacy board layouts.
Technical Context
The 93LC46CXT-I/SN implements a synchronous serial Microwire interface with CS, CLK, DI, and DO signals, where instruction execution is triggered by a Start bit (CS high + DI high on CLK rising edge). Its dual-organization capability is controlled solely by the external logic level on the ORG pin - tied to VCC for 64 × 16-bit mode or VSS for 128 × 8-bit mode.
Internal operation includes auto-erase-before-write, EWEN/EWDS security lockout, and power-on/off data protection. The device enters Standby mode when CS is low, drawing only 1 µA (I-temp), and asserts Ready/Busy status on DO during TWC (6 ms typical) erase/write cycles - enabling polling-based firmware synchronization without timers.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 1 Kbit (128 × 8-bit or 64 × 16-bit, selected by ORG pin) |
| VCC Range | 2.5 V to 5.5 V - supports direct connection to 3.3 V or 5 V MCU I/O rails without level shifting |
| Clock Frequency | Up to 3 MHz at VCC ≥ 4.5 V - enables fast configuration reads in boot-time-critical systems |
| Write Cycle Time | 6 ms typical (TWC) - deterministic timing allows precise firmware delay budgeting |
| Endurance | 1,000,000 erase/write cycles - suitable for field-updatable calibration tables with daily writes |
| Data Retention | Greater than 200 years at 25°C - ensures lifetime data integrity in unpowered storage |
| Temperature Range | −40°C to +85°C (Industrial grade) - validated for deployment in industrial control enclosures |
Pinout & Package
93LC46CXT-I/SN is packaged in an 8-lead SOIC (SN) with standard 150-mil body width and Pb-free Matte Tin finish. Pin 1 is marked by laser dot; orientation follows JEDEC MS-012AA.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CS (Pin 1) | Chip Select | Active-high enable; must be held low ≥250 ns between instructions; deselects device into 1 µA standby |
| CLK (Pin 2) | Serial Clock | Synchronizes all data transfers on rising edge; stoppable mid-sequence for flexible MCU timing |
| DI (Pin 3) | Data Input | Accepts Start bit, opcodes, addresses, and write data; requires no pull-up if shared with DO |
| DO (Pin 4) | Data Output / Status | Outputs read data or Ready/Busy (low = busy); enters High-Z when CS low or during non-read states |
| VSS (Pin 5) | Ground | Reference return for all I/O and internal circuitry; must be low-impedance connection |
| ORG (Pin 6) | Organization Control | Logic-high → 64×16-bit mode; logic-low → 128×8-bit mode; must be externally biased, not floating |
| NC (Pin 7) | No Connect | Internally unconnected; may be left open or tied to VSS/VCC per layout convenience |
| VCC (Pin 8) | Power Supply | Supplies core and I/O; includes internal POR detection at 1.5 V threshold for data protection |
Key Features
| Feature | Design Value |
|---|---|
| ORG-pin configurable memory organization | Enables single BOM part to support both 8-bit and 16-bit MCU host interfaces without redesign |
| Self-timed erase/write with auto-erase | Eliminates need for external timing components or firmware wait-state loops during programming |
| ERAL and WRAL instructions | Full-array erase (6 ms) and write (15 ms) executed in one command - simplifies factory initialization |
| Ready/Busy status on DO pin | Allows real-time polling instead of fixed delays - improves system responsiveness and reduces CPU load |
| Power-on/off data protection | Hardware-enforced write inhibition below 1.5 V VCC prevents corruption during brown-out or hot-swap events |
| Industry-standard 3-wire Microwire interface | Direct compatibility with legacy PIC® MCU SSP modules and widely supported driver libraries |
Applications
| Industrial Sensor Calibration Storage | Consumer Appliance Configuration Memory |
|---|---|
|
Use Scenario: Storing factory-trimmed ADC offset/gain coefficients and user-adjusted setpoints in temperature/humidity sensors. IC Role / Device Role / Timing Role: Nonvolatile parameter store accessed during power-up initialization and runtime updates via MCU SPI-like controller. Use Value: Maintains calibrated accuracy across 200+ years; ORG pin allows same part to serve 8-bit sensor MCUs (e.g., PIC16F) and 16-bit hosts (e.g., dsPIC33). |
Use Scenario: Retaining user preferences (e.g., cooking time, temperature, language) and cycle counters in smart ovens and washing machines. IC Role / Device Role / Timing Role: Low-power configuration EEPROM interfaced to 3.3 V ARM Cortex-M0+ MCU over Microwire bus. Use Value: 1 µA standby current extends battery backup life; 1M endurance supports 10+ years of daily usage with firmware update logging. |
| Medical Device Parameter Backup | Automotive Body Control Module NVM |
|
Use Scenario: Saving critical therapy parameters and usage logs in portable infusion pumps where data integrity is safety-critical. IC Role / Device Role / Timing Role: Fail-safe NVM with hardware write-protection (EWEN/EWDS) and POR-triggered lockout. Use Value: >200-year retention ensures lifetime data validity; Ready/Busy polling prevents race conditions during emergency shutdown sequences. |
Use Scenario: Storing door lock settings, mirror positions, and lighting profiles in automotive BCMs operating across −40°C to +85°C. IC Role / Device Role / Timing Role: Industrial-grade EEPROM interfaced to 5 V CAN microcontrollers with robust ESD immunity (≥4 kV HBM). Use Value: Validated industrial temp range and 4.5–5.5 V ERAL/WRAL operation ensure reliable reprogramming during vehicle service mode. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 93LC46BXT-I/SN | Dedicated 64 × 16-bit organization; no ORG pin - fixed 16-bit interface | Requires 16-bit host interface; eliminates ORG routing but lacks flexibility for mixed-platform designs | Select when design uses only 16-bit MCU peripherals and board space permits removal of ORG bias resistor |
| AT25010B-SSHL-T | SPI interface (4-wire), 1 Kbit, 1.8–5.5 V, no ORG pin, 20 MHz max clock | Requires separate CS, SCK, SI, SO lines; incompatible protocol stack - needs driver rewrite | Choose for higher-speed access or SPI-native systems; not drop-in compatible due to interface and command set differences |
Compared with 93LC46BXT-I/SN, the 93LC46CXT-I/SN adds configuration flexibility at minor layout cost; versus AT25010B-SSHL-T, it retains Microwire compatibility and lower pin count but trades off maximum clock speed for proven interoperability with legacy Microchip MCU ecosystems.
Availability
93LC46CXT-I/SN is available at Aetrix Electronics and suitable for industrial sensor calibration storage, consumer appliance configuration memory, and medical device parameter backup requiring stable component supply across extended product lifecycles.
Supply support for 93LC46CXT-I/SN includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology Inc. is a leading provider of microcontroller, analog, and Flash-IP solutions, headquartered in Chandler, Arizona, with global design and manufacturing operations.
The 93LC46CXT-I/SN belongs to Microchip's legacy 93XX serial EEPROM family, designed specifically for cost-sensitive, low-power, nonvolatile memory applications in resource-constrained embedded systems requiring Microwire compatibility and long-term data integrity.
FAQ
What is the function of the ORG pin on the 93LC46CXT-I/SN?
The ORG pin on the 93LC46CXT-I/SN selects memory organization: logic high (VCC) configures 64 × 16-bit mode, logic low (VSS) configures 128 × 8-bit mode. It must be externally biased - floating is invalid. This pin distinguishes the 'C' variant from fixed-organization 'A' (8-bit) and 'B' (16-bit) versions, enabling one 93LC46CXT-I/SN footprint to serve multiple host architectures without PCB revision.
Does the 93LC46CXT-I/SN support automatic erase before write?
Yes, the 93LC46CXT-I/SN performs automatic erase before each WRITE or WRAL operation - no separate ERASE command is required. This self-timed auto-erase is integral to its 6 ms typical write cycle (TWC) and ensures data consistency. The device also supports explicit ERASE and ERAL commands for targeted or full-array erasure, all verified in the DS20001749K datasheet.
What is the maximum clock frequency supported by the 93LC46CXT-I/SN?
The 93LC46CXT-I/SN supports up to 3 MHz clock frequency when VCC is 4.5 V to 5.5 V. At 2.5 V ≤ VCC < 4.5 V, maximum clock is 2 MHz; at 1.8 V ≤ VCC < 2.5 V, it is 1 MHz. These AC specifications are fully characterized and guaranteed across the industrial temperature range (−40°C to +85°C), as documented in Table 1-2 of the official datasheet.
How does the Ready/Busy status work on the 93LC46CXT-I/SN?
The 93LC46CXT-I/SN asserts Ready/Busy status on the DO pin: DO = low indicates active erase/write, DO = high means operation complete. To read status, CS must be brought high after ≥250 ns low time (TCSL); DO then transitions from High-Z to valid logic level within TSV (200–500 ns). This enables efficient polling without fixed delays - a key feature confirmed in Section 2.4 and Figure 2-1 of the datasheet.
Is the 93LC46CXT-I/SN RoHS compliant and Pb-free?
Yes, the 93LC46CXT-I/SN is RoHS compliant and features a Pb-free Matte Tin (Sn) finish, as explicitly stated in the "Features" section of DS20001749K-page 1. All packages - including the SOIC-8 (SN) variant - meet JEDEC J-STD-609A Class 1 marking requirements, and the exposed pad (if present in DFN variants) may be connected to VSS or left floating per design needs.
93LC46CXT-I/SN Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 1Kbit
- Memory Organization:
- 128 x 8, 64 x 16
- Memory Interface:
- Microwire
- Clock Frequency:
- 3 MHz
- Write Cycle Time - Word, Page:
- 6ms
- Access Time:
- -
- Voltage - Supply:
- 2.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
93LC46CXT-I/SN FAQ
1.How can I place an order for 93LC46CXT-I/SN through Aetrix?
Please submit a Request for Quotation (RFQ) for 93LC46CXT-I/SN on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 93LC46CXT-I/SN reliable?
The price and inventory of 93LC46CXT-I/SN are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 93LC46CXT-I/SN is usually 5 days.
3.What payment methods are accepted for 93LC46CXT-I/SN?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 93LC46CXT-I/SN transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 93LC46CXT-I/SN?
93LC46CXT-I/SN orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 93LC46CXT-I/SN order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 93LC46CXT-I/SN?
For technical support, including 93LC46CXT-I/SN datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 93LC46CXT-I/SN requirements.
6.How does Aetrix verify that 93LC46CXT-I/SN is sourced from the original manufacturer or authorized distributors?
All 93LC46CXT-I/SN products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 93LC46CXT-I/SN meets industry standards.
7.What is the process for return or replacement of 93LC46CXT-I/SN?
All 93LC46CXT-I/SN units undergo pre-shipment inspection (PSI). If there is an issue with 93LC46CXT-I/SN, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 93LC46CXT-I/SN part is unused and in its original packaging.
Return procedure for 93LC46CXT-I/SN:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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