Microchip Technology 93LC56AT-I/OT
- Part No.:
- 93LC56AT-I/OT
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- SOT-23-6
- Datasheet:
-
93LC56AT-I/OT.pdf
- Description:
- IC EEPROM 2KBIT MIC WIRE SOT23-6
- Quantity:
- Payment:

- Shipping:

Inventory:3,730
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Product details
Overview
93LC56AT-I/OT from Microchip Technology Inc. is a 2 Kbit (256 × 8-bit) low-voltage serial EEPROM with Microwire-compatible 3-wire interface, operating from 2.5 V to 5.5 V, rated for industrial temperature range (−40°C to +85°C), and packaged in SOT-23-6. It features self-timed erase/write cycles, 1,000,000 endurance cycles, and >200 years data retention - used for configuration storage in embedded microcontroller systems.
For engineers reviewing the 93LC56AT-I/OT datasheet, 93LC56AT-I/OT pinout, 93LC56AT-I/OT application, or 93LC56AT-I/OT equivalent, key selection criteria include its 8-bit organization (no ORG pin), SOT-23-6 footprint compatibility, industrial-grade voltage and temperature specs, and Microwire protocol timing compliance at up to 2 MHz (VCC ≥ 2.5 V).
Technical Context
The 93LC56AT-I/OT implements a synchronous serial Microwire interface with CS, CLK, and DI/DO pins - no ORG pin (fixed 8-bit x256 organization). It uses internal auto-erase before write, supports ERAL (Erase All) and WRAL (Write All) commands, and provides Ready/Busy status via DO pin polling during programming.
Power-on/off data protection is enforced by internal voltage detection (VPOR = 1.5 V typical), and write operations require prior EWEN command; device powers up in EWDS (Erase/Write Disable) state. Standby current is ≤5 µA at VCC = 2.5–5.5 V.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory size | 2 Kbit (256 × 8-bit) - fixed x8 organization, no ORG pin required |
| VCC range | 2.5 V to 5.5 V - supports wide supply rails in battery-powered and industrial systems |
| Endurance | 1,000,000 erase/write cycles - enables frequent firmware or calibration updates |
| Data retention | >200 years at 25°C - ensures long-term reliability without refresh |
| Max clock frequency | 2 MHz at VCC ≥ 2.5 V - defines maximum serial transaction speed for host MCU |
| Write cycle time | 6 ms per byte/word - determines minimum time between successive writes |
| Standby current | ≤5 µA (I-temp) - critical for ultra-low-power sleep modes |
Pinout & Package
Package: SOT-23-6 (6-lead small-outline transistor package), Pb-free Matte Tin finish, footprint compatible with JEDEC MO-178AA.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (DO) | Data Output / Ready-Busy indicator | Tri-state output delivering read data or logic-low busy signal during erase/write |
| 2 (VSS) | Ground reference | Primary return path for all internal circuitry and I/O signals |
| 3 (DI) | Data Input | Serial input for opcodes, addresses, and write data on CLK rising edge |
| 4 (VCC) | Power supply | Supplies core logic and memory array; VPOR threshold = 1.5 V ensures power-fail protection |
| 5 (CS) | Chip Select | Active-high enable; must be held low ≥250 ns between instructions to reset internal state |
| 6 (CLK) | Serial clock input | Synchronizes all data transfers; rising edge clocks in DI bits and clocks out DO bits |
Key Features
| Feature | Design Value |
|---|---|
| Self-timed erase/write | Eliminates need for external timing control - host MCU only waits for DO high-Z → low → high transition |
| Automatic ERAL before WRAL | Ensures full-array write integrity without separate erase command sequence |
| EWEN/EWDS security | Prevents accidental overwrites - device powers up disabled and requires explicit enable |
| Power-on/off data protection | Hardware lockout below 1.5 V prevents corruption during brown-out or power ramp |
| Industry-standard 3-wire interface | Reduces MCU GPIO count and PCB routing complexity vs. SPI/I²C |
Applications
| Industrial Sensor Calibration | Consumer Remote Control Memory |
|---|---|
Use Scenario: Storing factory-trimmed sensor offset/gain coefficients in HVAC or pressure transducers. IC Role / Device Role / Timing Role: Nonvolatile configuration register accessed at system boot via Microwire interface. Use Value: Enables field-replaceable sensors without MCU firmware reprogramming; retains values across 10+ year product life. | Use Scenario: Saving user-programmed channel presets and volume levels in IR remote handsets. IC Role / Device Role / Timing Role: Low-pin-count serial EEPROM interfaced to 8-bit microcontroller with minimal GPIO overhead. Use Value: SOT-23-6 footprint saves board space; 2.5 V operation extends alkaline battery life beyond 2 years. |
| Medical Diagnostic Device Settings | Automotive Body Control Module |
Use Scenario: Retaining user-selected display brightness, language, and alarm thresholds in portable ultrasound units. IC Role / Device Role / Timing Role: Secure configuration store with EWEN/EWDS enforcement to prevent runtime corruption. Use Value: 1M endurance supports daily recalibration; >200-year retention meets medical device regulatory shelf-life requirements. | Use Scenario: Storing door lock/unlock patterns and mirror position memory in entry-level BCMs. IC Role / Device Role / Timing Role: Industrial-temp EEPROM interfaced to 16-bit automotive MCU via dedicated Microwire peripheral. Use Value: −40°C to +85°C rating ensures operation in under-hood environments; 5.5 V max VCC tolerates load-dump transients. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 93LC56B-I/OT | 128 × 16-bit organization (x16), same VCC/temp/package | Requires host software adaptation for 16-bit word access and address mapping | Select when system bus width or firmware favors 16-bit data handling |
| AT25020B-MAH-T | SPI interface (4-wire), 2 Kbit, 1.8–5.5 V, SOIC-8/SOT-23-6 | Requires different driver stack and pinout; no Ready/Busy polling - uses WIP flag in status register | Select when migrating to SPI-based platforms or requiring faster 20 MHz clock support |
Compared with 93LC56B-I/OT, the 93LC56AT-I/OT offers simpler 8-bit addressing and eliminates ORG pin management; versus AT25020B-MAH-T, it retains Microwire compatibility and hardware-ready signaling but trades off higher max clock rate for deterministic timing behavior.
Availability
93LC56AT-I/OT is available at Aetrix Electronics and suitable for industrial sensor calibration, consumer remote control memory, medical diagnostic device settings, and automotive body control module applications requiring stable component supply and long-term obsolescence management.
Supply support for 93LC56AT-I/OT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology Inc. is a leading provider of microcontrollers, analog components, and memory solutions, headquartered in Chandler, Arizona, with global design and manufacturing operations.
The 93LCxx family was designed specifically for cost-sensitive, low-power embedded systems needing reliable nonvolatile storage with minimal pin count and simple 3-wire control - targeting applications where SPI overhead or I²C pull-up constraints are prohibitive.
FAQ
What is the memory organization of the 93LC56AT-I/OT?
The 93LC56AT-I/OT has a fixed 256 × 8-bit (2 Kbit) organization with no ORG pin - it is an 'A' version device. This means it always operates in x8 mode, accepting 8-bit data words and 8-bit addresses (A7–A0), eliminating external configuration logic required by 'C' variants.
Does the 93LC56AT-I/OT support automatic erase before write?
Yes, the 93LC56AT-I/OT performs automatic erase before each write operation - a self-timed process initiated by the falling edge of CS after data input. This eliminates the need for separate ERASE commands and ensures data integrity without host intervention.
What is the maximum clock frequency supported by the 93LC56AT-I/OT?
The 93LC56AT-I/OT supports up to 2 MHz clock frequency when VCC is between 2.5 V and 5.5 V. At lower voltages (e.g., 1.8 V), this part is not rated - only 93AA56A/B/C variants support 1.8 V operation.
How does the Ready/Busy status work on the 93LC56AT-I/OT?
The 93LC56AT-I/OT asserts Ready/Busy status on the DO pin: DO = low indicates active erase/write, DO = high indicates completion. Status is valid only after CS is brought high for ≥250 ns post-command; polling DO avoids fixed-delay timeouts in host firmware.
Is the 93LC56AT-I/OT RoHS compliant and Pb-free?
Yes, the 93LC56AT-I/OT is Pb-free and RoHS compliant, with Matte Tin (Sn) finish on all terminals. This is confirmed in the device selection table and packaging section of DS21794G, and applies to all standard packages including SOT-23-6 (OT).
93LC56AT-I/OT Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- SOT-23-6
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 2Kbit
- Memory Organization:
- 256 x 8
- Memory Interface:
- Microwire
- Clock Frequency:
- 2 MHz
- Write Cycle Time - Word, Page:
- 6ms
- Access Time:
- -
- Voltage - Supply:
- 2.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOT-23-6
93LC56AT-I/OT FAQ
1.How can I place an order for 93LC56AT-I/OT through Aetrix?
Please submit a Request for Quotation (RFQ) for 93LC56AT-I/OT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 93LC56AT-I/OT reliable?
The price and inventory of 93LC56AT-I/OT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 93LC56AT-I/OT is usually 5 days.
3.What payment methods are accepted for 93LC56AT-I/OT?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 93LC56AT-I/OT transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 93LC56AT-I/OT?
93LC56AT-I/OT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 93LC56AT-I/OT order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 93LC56AT-I/OT?
For technical support, including 93LC56AT-I/OT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 93LC56AT-I/OT requirements.
6.How does Aetrix verify that 93LC56AT-I/OT is sourced from the original manufacturer or authorized distributors?
All 93LC56AT-I/OT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 93LC56AT-I/OT meets industry standards.
7.What is the process for return or replacement of 93LC56AT-I/OT?
All 93LC56AT-I/OT units undergo pre-shipment inspection (PSI). If there is an issue with 93LC56AT-I/OT, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 93LC56AT-I/OT part is unused and in its original packaging.
Return procedure for 93LC56AT-I/OT:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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