Microchip Technology 93LC56BT/ST
- Part No.:
- 93LC56BT/ST
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
93LC56BT/ST.pdf
- Description:
- IC EEPROM 2KBIT MICROWIRE 8TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:2,896
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
93LC56BT/ST from Microchip Technology Inc. is a 2 Kbit (256 × 8-bit) low-voltage serial EEPROM with Microwire-compatible 3-wire interface, 2.5–5.5 V supply range, and industrial temperature grade (−40°C to +85°C). It features self-timed erase/write cycles, automatic ERAL before WRAL, Ready/Busy status via DO pin, and 1,000,000 endurance cycles. Used in microcontroller-based systems for storing calibration data, configuration settings, and firmware parameters.
For engineers reviewing the 93LC56BT/ST datasheet, 93LC56BT/ST pinout, 93LC56BT/ST application, or 93LC56BT/ST equivalent, key selection criteria include its 8-bit organization (no ORG pin), TSSOP-8 package, 3-wire serial protocol compatibility, write cycle time of 6 ms, and support for sequential read and power-on data protection.
Technical Context
This device implements a synchronous serial Microwire interface with CS, CLK, and DI/DO pins. It operates in dedicated 8-bit mode ('A' version), eliminating ORG pin dependency-pin 6 is NC. Internal logic enforces power-on write protection below 1.5 V and requires EWEN command prior to any erase/write operation.
Memory access uses 7-bit addressing (A6–A0), supports READ, WRITE, ERASE, ERAL, WRAL, EWEN, and EWDS instructions, and delivers data output with 20-clock-cycle timing (TPD ≤ 400 ns at 1.8 V). Standby current is ≤5 µA, and all operations are validated across −40°C to +85°C.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory size | 2 Kbit (256 × 8-bit organization) |
| VCC range | 2.5 V to 5.5 V - supports single-supply operation in 3.3 V and 5 V systems |
| Interface | 3-wire Microwire-compatible serial - minimal GPIO usage, no SPI mode bits required |
| Write cycle time | 6 ms max - enables deterministic firmware timeout handling during programming |
| Endurance | 1,000,000 erase/write cycles - suitable for frequent parameter updates in field-deployed devices |
| Data retention | 200 years - ensures long-term reliability without battery backup |
| Temp range | −40°C to +85°C (Industrial) - qualified for embedded control and instrumentation environments |
| Package | TSSOP-8 (ST) - 3 mm × 4.4 mm footprint, surface-mount compatible with automated assembly |
Pinout & Package
8-pin Thin Shrink Small Outline Package (TSSOP), Pb-free Matte Tin finish, 0.65 mm pitch. Pin 1 marked by laser dot; pin 6 is NC (no internal connection) per 'A'-version specification.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 CS | Chip Select | Active-high enable; must be held low ≥250 ns between commands; initiates self-timed write on falling edge |
| 2 CLK | Serial Clock | Synchronizes opcode/address/data transfer on rising edge; stoppable mid-sequence without corruption |
| 3 DI | Data Input | Accepts Start bit, instruction opcodes, address bits, and write data; high-impedance when not selected |
| 4 DO | Data Output / Status | Outputs read data or Ready/Busy (low = busy); enters High-Z on CS falling edge |
| 5 VSS | Ground | Reference return path for all I/O and core logic; decoupling capacitor required near pin |
| 6 NC | No Connection | Not bonded internally; must be left floating or tied to VSS per layout best practice |
| 7 ORG | Organization Select | NC on 93LC56B/T - not used; differs from 'C' versions where it selects x8/x16 mode |
| 8 VCC | Power Supply | 2.5–5.5 V input; internal POR circuit triggers at ~1.5 V to prevent partial writes during brownout |
Key Features
| Feature | Design Value |
|---|---|
| Self-timed erase/write | Eliminates external timing circuitry; 6 ms max cycle time includes auto-erase, enabling simple firmware polling |
| Ready/Busy status on DO | Allows real-time monitoring of programming progress without additional pins or interrupts |
| Automatic ERAL before WRAL | Guarantees full array readiness before bulk write, preventing partial data corruption |
| Power-on/off data protection | Hardware-enforced lockout below 1.5 V VCC prevents inadvertent writes during power ramp |
| Sequential read mode | Enables fast bulk readout (e.g., config tables) with single CS assertion and continuous clocking |
| EWEN/EWDS security | Explicit enable/disable commands prevent accidental writes; device powers up in locked (EWDS) state |
Applications
| Smart Meter Calibration Storage | Industrial PLC Configuration Memory |
|---|---|
Use Scenario: Storing meter-specific gain/offset coefficients and tariff tables updated during field calibration. IC Role / Device Role / Timing Role: Nonvolatile parameter storage with infrequent writes but guaranteed retention over 20+ years. Use Value: Eliminates need for battery-backed SRAM; 1M endurance supports lifetime recalibration events. | Use Scenario: Holding user-defined I/O mapping, PID tuning constants, and alarm thresholds in programmable logic controllers. IC Role / Device Role / Timing Role: Serial configuration memory interfaced to MCU GPIOs with minimal pin count. Use Value: TSSOP-8 package fits dense PCB layouts; 3-wire interface reduces MCU resource load vs. SPI flash. |
| Medical Device Settings Backup | Automotive Body Control Module NVM |
Use Scenario: Retaining patient-specific therapy parameters and device usage logs in portable diagnostic equipment. IC Role / Device Role / Timing Role: Low-power, tamper-resistant storage accessible during brief wake-up intervals. Use Value: 5 µA standby current extends battery life; power-loss protection ensures data integrity during unexpected shutdown. | Use Scenario: Saving seat/mirror position presets, lighting profiles, and error codes in 12 V automotive subsystems. IC Role / Device Role / Timing Role: Industrial-grade EEPROM tolerant of automotive voltage transients and thermal cycling. Use Value: Qualified to −40°C to +85°C; 2.5 V min VCC supports operation during cold-crank conditions. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 93LC56B-I/ST | Same 256 × 8-bit organization, identical TSSOP-8 package and pinout, same 2.5–5.5 V range | No functional difference; 'B' suffix denotes same industrial temp grade and packaging | Select if cross-referenced as direct replacement in legacy BOMs; functionally identical to 93LC56BT/ST |
| AT25020B-SSHL-T | 2 Kbit SPI interface (4-wire), 1.8–5.5 V, 5 MHz max clock, no Ready/Busy pin - requires software polling or fixed delays | Lacks DO-based status signaling; higher pin count; supports faster random reads but slower bulk writes | Choose for SPI-native designs or where higher clock speed justifies added pin and protocol complexity |
Compared with 93LC56B-I/ST, the 93LC56BT/ST offers identical functionality and drop-in compatibility; versus AT25020B-SSHL-T, it trades SPI speed for simpler 3-wire wiring and hardware-ready signaling-critical for resource-constrained MCUs.
Availability
93LC56BT/ST is available at Aetrix Electronics and suitable for smart meter calibration storage, industrial PLC configuration memory, and medical device settings backup requiring stable component supply, long-term obsolescence planning, and RoHS-compliant sourcing.
Supply support for 93LC56BT/ST includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology Inc. is a leading provider of microcontrollers, analog components, and nonvolatile memory solutions, headquartered in Chandler, Arizona.
The 93LC56BT/ST belongs to Microchip's legacy 93XX serial EEPROM family, designed specifically for cost-sensitive, low-pin-count embedded systems needing reliable, low-power, and easy-to-integrate nonvolatile storage.
FAQ
What is the memory organization of the 93LC56BT/ST?
The 93LC56BT/ST is a 256 × 8-bit (2 Kbit) device with fixed 8-bit organization-no ORG pin is used. This distinguishes it from 'C' variants that support x8/x16 selection. The 'A' suffix in its family designation confirms dedicated 8-bit communication, simplifying interface design and eliminating external ORG biasing requirements for the 93LC56BT/ST.
Does the 93LC56BT/ST require an external pull-up resistor on the DO pin?
No, the 93LC56BT/ST does not require an external pull-up on DO. The DO pin actively drives high/low during read or Ready/Busy status reporting and enters High-Z when deselected or idle. However, if DI and DO are shorted (shared bus), a series resistor (~1 kΩ) is recommended to prevent bus conflict during dummy-zero read phases-this applies to the 93LC56BT/ST only in shared-bus configurations.
What is the minimum VCC required for reliable write operation of the 93LC56BT/ST?
The 93LC56BT/ST requires VCC ≥ 2.5 V for all operations, including write. Its internal power-on reset (POR) circuit disables write functions below ~1.5 V to prevent corruption. For guaranteed 6 ms write cycle timing and full 1M endurance, operation within the specified 2.5–5.5 V range-particularly ≥2.7 V-is recommended. Below 2.5 V, the 93LC56BT/ST will not accept commands.
Can the 93LC56BT/ST be used in automotive applications?
The 93LC56BT/ST is rated for Industrial temperature (−40°C to +85°C), not Automotive (−40°C to +125°C). While it may function in some under-hood environments, Microchip does not qualify or guarantee the 93LC56BT/ST for AEC-Q100 compliance or extended-temperature automotive use. For such applications, select the 93LC56BT-E/ST (E-grade) variant instead-the 93LC56BT/ST is intended for industrial and commercial systems only.
How is write protection implemented on the 93LC56BT/ST?
Write protection on the 93LC56BT/ST is implemented via dual hardware and command-level mechanisms: (1) Power-on write disable-device powers up in EWDS (Erase/Write Disable) mode, blocking all programming until EWEN is issued; (2) Voltage-based lockout-internal POR circuit inhibits writes when VCC < ~1.5 V. Both features ensure the 93LC56BT/ST remains immune to spurious writes during power transitions or noise events.
93LC56BT/ST Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 2Kbit
- Memory Organization:
- 128 x 16
- Memory Interface:
- Microwire
- Clock Frequency:
- 2 MHz
- Write Cycle Time - Word, Page:
- 6ms
- Access Time:
- -
- Voltage - Supply:
- 2.5V ~ 5.5V
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-TSSOP
93LC56BT/ST FAQ
1.How can I place an order for 93LC56BT/ST through Aetrix?
Please submit a Request for Quotation (RFQ) for 93LC56BT/ST on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 93LC56BT/ST reliable?
The price and inventory of 93LC56BT/ST are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 93LC56BT/ST is usually 5 days.
3.What payment methods are accepted for 93LC56BT/ST?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 93LC56BT/ST transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 93LC56BT/ST?
93LC56BT/ST orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 93LC56BT/ST order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 93LC56BT/ST?
For technical support, including 93LC56BT/ST datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 93LC56BT/ST requirements.
6.How does Aetrix verify that 93LC56BT/ST is sourced from the original manufacturer or authorized distributors?
All 93LC56BT/ST products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 93LC56BT/ST meets industry standards.
7.What is the process for return or replacement of 93LC56BT/ST?
All 93LC56BT/ST units undergo pre-shipment inspection (PSI). If there is an issue with 93LC56BT/ST, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 93LC56BT/ST part is unused and in its original packaging.
Return procedure for 93LC56BT/ST:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
93LC56BT/ST Tags

-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology

-
AT21CS01-STUM10-T
Microchip Technology

-
AT24C02C-SSHM-T
Microchip Technology

-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics

-
AT24CS02-SSHM-T
Microchip Technology

-
93LC46BT-I/OT
Microchip Technology

-
AT24C04C-SSHM-T
Microchip Technology

-
24LC01BT-I/SN
Microchip Technology

-
24AA02UIDT-I/OT
Microchip Technology

-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
