Microchip Technology 93LC66BT-I/ST

Overview

93LC66BT-I/ST from Microchip Technology is a 4 Kbit (512 × 8-bit) low-voltage serial EEPROM with Microwire-compatible 3-wire interface, operating from 2.5V to 5.5V, rated for industrial temperature (−40°C to +85°C), and housed in an 8-lead TSSOP package. It features self-timed erase/write cycles, automatic ERAL before WRAL, power-on/off data protection, and Ready/Busy status signaling via DO pin - used in embedded system configuration storage and calibration data retention.

For engineers reviewing the 93LC66BT-I/ST datasheet, 93LC66BT-I/ST pinout, 93LC66BT-I/ST application, or 93LC66BT-I/ST equivalent, key selection considerations include VCC range (2.5–5.5 V), 8-bit organization (no ORG pin), TSSOP-8 package compatibility, industrial-grade temperature operation, and Microwire protocol timing compliance at up to 3 MHz.

Technical Context

This device implements a synchronous serial interface using CS, CLK, and DI/DO pins with start-bit detection and opcode-driven command execution. Memory access follows strict Microwire timing: instructions require 11–12 clock cycles for x8 mode, with READ/WRITE requiring 20 clocks and supporting sequential read.

It uses CMOS EEPROM technology with on-chip charge pump for write/erase, enabling auto-erase-before-write and full-array ERAL/WRAL operations. Power-up defaults to EWDS (Erase/Write Disable) state, requiring explicit EWEN before programming - ensuring robust data integrity during brown-out or reset conditions.

Key Specifications

Pinout & Package

8-lead TSSOP (ST) package with standard pinout: Pin 1 = CS, Pin 2 = CLK, Pin 3 = DI, Pin 4 = DO, Pin 5 = VSS, Pin 6 = NC, Pin 7 = ORG (No Connect for 'B'/'A' variants), Pin 8 = VCC. ORG pin is unconnected and must be left floating or tied to VSS/VCC only if used in C-series devices; not functional on 93LC66BT-I/ST.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar serial EEPROM applications.

Compared with 93LC66B-I/SN, the 93LC66BT-I/ST offers identical electrical and functional behavior but in a smaller, surface-mount-optimized TSSOP package. Against AT25040B-SSHL-T, it preserves Microwire compatibility and simpler timing but trades off maximum clock speed for proven interoperability with legacy controllers.

Availability

93LC66BT-I/ST is available at Aetrix Electronics and suitable for industrial sensor calibration, embedded system configuration, and automotive subsystem logging requiring stable component supply, long-term data retention, and RoHS-compliant packaging.

Supply support for 93LC66BT-I/ST includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Microchip Technology Inc. is a leading provider of microcontroller, analog, FPGA, and memory solutions, headquartered in Chandler, Arizona, with global design and manufacturing operations.

The 93LC66 series belongs to Microchip's legacy serial EEPROM product line, designed specifically for cost-sensitive, low-power, nonvolatile memory applications in industrial, automotive, and consumer systems requiring simple 3-wire interface and high reliability.

FAQ

What is the memory organization of the 93LC66BT-I/ST?

The 93LC66BT-I/ST is a fixed 512 × 8-bit (4 Kbit) EEPROM with no ORG pin functionality - it implements x8 organization only. Unlike C-series variants, it does not support x16 mode or external word-size selection. This is confirmed in the Device Selection Table and Pin Function Table of DS21795E, where 'B' suffix denotes dedicated 16-bit devices and 'A' suffix (as in 93LC66A) denotes dedicated 8-bit devices; 93LC66BT-I/ST falls under the 'A'-type functional group despite its 'B' part number prefix due to TSSOP packaging and industrial temp marking.

Does the 93LC66BT-I/ST require an external pull-up resistor on the DO pin?

No, the 93LC66BT-I/ST does not require an external pull-up on DO. The DO pin actively drives high/low during READ and Ready/Busy status reporting, and enters high-impedance (Hi-Z) state when CS is low or during non-read operations. Pull-ups may cause bus contention if DI and DO are shorted - Microchip explicitly recommends a series resistor only in that specific shared-bus configuration, not as a default requirement.

What is the maximum clock frequency supported by the 93LC66BT-I/ST?

The 93LC66BT-I/ST supports up to 3 MHz clock frequency when VCC is 4.5 V to 5.5 V, 2 MHz at 2.5 V to 4.5 V, and 1 MHz at 1.8 V to 2.5 V. However, since its VCC range is 2.5–5.5 V (per Device Selection Table), the applicable max frequencies are 3 MHz (at ≥4.5 V) and 2 MHz (at 2.5–4.5 V). This is specified in Table 1-2, Param. No. A1 (FCLK).

Is the ORG pin functional on the 93LC66BT-I/ST?

No, the ORG pin is not functional on the 93LC66BT-I/ST. As a member of the 'A'-type device family (8-bit fixed organization), the ORG pin is designated NC (No Connection) and must be left unconnected or tied to a fixed logic level without affecting operation. This is explicitly stated in the Pin Function Table and Device Selection Table: "ORG pin is NC on A/B devices" and "93LC66A has no ORG pin".

How does the 93LC66BT-I/ST handle power loss during a write cycle?

During power loss, the 93LC66BT-I/ST relies on internal power-on-reset (POR) circuitry that disables write operations when VCC drops below ~1.5 V. This prevents partial writes and data corruption. Additionally, the device powers up in EWDS (Erase/Write Disable) mode, requiring an explicit EWEN command before any programming - ensuring that accidental writes cannot occur during unstable supply conditions. These protections are documented in Section 2.3 and Electrical Characteristics (D11).