Allegro MicroSystems A1333LLPTR-5-DD-T
- Part No.:
- A1333LLPTR-5-DD-T
- Manufacturer:
- Allegro MicroSystems
- Category:
- Angle, Linear Position Measuring
- Package:
- 24-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Datasheet:
-
A1333LLPTR-5-DD-T.pdf
- Description:
- ASIL ANGLE SENSOR
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
A1333LLPTR-5-DD-T from Allegro MicroSystems is a dual-die, 360° contactless Hall-effect angle sensor IC with ASIL D safety compliance for redundant automotive systems. It delivers 12-/15-bit angle resolution via SPI, ABI, or UVW outputs; supports 5 V supply and 4–16.5 V operating range; and integrates on-chip EEPROM, CRC-protected SPI, and dual independent CVH sensing paths for electronic power steering (EPS) and throttle position sensing.
For engineers reviewing the A1333LLPTR-5-DD-T datasheet, A1333LLPTR-5-DD-T pinout, A1333LLPTR-5-DD-T application, or A1333LLPTR-5-DD-T equivalent, this page provides verified technical context, pin-level circuit roles, real-world diagnostic coverage metrics, and validated alternatives for functional safety-critical designs requiring dual-die redundancy and 150°C operation.
Technical Context
The A1333LLPTR-5-DD-T implements two electrically isolated SoC dies in a single 24-pin eTSSOP package, each with independent VCC/GND, PWM, SPI, and ABI/UVW interfaces. Its circular vertical Hall (CVH) front end enables robust 360° angle measurement across wide air gaps and magnetic field strengths up to 1200 G.
Dual signal paths - a high-speed PLL-based main path (1 µs refresh, 7 µs latency) and a ZCD-based secondary path - enable simultaneous high-resolution angle reporting and turns counting, field monitoring, and cross-die diagnostics. Built-in LBIST, signal-path diagnostics, and 4-bit SPI CRC support ASIL D system integration per ISO 26262 when used per the A1333 Safety Manual.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Angle Resolution | 12-bit (SPI/PWM) and 15-bit (ABI/UVW) digital output - enables sub-degree precision for closed-loop motor control and safety-critical position feedback. |
| Supply Voltage Range | 4.0 V to 16.5 V - supports direct 12 V battery connection and withstands ISO 7637-2 Pulse 5b up to 39 V with internal zener clamp. |
| SPI Interface Speed | Up to 10 MHz - allows low-latency readout of angle, diagnostics, and EEPROM data; supports daisy-chaining multiple ICs on one bus. |
| Operating Temperature | −40°C to +150°C - qualified per AEC-Q100, enabling use in engine bay, EPS, and transmission control modules. |
| Angle Accuracy | ±0.4° typical at 25°C (300 G, ideal alignment) - stable over temperature with ≤ ±1.3° max error at 150°C. |
| Diagnostic Coverage | High coverage via LBIST, CVH self-test, signal-path monitoring, and EEPROM ECC - meets ASIL D requirements when integrated per safety manual. |
| EEPROM Endurance | 100 write/erase cycles - sufficient for factory calibration and limited field reprogramming of zero point, filtering, and output configuration. |
Pinout & Package
Package: 24-pin eTSSOP (LP suffix), lead-free with 100% matte tin plating, exposed thermal pad.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CS_1/SA0_1, CS_2/SA0_2 | SPI chip-select / Manchester ID LSB | Active-low enable for die 1 or die 2; configurable as ID bit in Manchester mode. |
| SCLK_1, SCLK_2 | SPI clock input | Asynchronous clock for serial communication; supports up to 10 MHz operation per die. |
| MOSI_1/SA1_1, MOSI_2/SA1_2 | SPI master-out/slave-in / Manchester ID MSB | Serial data input to each die; doubles as ID bit in Manchester interface. |
| MISO_1, MISO_2 | SPI master-in/slave-out | Independent bidirectional data output per die; includes 4-bit CRC protection. |
| A_1/U_1, A_2/U_2 | Quadrature A / U-phase output | Configurable as incremental encoder A channel or BLDC commutation U phase. |
| B_1/V_1, B_2/V_2 | Quadrature B / V-phase output | Configurable as incremental encoder B channel or BLDC commutation V phase. |
| I_1/W_1, I_2/W_2 | Index pulse / W-phase output | Configurable as index (Z) pulse or BLDC commutation W phase; programmable resolution up to 8192 CPR. |
| PWM_1, PWM_2 | PWM angle output | 12-bit angle encoded as duty cycle (5–95%); carrier frequency programmable from 98 Hz to 3.125 kHz. |
| VCC_1, VCC_2 | Power supply input | Independent 4–16.5 V supply per die; internal regulator powers analog/digital blocks. |
| GND_1, GND_2 | Ground reference | Separate ground pins per die ensure noise isolation and support differential diagnostics. |
| BYP_1, BYP_2 | Bypass capacitor terminal | Connects to 0.1 µF capacitor; regulates internal voltage (4–5.5 V output for 5 V interface). |
| TEST_1, TEST_2 | Test pin | Must be tied to GND during normal operation; used for factory test and debug modes. |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent SoC dies | Enables hardware-redundant angle sensing with die-to-die matching improved by stacked vertical layout - critical for ASIL D fault-tolerant systems. |
| Circular Vertical Hall (CVH) technology | Single-channel magnetic sensing architecture tolerant to wide air gaps and mechanical misalignment - reduces magnet cost and assembly complexity. |
| Programmable ABI/UVW resolution | AB resolution selectable from 1–2048 PPR (4–8192 CPR); UVW pole pairs configurable 1–16 - supports flexible motor commutation and encoder replacement. |
| On-chip EEPROM with ECC | Stores calibration offsets, zero-point adjustment, filter settings, and output configurations; single-bit correction/dual-bit detection ensures data integrity over 100 cycles. |
| Integrated diagnostics suite | Includes LBIST, CVH self-test, signal-path monitoring, watchdog timers, and undervoltage detection - delivers high diagnostic coverage without external components. |
| Manchester interface option | Allows configuration and readback over VCC/PWM pins only - enables programming in space-constrained systems with minimal I/O count. |
Applications
| Electronic Power Steering (EPS) | Throttle Position Sensing |
|---|---|
Use Scenario: Real-time rotor angle feedback for brushless motor torque assist in column- or rack-mounted EPS systems. IC Role / Device Role / Timing Role: Dual-die A1333LLPTR-5-DD-T provides redundant 15-bit UVW commutation signals with <7 µs latency and ASIL D diagnostic coverage. Use Value: Enables fail-operational motor control under ISO 26262; eliminates need for external redundancy logic or discrete comparators. |
Use Scenario: Contactless angular measurement of accelerator pedal or throttle valve rotation in gasoline and hybrid powertrains. IC Role / Device Role / Timing Role: A1333LLPTR-5-DD-T delivers 12-bit PWM and SPI angle data synchronized to engine control unit sampling windows. Use Value: Supports AEC-Q100 Grade 0 qualification at 150°C ambient; withstands load dump and reverse battery conditions per ISO 16750. |
| Rotary PRNDL Selector | Transmission Range Sensor |
Use Scenario: Gear selector position detection in automatic transmissions with mechanical detent and rotary actuation. IC Role / Device Role / Timing Role: A1333LLPTR-5-DD-T supplies dual-channel ABI quadrature output with programmable 2048 PPR resolution and hysteresis control. Use Value: Eliminates potentiometer wear and EMI susceptibility; supports end-of-line zero-point programming via EEPROM. |
Use Scenario: High-reliability angular feedback for shift-by-wire actuators and planetary gear position monitoring in 8+ speed automatic transmissions. IC Role / Device Role / Timing Role: Dual-die A1333LLPTR-5-DD-T provides independent angle streams for primary control and safety monitor paths. Use Value: Stacked die architecture minimizes impact of magnet misalignment on cross-die matching - improves functional safety validation margin. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar angle sensor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AMS AS5055A-BQFT | Single-die 14-bit SPI-only angle sensor; no PWM, ABI, or UVW outputs; no dual-die redundancy; operates up to 125°C. | Targeted at non-safety-critical industrial encoders and human-interface devices - lacks ASIL compliance and diagnostic coverage. | Select when cost-sensitive, non-automotive applications require compact size and basic SPI angle data without redundancy or motor control outputs. |
| Infineon TLE5012BE1500 | Single-die 15-bit angle sensor with Biss-C and PWM outputs; supports ASIL B; no dual-die variant; 125°C max junction temperature. | Designed for EPS and steering angle sensing where single-channel ASIL B suffices; lacks die-level redundancy and 150°C ambient rating. | Select when system-level redundancy is implemented externally and 125°C operation is sufficient - offers lower pin count and simpler layout. |
Compared with AMS AS5055A-BQFT and Infineon TLE5012BE1500, the A1333LLPTR-5-DD-T uniquely delivers dual-die ASIL D compliance, 150°C ambient operation, and native UVW/ABI/PWM flexibility - making it the only choice for fail-operational EPS and transmission control where hardware redundancy and extended temperature range are mandatory.
Availability
A1333LLPTR-5-DD-T is available at Aetrix Electronics and suitable for electronic power steering (EPS), throttle position sensing, rotary PRNDL selectors, and transmission range sensors requiring stable component supply across automotive production lifecycles.
Supply support for A1333LLPTR-5-DD-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Allegro MicroSystems is a global leader in precision sensing and power ICs, headquartered in Manchester, NH, with decades of expertise in Hall-effect technology and automotive-grade reliability.
The A1333 product line is engineered specifically for functional safety-critical automotive angle sensing - integrating dual-die redundancy, on-chip diagnostics, and AEC-Q100 qualification to meet ASIL D system requirements in EPS, throttle, and transmission applications.
FAQ
What safety standard compliance does the A1333LLPTR-5-DD-T support?
The A1333LLPTR-5-DD-T is developed as an ASIL B safety element out-of-context (SEooC) per ISO 26262, and its dual-die configuration enables ASIL D system integration when used per the A1333 Safety Manual. It includes LBIST, CVH self-test, signal-path diagnostics, and 4-bit SPI CRC - all verified for automotive safety applications. The A1333LLPTR-5-DD-T itself is not certified standalone but provides the required diagnostic coverage and architectural features to achieve ASIL D at the system level.
How does the dual-die architecture of the A1333LLPTR-5-DD-T improve reliability?
The A1333LLPTR-5-DD-T uses stacked dual-die construction in one 24-pin eTSSOP package, with electrically isolated power, ground, and signal paths per die. This layout improves die-to-die matching under thermal and mechanical stress versus side-by-side placement, reducing sensitivity to magnet misalignment. Each die operates independently - enabling cross-checking, fault detection, and fail-operational behavior essential for ASIL D systems like EPS and transmission control.
Can the A1333LLPTR-5-DD-T operate directly from a 12 V battery?
Yes, the A1333LLPTR-5-DD-T supports 4.0 V to 16.5 V supply voltage and is designed for direct 12 V battery connection in automotive environments. It includes internal zener clamping (26.5 V) and withstands ISO 7637-2 Pulse 5b transients up to 39 V. Its −40°C to +150°C operating range and AEC-Q100 qualification confirm suitability for under-hood applications such as throttle bodies and transmission housings where the A1333LLPTR-5-DD-T must sustain harsh electrical and thermal conditions.
What output formats does the A1333LLPTR-5-DD-T support?
The A1333LLPTR-5-DD-T supports three concurrent output formats per die: 12-bit PWM (5–95% duty cycle), programmable ABI quadrature (up to 2048 PPR), and UVW BLDC commutation (1–16 pole pairs). All outputs are derived from the same high-resolution 15-bit internal angle value. SPI provides full register access including diagnostics, EEPROM, and configuration - allowing dynamic switching between modes without hardware changes. This flexibility makes the A1333LLPTR-5-DD-T suitable for both encoder replacement and motor control applications.
Is EEPROM programming supported on the A1333LLPTR-5-DD-T, and how many cycles are guaranteed?
Yes, the A1333LLPTR-5-DD-T includes on-chip EEPROM supporting up to 100 write/erase cycles for factory and end-of-line calibration parameters - including zero-point offset, filtering coefficients, output resolution, and diagnostic thresholds. Data integrity is ensured by single-bit error correction and dual-bit error detection (ECC). Programming can be performed via SPI or, in pin-constrained systems, through Manchester interface using VCC and PWM pins - enabling configuration even when only ABI/UVW and PWM are routed on the PCB.
A1333LLPTR-5-DD-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Allegro MicroSystems
- Package/Case:
- 24-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- -
- For Measuring:
- Angle
- Technology:
- Hall Effect
- Rotation Angle - Electrical, Mechanical:
- 0° ~ 360°, Continuous
- Linear Range:
- -
- Output:
- PWM, SPI
- Output Signal:
- Programmable
- Actuator Type:
- External Magnet, Not Included
- Linearity:
- -
- Resistance:
- -
- Resistance Tolerance:
- -
- Voltage - Supply:
- 4V ~ 16.5V
- Mounting Type:
- Surface Mount
- Termination Style:
- SMD (SMT) Tab
- Operating Temperature:
- -40°C ~ 150°C
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 24-TSSOP-EP
A1333LLPTR-5-DD-T FAQ
1.How can I place an order for A1333LLPTR-5-DD-T through Aetrix?
Please submit a Request for Quotation (RFQ) for A1333LLPTR-5-DD-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for A1333LLPTR-5-DD-T reliable?
The price and inventory of A1333LLPTR-5-DD-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for A1333LLPTR-5-DD-T is usually 5 days.
3.What payment methods are accepted for A1333LLPTR-5-DD-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for A1333LLPTR-5-DD-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for A1333LLPTR-5-DD-T?
A1333LLPTR-5-DD-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your A1333LLPTR-5-DD-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for A1333LLPTR-5-DD-T?
For technical support, including A1333LLPTR-5-DD-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your A1333LLPTR-5-DD-T requirements.
6.How does Aetrix verify that A1333LLPTR-5-DD-T is sourced from the original manufacturer or authorized distributors?
All A1333LLPTR-5-DD-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that A1333LLPTR-5-DD-T meets industry standards.
7.What is the process for return or replacement of A1333LLPTR-5-DD-T?
All A1333LLPTR-5-DD-T units undergo pre-shipment inspection (PSI). If there is an issue with A1333LLPTR-5-DD-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The A1333LLPTR-5-DD-T part is unused and in its original packaging.
Return procedure for A1333LLPTR-5-DD-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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