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Allegro MicroSystems A1339LLPTR-5-DD-T
- Part No.:
- A1339LLPTR-5-DD-T
- Manufacturer:
- Allegro MicroSystems
- Category:
- Angle, Linear Position Measuring
- Package:
- 24-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Datasheet:
-
A1339LLPTR-5-DD-T.pdf
- Description:
- SENSOR ANGLE 360DEG SMD
- Quantity:
- Payment:
- Shipping:
Inventory:2,262
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Product details
Overview
A1339LLPTR-5-DD-T from Allegro MicroSystems is a dual-die, 360° contactless Hall-effect angle sensor IC with integrated diagnostics for ASIL D safety-critical automotive systems. It delivers 12/15-bit angular position data via SPI, ABI, UVW, or PWM outputs; supports 4–16.5 V supply; operates from –40°C to 150°C; and features on-chip EEPROM with ECC for calibration storage. It is deployed in electronic power steering (EPS) and throttle actuation where redundant sensing and field robustness are required.
For engineers reviewing the A1339LLPTR-5-DD-T datasheet, A1339LLPTR-5-DD-T pinout, A1339LLPTR-5-DD-T application, or A1339LLPTR-5-DD-T equivalent, this page provides verified technical context, dual-die package mapping, functional output modes (ABI/UVW/PWM/SPI), ASIL D compliance evidence, and real-world diagnostic coverage metrics - all specific to the 5 V interface, 24-pin eTSSOP dual-die variant.
Technical Context
The A1339LLPTR-5-DD-T implements two independent SoC dies in a single 24-pin eTSSOP package, each with its own CVH front end, ADC, digital signal processing, and dedicated I/O (VCC_1/GND_1/PWM_1/SCLK_1/MOSI_1/MISO_1/CS_1/A_1/B_1/I_1 and mirrored die-2 signals). Its dual-path architecture separates high-speed angle measurement (PLL-based main path, <7 µs latency) from low-power diagnostics and turns counting (ZCD path).
It supports 5 V interface logic levels (VIH = 3.75–5.5 V, VOH = 4–5.5 V), 10 MHz SPI, programmable ABI resolution up to 8192 CPR, and UVW pole pairs configurable from 1 to 16. Built-in diagnostics include LBIST, signal-path monitoring, watchdog timers, and 4-bit CRC on all SPI transactions - all validated per ISO 26262 SEooC requirements for ASIL D integration.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Angle Resolution | 12-bit or 15-bit digital output via SPI; enables sub-degree precision (±0.4° typical error at 25°C) for closed-loop motor control. |
| Supply Voltage Range | 4.0–16.5 V; supports direct 12 V battery connection and withstands ISO 7637-2 Pulse 5b up to 39 V - critical for automotive ECU environments. |
| Operating Temperature | –40°C to +150°C ambient; qualified per AEC-Q100 Grade 0; ensures reliability in EPS gearboxes and under-hood throttle bodies. |
| SPI Interface Speed | Up to 10 MHz clock rate; allows <1 µs angle refresh latency and concurrent multi-device bus operation with CS isolation. |
| Output Formats | Simultaneous ABI quadrature (up to 8192 CPR), UVW commutation (1–16 pole pairs), PWM (98 Hz–3.125 kHz), and SPI - simplifies system-level interface consolidation. |
| Diagnostics Coverage | Logic BIST (30 ms), CVH self-test (30 ms), CRC-protected SPI, ECC-enabled EEPROM, and configurable WAKE pin hysteresis (50–400 mV) - meets ASIL D fault detection requirements. |
| Package | 24-pin eTSSOP (LP suffix); dual exposed-pad construction improves thermal dissipation (RθJA = 69°C/W) and die-to-die matching for redundancy. |
Pinout & Package
Package: 24-pin eTSSOP (LP), lead-free with 100% matte tin plating; dual exposed thermal pad for enhanced heat transfer and mechanical stability in automotive vibration environments.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CS_1/SA0_1 (Pin 1) | SPI chip-select / Manchester ID LSB (die 1) | Active-low enable for die-1 SPI; tied to BYP_1 or GND_1 to set device ID in Manchester mode. |
| SCLK_1 (Pin 2) | SPI clock input (die 1) | Accepts up to 10 MHz clock; timing-critical for deterministic angle readout and diagnostic reporting. |
| MOSI_1/SA1_1 (Pin 3) | SPI data-in / Manchester ID MSB (die 1) | Configures die-1 register writes and EEPROM programming; supports Manchester protocol when used with VCC line modulation. |
| MISO_1 (Pin 4) | SPI data-out (die 1) | Delivers 12/15-bit angle, status flags, and diagnostic data; load capacitance limited to 20 pF for signal integrity. |
| A_1/U_1 (Pin 5) | Quadrature A or U-phase output (die 1) | Programmable ABI/UVW mode; drives 1.5 mA source / 4.5 mA sink for direct MCU or gate-driver interfacing. |
| B_1/V_1 (Pin 6) | Quadrature B or V-phase output (die 1) | Complements A_1/U_1; enables direction detection and 4× interpolation (up to 8192 CPR) in ABI mode. |
| I_1/W_1 (Pin 7) | Index pulse or W-phase output (die 1) | Provides zero-reference event per revolution (ABI) or third commutation phase (UVW) for BLDC timing alignment. |
| GND_1 (Pin 8) | Die-1 ground reference | Separate ground plane for die-1 analog/digital circuits; minimizes crosstalk between redundant sensor paths. |
| PWM_1 (Pin 9) | PWM angle output (die 1) | Programmable carrier frequency (98 Hz–3.125 kHz); duty cycle maps linearly to 0–360° (5–95% range). |
| WAKE_1 (Pin 10) | External wake-up trigger (die 1) | Configurable threshold (300–650 mV) and hysteresis (50–400 mV); enables ultra-low-power tracking during vehicle sleep mode. |
| VCC_1 (Pin 11) | Die-1 power supply / Manchester input | Accepts 4–16.5 V; powers internal regulator and enables Manchester communication via VCC line modulation. |
| BYP_1 (Pin 12) | Dual-die regulator bypass (die 1) | Connects 0.1 µF capacitor; stabilizes internal 3.3 V or 5 V rail; output voltage matches interface selection (4–5.5 V for 5 V mode). |
| CS_2/SA0_2 (Pin 13) | SPI chip-select / Manchester ID LSB (die 2) | Independent control of die-2; enables synchronized or asynchronous dual-sensor operation without shared CS conflict. |
| SCLK_2 (Pin 14) | SPI clock input (die 2) | Allows time-aligned sampling across both dies; supports lock-step or diversity-check architectures for ASIL D fault tolerance. |
| MOSI_2/SA1_2 (Pin 15) | SPI data-in / Manchester ID MSB (die 2) | Enables separate configuration of die-2 EEPROM parameters - essential for mismatch compensation in redundant systems. |
| MISO_2 (Pin 16) | SPI data-out (die 2) | Provides independent angle and diagnostic stream; eliminates single-point failure in safety-critical feedback loops. |
| A_2/U_2 (Pin 17) | Quadrature A or U-phase output (die 2) | Matches die-1 functionality; supports cross-die comparison for real-time fault detection in EPS torque sensors. |
| B_2/V_2 (Pin 18) | Quadrature B or V-phase output (die 2) | Enables differential ABI decoding; reduces sensitivity to magnet misalignment and air-gap variation. |
| I_2/W_2 (Pin 19) | Index pulse or W-phase output (die 2) | Provides redundant zero-reference; critical for turn-counting accuracy in electric power steering with multi-turn capability. |
| GND_2 (Pin 20) | Die-2 ground reference | Isolated return path prevents ground bounce coupling between dies; maintains signal integrity in noisy automotive harnesses. |
| PWM_2 (Pin 21) | PWM angle output (die 2) | Independent PWM generation; allows dual-output fail-safe strategies (e.g., primary PWM active, secondary PWM in diagnostic mode). |
| WAKE_2 (Pin 22) | External wake-up trigger (die 2) | Separate wake control enables staggered activation or independent low-power state management per die. |
| VCC_2 (Pin 23) | Die-2 power supply / Manchester input | Supports independent power domains; allows die-2 to remain active while die-1 is powered down for energy optimization. |
| BYP_2 (Pin 24) | Dual-die regulator bypass (die 2) | Ensures stable regulation for die-2; paired with 0.1 µF capacitor to suppress high-frequency noise on internal supply rails. |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent SoCs in one package | Enables hardware-redundant angle sensing with matched die-to-die characteristics - required for ASIL D compliance in EPS and PRNDL systems. |
| Circular Vertical Hall (CVH) technology | Single-channel magnetic sensing with wide air-gap tolerance (up to ±1.5 mm) and insensitivity to lateral magnet shift - reduces mechanical assembly cost and complexity. |
| On-chip EEPROM with ECC | Stores factory and end-of-line calibration data (offset, gain, temperature coefficients); supports 100 write cycles with single-bit correction/dual-bit detection for long-term reliability. |
| Programmable low-power mode | Reduces average current to 98 µA (one die) while maintaining turn-counting and wake-up responsiveness - extends battery life in parked-vehicle scenarios. |
| ASIL D-ready diagnostics | Includes LBIST, CVH self-test, signal-path monitoring, watchdog timers, and CRC-protected SPI - satisfies ISO 26262 hardware safety requirements without external support ICs. |
| Multi-format output flexibility | Simultaneous ABI, UVW, PWM, and SPI outputs eliminate need for external signal conditioning or translation logic - accelerates system integration and reduces BOM count. |
Applications
| Electronic Power Steering (EPS) | Throttle Actuation Systems |
|---|---|
|
Use Scenario: Real-time rotor angle feedback for brushless DC motor torque control in column-assist and rack-assist EPS modules. IC Role / Device Role / Timing Role: Primary angle sensor providing 12-bit position data at >1 MHz refresh rate via SPI and ABI outputs; enables precise field-oriented control (FOC) with <7 µs latency. Use Value: Dual-die redundancy ensures continuous operation during single-point faults; ASIL D diagnostics meet ISO 26262 requirements for steering assist safety goals. |
Use Scenario: Accurate pedal-to-throttle-valve angular mapping in drive-by-wire systems with fail-operational requirements. IC Role / Device Role / Timing Role: Contactless 360° position sensor delivering synchronized ABI and PWM outputs for redundant ECU inputs; supports 0–360° absolute angle over full mechanical travel. Use Value: 5 V interface compatibility with legacy automotive MCUs; EEPROM-stored calibration compensates for mechanical hysteresis and temperature drift across –40°C to 150°C. |
| Rotary PRNDL Selector | Electric Brake Caliper Actuation |
|
Use Scenario: Gear position detection in automated transmission shift-by-wire systems requiring tamper-proof, wear-free sensing. IC Role / Device Role / Timing Role: Absolute angle encoder generating UVW commutation signals and index pulse (I/W) for discrete gear-state identification and smooth transition sequencing. Use Value: Stacked dual-die construction minimizes impact of magnet misalignment; 150°C rating ensures reliability in hot transmission tunnel environments. |
Use Scenario: Motor position feedback for electro-mechanical brake (EMB) caliper actuators demanding high diagnostic coverage and functional safety. IC Role / Device Role / Timing Role: Safety-critical angle sensor providing dual SPI streams and CRC-protected data for cross-checking between primary and backup controllers. Use Value: On-chip diagnostics (LBIST, ZCD path, EEPROM ECC) reduce need for external safety monitors; 4–16.5 V operation supports 12 V vehicle electrical architecture. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-resolution, safety-certified angle sensing applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AMS AS5055A-BQFT | Single-die 14-bit SPI-only angle sensor; no ABI/UVW/PWM outputs; ASIL B certified; 3.3 V only; TSSOP-16 package. | Lacks dual-output flexibility and ASIL D capability; suitable for non-redundant, lower-cost EPS variants or industrial rotary encoders. | Select when system requires only SPI interface, operates at 3.3 V, and does not mandate dual-die redundancy or ASIL D compliance. |
| Infineon TLE5012BE1000 | Single-die 14-bit angle sensor with Biss-C and PWM outputs; ASIL B certified; 3.3 V/5 V selectable; TDSO-24 package; no EEPROM. | Offers Biss-C interface instead of SPI/ABI/UVW; lacks on-chip EEPROM for calibration storage; no dual-die architecture. | Choose for Biss-C–based master controllers or where external calibration storage is acceptable; not suitable for ASIL D or dual-sensor architectures. |
Compared with AMS AS5055A-BQFT and Infineon TLE5012BE1000, the A1339LLPTR-5-DD-T uniquely delivers dual-die ASIL D readiness, 5 V interface support, integrated EEPROM with ECC, and simultaneous ABI/UVW/PWM/SPI outputs - making it the only option qualified for redundant EPS and brake actuation systems requiring hardware-level fault tolerance.
Availability
A1339LLPTR-5-DD-T is available at Aetrix Electronics and suitable for electronic power steering (EPS), throttle actuation, and rotary PRNDL systems requiring stable component supply, long-term automotive lifecycle support, and ASIL D–compliant sensing solutions.
Supply support for A1339LLPTR-5-DD-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Allegro MicroSystems designs, manufactures, and markets high-performance magnetic sensing and power ICs for automotive and industrial motion control applications.
The A1339 product line delivers contactless, high-resolution angle sensing with integrated safety diagnostics - engineered specifically for ASIL B/D automotive subsystems including EPS, throttle, and transmission controls.
FAQ
What is the supply voltage range supported by the A1339LLPTR-5-DD-T?
The A1339LLPTR-5-DD-T supports a supply voltage range of 4.0 V to 16.5 V, enabling direct connection to 12 V automotive batteries. It also withstands ISO 7637-2 Pulse 5b transients up to 39 V. The 5 V interface variant (denoted by "-5" in the part number) configures internal logic levels for VIH = 3.75–5.5 V and VOH = 4–5.5 V, ensuring compatibility with standard 5 V microcontrollers and signal chains. This wide operating range is validated across –40°C to +150°C ambient temperatures.
How does the dual-die architecture of the A1339LLPTR-5-DD-T support ASIL D compliance?
The A1339LLPTR-5-DD-T integrates two electrically isolated SoC dies in a single 24-pin eTSSOP package, each with independent power, ground, and I/O pins. This physical separation enables lock-step or diversity-check architectures where angle data from both dies is compared in real time. Combined with on-chip diagnostics (LBIST, CVH self-test, CRC-protected SPI, and EEPROM ECC), this structure satisfies ISO 26262 ASIL D hardware requirements for fault detection and mitigation - as documented in the A1339 Safety Manual when integrated with appropriate system-level controls.
What output formats does the A1339LLPTR-5-DD-T support, and how are they configured?
The A1339LLPTR-5-DD-T supports four concurrent output formats: SPI (10 MHz max), ABI quadrature (up to 8192 CPR), UVW BLDC commutation (1–16 pole pairs), and PWM (98 Hz–3.125 kHz). Configuration is performed via SPI register writes or EEPROM programming - including resolution, output mode selection, zero-angle offset, and filtering settings. All outputs operate simultaneously, allowing system designers to use ABI for fast control loops and SPI for high-precision diagnostics without hardware trade-offs.
Does the A1339LLPTR-5-DD-T include on-chip memory, and what is its purpose?
Yes, the A1339LLPTR-5-DD-T includes on-chip EEPROM with error correction coding (ECC) supporting up to 100 read/write cycles. This memory stores factory calibration data (e.g., offset, gain, temperature coefficients) and end-of-line user calibration parameters. ECC provides single-bit error correction and dual-bit error detection, ensuring long-term data integrity in harsh automotive environments. EEPROM access is secured via write-lock mechanisms and enabled only after proper SPI authentication sequences.
What is the operating temperature range of the A1339LLPTR-5-DD-T, and how is it qualified?
The A1339LLPTR-5-DD-T is rated for –40°C to +150°C ambient temperature and qualified to AEC-Q100 Grade 0 standards. Its thermal performance is characterized with RθJA = 69°C/W (eTSSOP-24), and maximum supply voltage derates above 148°C ambient. Angle accuracy (±0.4° typical error), noise (±0.25° at 150°C), and drift (±1.4° max over temperature) are fully specified across this range. These specifications are verified through accelerated life testing and thermal cycling per automotive qualification protocols.
A1339LLPTR-5-DD-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Allegro MicroSystems
- Package/Case:
- 24-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- -
- For Measuring:
- Angle
- Technology:
- Hall Effect
- Rotation Angle - Electrical, Mechanical:
- 0° ~ 360°, Continuous
- Linear Range:
- -
- Output:
- PWM, SPI
- Output Signal:
- Programmable
- Actuator Type:
- External Magnet, Not Included
- Linearity:
- -
- Resistance:
- -
- Resistance Tolerance:
- -
- Voltage - Supply:
- 4V ~ 16.5V
- Mounting Type:
- Surface Mount
- Termination Style:
- SMD (SMT) Tab
- Operating Temperature:
- -40°C ~ 150°C
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 24-TSSOP-EP
A1339LLPTR-5-DD-T FAQ
1.How can I place an order for A1339LLPTR-5-DD-T through Aetrix?
Please submit a Request for Quotation (RFQ) for A1339LLPTR-5-DD-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for A1339LLPTR-5-DD-T reliable?
The price and inventory of A1339LLPTR-5-DD-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for A1339LLPTR-5-DD-T is usually 5 days.
3.What payment methods are accepted for A1339LLPTR-5-DD-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for A1339LLPTR-5-DD-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for A1339LLPTR-5-DD-T?
A1339LLPTR-5-DD-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your A1339LLPTR-5-DD-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for A1339LLPTR-5-DD-T?
For technical support, including A1339LLPTR-5-DD-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your A1339LLPTR-5-DD-T requirements.
6.How does Aetrix verify that A1339LLPTR-5-DD-T is sourced from the original manufacturer or authorized distributors?
All A1339LLPTR-5-DD-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that A1339LLPTR-5-DD-T meets industry standards.
7.What is the process for return or replacement of A1339LLPTR-5-DD-T?
All A1339LLPTR-5-DD-T units undergo pre-shipment inspection (PSI). If there is an issue with A1339LLPTR-5-DD-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The A1339LLPTR-5-DD-T part is unused and in its original packaging.
Return procedure for A1339LLPTR-5-DD-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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