NXP Semiconductors A2T18S260-12SR3
- Part No.:
- A2T18S260-12SR3
- Manufacturer:
- NXP Semiconductors
- Category:
- Single FETs, MOSFETs
- Package:
- NI-780-2S2L
- Datasheet:
-
A2T18S260-12SR3.pdf
- Description:
- RF MOSFET LDMOS 28V NI780
- Quantity:
- Payment:

- Shipping:

Inventory:4,931
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
A2T18S260-12SR3 from NXP Semiconductors is an N-channel enhancement-mode RF power LDMOS transistor designed for cellular base station amplifiers operating in the 1805–1995 MHz band. It delivers 50 W average output power at 28 Vdc, with 19.6 dB typical power gain and 31.0% drain efficiency at 1995 MHz under single-carrier W-CDMA conditions (PAR = 9.9 dB, 0.01% CCDF).
For engineers reviewing the A2T18S260-12SR3 datasheet, A2T18S260-12SR3 pinout, A2T18S260-12SR3 application, or A2T18S260-12SR3 equivalent, this device is evaluated for Doherty PA architectures, digital predistortion (DPD) linearization, and high-efficiency macrocell/remote radio head (RRH) transmitter stages requiring robust thermal performance and broadband linearity.
Technical Context
This LDMOS transistor employs a laterally diffused MOS structure optimized for high-voltage RF switching and amplification. Its gate threshold voltage (1.4–2.2 Vdc) and quiescent gate voltage (2.1–2.9 Vdc) support stable Class AB and Class C biasing, while the extended negative gate-source voltage range (–6.0 Vdc) enables improved Class C operation in envelope-tracking configurations.
The device integrates internal input/output matching networks for 50 Ω systems across 1805–1995 MHz, eliminating external matching components in many designs. Thermal resistance of 0.36 °C/W (junction-to-case) supports high-power CW and pulsed operation up to +150 °C case temperature, with maximum junction temperature rated at +225 °C.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Frequency Range | 1805–1995 MHz - Covers entire LTE Band 3 (1805–1880 MHz) and Band 2 (1930–1995 MHz) for global macrocell deployment. |
| Output Power (Avg) | 50 W @ 28 Vdc - Enables 40–50 W PEP output in Doherty configurations with 7 dB PAR handling capability. |
| Power Gain | 19.6 dB typ. @ 1995 MHz - Reduces driver stage complexity and improves overall PA chain efficiency. |
| Drain Efficiency | 31.0% typ. @ 1995 MHz - Lowers thermal load and power supply requirements in energy-sensitive base station sites. |
| ACPR | –35.7 dBc @ ±5 MHz offset - Meets 3GPP ACLR requirements for W-CDMA and LTE signals without excessive DPD overhead. |
| Thermal Resistance | 0.36 °C/W (RθJC) - Supports >250 W peak power dissipation with standard heatsink mounting at 89 °C case temperature. |
| ESD Rating | HBM Class 2 (2 kV), MM Class B - Ensures robustness during PCB assembly and field handling in telecom infrastructure environments. |
Pinout & Package
Package: NI-780S-2L2L - Air-cavity ceramic/metal flanged package with integrated heat slug, optimized for high-frequency RF performance and thermal management in base station power amplifiers.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (RFout/VDS) | Drain terminal / RF output node | High-current RF output path; connects directly to output matching network and heatsink via metal flange; not electrically isolated from case. |
| 2 (VBW) | Bias feed / bypass terminal | DC bias injection point for gate bias network; requires low-inductance decoupling to ground for stability at RF frequencies. |
| 3 (RFout/VDS) | Drain terminal / RF output node | Second drain connection for parallel current handling and improved thermal spreading; tied internally to Pin 1. |
| 4 (RFin/VGS) | Gate terminal / RF input node | RF input and gate bias interface; must be DC-blocked and impedance-matched to 50 Ω; sensitive to ESD due to thin gate oxide. |
Key Features
| Feature | Design Value |
|---|---|
| Internally matched I/O | Eliminates discrete input/output matching components across 1805–1995 MHz, reducing board area and tuning time in production. |
| Doherty-optimized architecture | Enables high-efficiency back-off operation (≥30% efficiency at 6–10 dB PBO) when paired with a peaking amplifier in asymmetric Doherty topologies. |
| Digital predistortion (DPD) readiness | Low AM/PM distortion (–17.4° max) and stable intermodulation behavior support effective wideband DPD correction up to 20 MHz signal bandwidth. |
| Enhanced negative VGS range | –6.0 Vdc rating allows deep Class C operation and improved efficiency in envelope-tracking or polar modulation schemes. |
| Robust thermal design | 0.36 °C/W RθJC enables continuous 50 W avg. operation with <89 °C case temperature using standard forced-air or conduction-cooled heatsinks. |
Applications
| Macrocell Base Station Transmitter | Remote Radio Head (RRH) |
|---|---|
|
Use Scenario: High-power outdoor macrocell site transmitting LTE FDD/TDD and W-CDMA signals across 1805–1995 MHz bands with 20–40 W per sector. IC Role / Device Role / Timing Role: Final-stage RF power amplifier in Doherty configuration, delivering 50 W avg. output with <–35 dBc ACLR after DPD. Use Value: Enables single-device 50 W output with <31% drain efficiency, reducing system-level power consumption and cooling requirements versus multi-stage alternatives. |
Use Scenario: Compact, weatherized RRH unit mounted on cell tower with tight thermal and size constraints, supporting 2×2 MIMO LTE-Advanced. IC Role / Device Role / Timing Role: High-efficiency RF PA core in integrated transceiver module, operating at 28 Vdc with 1400 mA quiescent current. Use Value: Internal 50 Ω matching eliminates external baluns and matching networks, reducing bill-of-materials and improving repeatability in volume manufacturing. |
| Active Antenna System (AAS) PA Module | Private LTE / CBRS Base Station |
|
Use Scenario: Multi-element active antenna array requiring distributed, thermally efficient 50 W-class PAs per radiating element in 1805–1995 MHz licensed spectrum. IC Role / Device Role / Timing Role: Individual channel PA in beamforming array, biased for Class AB with DPD feedback loop integration. Use Value: Low AM/PM distortion (–17.4°) and flat gain response (0.2 dB over 75 MHz) ensure consistent phase alignment across frequency band for accurate beam steering. |
Use Scenario: Indoor/outdoor private LTE network operating in 1930–1995 MHz CBRS band, requiring FCC-certified, high-linearity 50 W transmitters. IC Role / Device Role / Timing Role: Final RF amplifier in certified small-cell reference design, meeting 3GPP TS 36.104 ACLR and SEM mask requirements. Use Value: Verified –35.1 to –36.0 dBc ACPR across 1930–1995 MHz ensures out-of-band emission compliance without additional filtering. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar RF power amplifier applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MRF6VP2600HR5 | Higher P1dB (260 W vs. 257 W), wider bandwidth (1200–2700 MHz), but lower gain (17.5 dB typ.) and higher VDD sensitivity (requires 32 V for full rating). | Preferred for multi-band base stations covering PCS/DCS/LTE bands; less optimal for narrowband 1805–1995 MHz optimization. | Select when broad frequency coverage outweighs gain and efficiency advantages of A2T18S260-12SR3 in dedicated Band 2/3 deployments. |
| PD57018-E | Lower P1dB (180 W), lower efficiency (28% typ.), but smaller NI-780-4L package and lower cost; no internal matching - requires external tuning. | Suitable for cost-sensitive, space-constrained small cells where external matching is acceptable and 50 W avg. is marginal. | Choose for budget-driven designs accepting higher design effort and reduced thermal margin versus A2T18S260-12SR3's integrated solution. |
Compared with MRF6VP2600HR5 and PD57018-E, the A2T18S260-12SR3 offers superior gain flatness (0.2 dB), tighter ACPR control (–35.7 dBc), and lower thermal resistance (0.36 °C/W), making it the preferred choice for high-performance, thermally constrained 1805–1995 MHz macrocell and RRH applications demanding minimal external component count.
Availability
A2T18S260-12SR3 is available at Aetrix Electronics and suitable for macrocell base stations, remote radio heads, and active antenna systems requiring stable component supply, long-term lifecycle support, and traceable sourcing for telecom infrastructure OEMs.
Supply support for A2T18S260-12SR3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and communications markets, with deep expertise in RF power technologies since the acquisition of Freescale.
The A2T18S260-12SR3 belongs to NXP's AIRFAST RF Power portfolio, engineered specifically for energy-efficient, high-linearity cellular infrastructure amplifiers operating in licensed sub-3 GHz bands.
FAQ
What is the maximum continuous drain voltage rating for the A2T18S260-12SR3?
The A2T18S260-12SR3 has a maximum drain-source voltage (VDSS) rating of +65 Vdc and –0.5 Vdc. This allows safe operation under transient voltage spikes common in RF PA circuits, provided the applied VDD does not exceed +32 Vdc per the operating voltage specification. The device must never be operated with VDD supplied through pins 2 and 4 simultaneously, as noted in the pin connection diagram.
Does the A2T18S260-12SR3 require external input/output matching networks?
No - the A2T18S260-12SR3 is internally matched for 50 Ω systems across its full 1805–1995 MHz operating band. This eliminates the need for external matching components in most standard test fixtures and production designs, simplifying layout and improving repeatability. However, fine-tuning may still be required for specific load-pull optimization or harmonic suppression.
What is the typical thermal resistance junction-to-case for the A2T18S260-12SR3?
The A2T18S260-12SR3 has a measured thermal resistance (RθJC) of 0.36 °C/W under specified test conditions (case temperature 89 °C, 50 W CW, 28 Vdc, IDQ = 1400 mA, 1840 MHz). This value is critical for heatsink sizing and thermal modeling in base station PA modules where sustained 50 W average output must be maintained without exceeding +150 °C case temperature.
Can the A2T18S260-12SR3 be used in Class C amplifier configurations?
Yes - the A2T18S260-12SR3 features an extended negative gate-source voltage range (–6.0 Vdc), explicitly designed to support stable Class C operation. This enables higher efficiency in envelope-tracking and polar modulation architectures, particularly when combined with its optimized Doherty topology compatibility and low AM/PM distortion (–17.4° max).
What ESD protection level does the A2T18S260-12SR3 provide?
The A2T18S260-12SR3 meets Human Body Model (HBM) Class 2 (2 kV), Machine Model (MM) Class B, and Charge Device Model (CDM) Class IV ESD ratings. These levels ensure robust handling during automated PCB assembly and field service in telecom infrastructure environments, though proper ESD-safe practices remain essential during manual handling and rework.
A2T18S260-12SR3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- NI-780-2S2L
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Technology:
- LDMOS
- Configuration:
- -
- Frequency:
- 1.805GHz ~ 1.995GHz
- Gain:
- 18.9dB
- Voltage - Test:
- 28 V
- Current Rating (Amps):
- 10µA
- Noise Figure:
- -
- Current - Test:
- 1.4 A
- Power - Output:
- 257W
- Voltage - Rated:
- 65 V
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Chassis Mount
- Supplier Device Package:
- NI-780-2S2L
A2T18S260-12SR3 FAQ
1.How can I place an order for A2T18S260-12SR3 through Aetrix?
Please submit a Request for Quotation (RFQ) for A2T18S260-12SR3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for A2T18S260-12SR3 reliable?
The price and inventory of A2T18S260-12SR3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for A2T18S260-12SR3 is usually 5 days.
3.What payment methods are accepted for A2T18S260-12SR3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for A2T18S260-12SR3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for A2T18S260-12SR3?
A2T18S260-12SR3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your A2T18S260-12SR3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for A2T18S260-12SR3?
For technical support, including A2T18S260-12SR3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your A2T18S260-12SR3 requirements.
6.How does Aetrix verify that A2T18S260-12SR3 is sourced from the original manufacturer or authorized distributors?
All A2T18S260-12SR3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that A2T18S260-12SR3 meets industry standards.
7.What is the process for return or replacement of A2T18S260-12SR3?
All A2T18S260-12SR3 units undergo pre-shipment inspection (PSI). If there is an issue with A2T18S260-12SR3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The A2T18S260-12SR3 part is unused and in its original packaging.
Return procedure for A2T18S260-12SR3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
A2T18S260-12SR3 Tags

-
3SK294(TE85L,F)
Toshiba Semiconductor and Storage
-
SAV-551+
Mini-Circuits

-
TAV2-501+
Mini-Circuits

-
CE3514M4-C2
CEL

-
AFT05MS004NT1
NXP USA Inc.
-
SAV-541+
Mini-Circuits

-
CE3512K2-C1
CEL

-
AFM907NT1
NXP Semiconductors

-
SKY65050-372LF
Skyworks Solutions Inc.

-
CE3520K3-C1
CEL

-
AFT09MS007NT1
NXP USA Inc.

-
AFT09MS015NT1
NXP USA Inc.
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
