NXP Semiconductors A2V09H400-04NR3
- Part No.:
- A2V09H400-04NR3
- Manufacturer:
- NXP Semiconductors
- Category:
- Single FETs, MOSFETs
- Package:
- OM-780-4L
- Datasheet:
-
A2V09H400-04NR3.pdf
- Description:
- RF MOSFET LDMOS 48V OM780-4
- Quantity:
- Payment:

- Shipping:

Inventory:454
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Product details
Overview
A2V09H400-04NR3 from NXP Semiconductors is a 107 W asymmetrical Doherty RF power LDMOS transistor designed for cellular base station amplifiers operating from 720 to 960 MHz. It delivers 18.0 dB power gain, 55.8% drain efficiency, and –36.4 dBc ACPR at 780 MHz under single-carrier W-CDMA conditions (48 Vdc, 107 W avg., PAR = 9.9 dB). Its dual-gate architecture supports carrier-peaking operation in macrocell and remote radio head (RRH) transmit stages.
For engineers reviewing the A2V09H400-04NR3 datasheet, A2V09H400-04NR3 pinout, A2V09H400-04NR3 application, or A2V09H400-04NR3 equivalent, this device requires attention to gate biasing (VGSA/Q = 2.0–3.3 Vdc, VGSB = 0.6 Vdc), thermal resistance (RθJC = 0.50 °C/W), load-pull impedance matching (e.g., Zload ≈ 2.13–j0.09 Ω for carrier side at 780 MHz), and ESD robustness (HBM Class 2, CDM Class C3).
Technical Context
This asymmetrical Doherty amplifier integrates two N-channel enhancement-mode LDMOS transistors-carrier (Side A) and peaking (Side B)-in a single OM-780-4L plastic package with exposed source. The carrier side operates at IDQA = 688 mA quiescent current, while the peaking side activates above signal envelope threshold via VGSB = 0.6 Vdc bias, enabling high-efficiency operation across wide instantaneous bandwidths.
It features an advanced in-package Doherty architecture with optimized gate-source voltage range (–6.0 to +10 Vdc) for stable Class C peaking operation and internal input matching for 50 Ω systems. Designed explicitly for digital predistortion (DPD) linearization, it achieves <0.007 dB/°C gain variation and –14° AM/PM distortion at P3dB across –30°C to +85°C.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Frequency Range | 720–960 MHz - Covers LTE Band 12/13/14/17/18/19/20/26/28/65/66/71 and legacy UMTS 850/900 MHz bands. |
| Avg. Output Power | 107 W @ 780 MHz - Sustained W-CDMA average output with 9.9 dB PAR, enabling 4×20 MHz LTE CA configurations. |
| Power Gain | 17.1–20.0 dB - Typical 17.9 dB at 780 MHz ensures minimal driver stage complexity in multi-stage PA designs. |
| Drain Efficiency | 51.0–55.8% - Peak 55.8% at 780 MHz reduces thermal load and DC power consumption in energy-sensitive RRH deployments. |
| ACPR | –36.4 dBc @ ±5 MHz - Measured per 3.84 MHz channel bandwidth, meeting 3GPP ACLR requirements for 20 MHz LTE. |
| Thermal Resistance | 0.50 °C/W - Junction-to-case value enables compact heatsink design with ≤76°C case temperature at full 107 W avg. load. |
| ESD Rating | HBM Class 2 (2 kV), CDM Class C3 - Supports automated assembly without special ESD handling beyond standard Class 2 protocols. |
Pinout & Package
The A2V09H400-04NR3 uses the OM-780-4L plastic overmolded package with exposed backside source terminal. Package dimensions conform to NXP's standard high-power RF plastic outline, optimized for low-inductance source grounding and thermal conduction to heatsink.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1: RFinA / VGSA | Carrier gate input | Bias and RF drive node for carrier amplifier; requires DC blocking and gate resistor network (e.g., R1 = 3 Ω) per reference design. |
| 2: RFinB / VGSB | Peaking gate input | Controlled bias node for peaking amplifier; fixed 0.6 Vdc bias enables precise Doherty turn-on point and linearity optimization. |
| 3: RFoutA / VDSA | Carrier drain output | RF output and high-voltage drain node for carrier path; connects to asymmetric coupler (Z1) and output matching network. |
| 4: RFoutB / VDSB | Peaking drain output | RF output and high-voltage drain node for peaking path; combined with RFoutA via coupler to form Doherty combiner output. |
Key Features
| Feature | Design Value |
|---|---|
| Asymmetrical Doherty architecture | Enables >55% drain efficiency at 6–7 dB PAR while maintaining <–35 dBc ACPR, critical for high-PAR OFDMA signals. |
| Negative VGS operating range | –6.0 Vdc minimum gate-source voltage allows deep Class C peaking bias, improving efficiency without sacrificing stability. |
| Digital predistortion (DPD) readiness | Low AM/PM (<–14°) and flat gain vs. temperature (0.007 dB/°C) simplify DPD coefficient convergence and long-term calibration. |
| In-package input matching | Eliminates external input matching components for 50 Ω systems, reducing PCB area and insertion loss in front-end modules. |
| Robust thermal performance | RθJC = 0.50 °C/W supports continuous 107 W avg. operation at TC ≤ 76°C, compatible with forced-air or passive heatsink solutions. |
Applications
| Macrocell Base Station Transmitter | Remote Radio Head (RRH) |
|---|---|
|
Use Scenario: High-power outdoor macrocell site transmitting LTE FDD/TDD and W-CDMA across 700–960 MHz bands. IC Role / Device Role / Timing Role: Final-stage Doherty power amplifier delivering 107 W avg. output into 50 Ω load with DPD correction. Use Value: 55.8% drain efficiency at 780 MHz reduces system-level power draw by ~18% versus prior-generation LDMOS, lowering OPEX and cooling requirements. |
Use Scenario: Compact, weatherized RRH unit mounted on cell tower with tight thermal and size constraints. IC Role / Device Role / Timing Role: Integrated carrier-peaking PA core enabling single-module 4T4R MIMO operation up to 20 MHz bandwidth. Use Value: OM-780-4L package with 0.50 °C/W RθJC allows full 107 W avg. output within 76°C case limit using lightweight aluminum heatsink. |
| Multi-Band Active Antenna System | 5G NR Sub-6 GHz Massive MIMO TRX |
|
Use Scenario: Active antenna array supporting simultaneous LTE Band 13 (777–787 MHz) and Band 28 (703–748 MHz) transmission. IC Role / Device Role / Timing Role: Dual-band-tuned Doherty PA with broadband 720–960 MHz coverage and <0.6 dB gain flatness. Use Value: 88 MHz bandwidth at 107 W avg. output enables single PA to cover both bands without retuning, reducing BOM count and calibration effort. |
Use Scenario: 64T64R massive MIMO baseband unit requiring high-efficiency, low-distortion PA cores for 3.5 GHz n78 band extension. IC Role / Device Role / Timing Role: Proven Doherty topology adapted for sub-6 GHz 5G NR with 100 MHz channel bandwidth and 12 dB PAR. Use Value: –36.4 dBc ACPR and <–14° AM/PM at 780 MHz provide baseline linearity margin for 5G NR ACLR compliance after DPD application. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar RF power amplifier applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MRF6VP2600HR5 | 600 W P3dB, 2.5–2.7 GHz band, higher voltage (65 V), larger OM-780-4L variant | Targets 5G n41/n77/n78 bands; not suitable for 700–960 MHz due to frequency mismatch | Select only for 2.5–2.7 GHz macrocell PA where higher peak power and voltage tolerance are required. |
| A2V09H350-04NR3 | 350 W P3dB (vs. 562 W), identical 720–960 MHz range, same OM-780-4L package and pinout | Lower-cost option for mid-power RRH or distributed antenna systems needing <100 W avg. output | Drop-in replacement when thermal budget or output requirement permits lower P3dB; shares identical bias and layout footprint. |
Compared with MRF6VP2600HR5, A2V09H400-04NR3 provides optimal efficiency and linearity in the 720–960 MHz band but lacks 2.5+ GHz capability; compared with A2V09H350-04NR3, it delivers 60% higher P3dB (562 W vs. 350 W) with identical footprint and bias scheme, enabling scalable PA design across power tiers.
Availability
A2V09H400-04NR3 is available at Aetrix Electronics and suitable for macrocell base stations, remote radio heads, active antenna systems, and 5G sub-6 GHz massive MIMO transceivers requiring stable component supply and long-lifecycle support.
Supply support for A2V09H400-04NR3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and communications infrastructure markets.
The A2V09H400-04NR3 belongs to NXP's AIRFAST RF Power LDMOS product line, engineered specifically for high-efficiency, digitally predistorted cellular base station amplifiers operating in sub-1 GHz frequency bands.
FAQ
What is the maximum continuous drain voltage rating for the A2V09H400-04NR3?
The A2V09H400-04NR3 has a maximum drain-source voltage rating of +105 Vdc. This rating applies under static off-state conditions and must be derated during RF switching transients. Operation above 55 Vdc requires careful attention to transient voltage clamping and layout parasitics to avoid exceeding the absolute maximum VDSS limit.
How is the peaking amplifier biased in the A2V09H400-04NR3 Doherty configuration?
The peaking amplifier in the A2V09H400-04NR3 is biased via the RFinB/VGSB pin at a fixed 0.6 Vdc, as specified in functional test conditions. This negative gate bias relative to source enables Class C operation, ensuring the peaking transistor conducts only during high-envelope signal peaks to boost efficiency without compromising linearity.
Does the A2V09H400-04NR3 require external input matching components?
No, the A2V09H400-04NR3 is internally input matched for 50 Ω systems, eliminating the need for external input matching networks. This simplifies PCB layout, reduces insertion loss, and improves repeatability across production units-confirmed in Table 6 and Figure 2 reference design.
What thermal interface material is recommended for mounting the A2V09H400-04NR3?
NXP recommends solder reflow attachment per Application Note AN1907 for the A2V09H400-04NR3. Use high-thermal-conductivity solder (e.g., Sn96.5Ag3.0Cu0.5) with controlled reflow profile to ensure void-free bond between the exposed source pad and copper heatsink, achieving the specified RθJC = 0.50 °C/W.
Can the A2V09H400-04NR3 be used in pulsed-CW applications?
Yes, the A2V09H400-04NR3 supports pulsed-CW operation with 10 μsec on-time and 10% duty cycle, as validated in Tables 8–11 load-pull data. At 780 MHz, it delivers up to 507 W P3dB and 77.2% drain efficiency in peaking-side maximum-efficiency tuning mode under pulsed conditions.
A2V09H400-04NR3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- OM-780-4L
- Packaging:
- Bulk
- Product Status:
- Active
- Technology:
- LDMOS (Dual)
- Configuration:
- 2 N-Channel
- Frequency:
- 720MHz ~ 960MHz
- Gain:
- 17.9dB
- Voltage - Test:
- 48 V
- Current Rating (Amps):
- 10µA
- Noise Figure:
- -
- Current - Test:
- 688 mA
- Power - Output:
- 107W
- Voltage - Rated:
- 105 V
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- OM-780-4L
A2V09H400-04NR3 FAQ
1.How can I place an order for A2V09H400-04NR3 through Aetrix?
Please submit a Request for Quotation (RFQ) for A2V09H400-04NR3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for A2V09H400-04NR3 reliable?
The price and inventory of A2V09H400-04NR3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for A2V09H400-04NR3 is usually 5 days.
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A2V09H400-04NR3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your A2V09H400-04NR3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for A2V09H400-04NR3?
For technical support, including A2V09H400-04NR3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your A2V09H400-04NR3 requirements.
6.How does Aetrix verify that A2V09H400-04NR3 is sourced from the original manufacturer or authorized distributors?
All A2V09H400-04NR3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that A2V09H400-04NR3 meets industry standards.
7.What is the process for return or replacement of A2V09H400-04NR3?
All A2V09H400-04NR3 units undergo pre-shipment inspection (PSI). If there is an issue with A2V09H400-04NR3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The A2V09H400-04NR3 part is unused and in its original packaging.
Return procedure for A2V09H400-04NR3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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